* Changed Volatile_Full_Access attribute to pragma to mantain portability.
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README.md
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README.md
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# stm32-ada
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Ada bindings for STM32 internals
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## Hardware quirks and workarounds
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### APB
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APB does not support writes of parts of 32-bit registers.
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The library provides acess to register fields as records.
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This could lead compiler to emit byte and half-word writes
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to APB registers causing erroneous effects.
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As a workaround those registers should be read to local variable,
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this variable altered, and then written back to hardware.
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GNAT users may not need the workaround, because of its pragma
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`Volatile_Full_Access` used in this library.
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## Compiler specific notes
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There are compiler-specific pragmas so your compiler may complain about them.
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### GNAT
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`Volatile_Full_Access` pragma is used on (at least writable) APB registers
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as byte- and half-wide writes are not supported by APB. Read STM docs on
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what those accesses actually do.
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@ -27,12 +27,18 @@ package STM32.F4.EXTI is
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end record;
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type EXTI_Registers is record
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IMR: Event_Set_Register with Volatile_Full_Access;
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EMR: Event_Set_Register with Volatile_Full_Access;
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RTSR: Event_Set_Register with Volatile_Full_Access;
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FTSR: Event_Set_Register with Volatile_Full_Access;
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SWIER: Event_Set_Register with Volatile_Full_Access;
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PR: Event_Set_Register with Volatile_Full_Access;
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IMR: Event_Set_Register;
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Pragma Volatile_Full_Access(IMR);
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EMR: Event_Set_Register;
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Pragma Volatile_Full_Access(EMR);
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RTSR: Event_Set_Register;
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Pragma Volatile_Full_Access(RTSR);
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FTSR: Event_Set_Register;
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Pragma Volatile_Full_Access(FTSR);
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SWIER: Event_Set_Register;
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Pragma Volatile_Full_Access(SWIER);
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PR: Event_Set_Register;
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Pragma Volatile_Full_Access(PR);
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end record;
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for EXTI_Registers use record
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@ -117,8 +117,10 @@ package STM32.F4.PWR is
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end record;
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type PWR_Registers is record
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CR : Power_Control_Register with Volatile_Full_Access;
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CSR : Power_Control_Status_Register with Volatile_Full_Access;
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CR : Power_Control_Register;
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Pragma Volatile_Full_Access(CR);
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CSR : Power_Control_Status_Register;
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Pragma Volatile_Full_Access(CSR);
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end record with Volatile;
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for PWR_Registers use record
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@ -114,13 +114,20 @@ package STM32.F4.SysCfg is
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end record;
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type SYSCFG_Registers is record
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MEMRMP: Memory_Remap_Register with Volatile_Full_Access;
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PMC: Peripherial_Mode_Register with Volatile_Full_Access;
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EXTICR1: External_Interrupt_Configuration_1.Register with Volatile_Full_Access;
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EXTICR2: External_Interrupt_Configuration_2.Register with Volatile_Full_Access;
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EXTICR3: External_Interrupt_Configuration_3.Register with Volatile_Full_Access;
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EXTICR4: External_Interrupt_Configuration_4.Register with Volatile_Full_Access;
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CMPCR: Compensation_Cell_Control_Register with Volatile_Full_Access;
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MEMRMP: Memory_Remap_Register;
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Pragma Volatile_Full_Access(MEMRMP);
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PMC: Peripherial_Mode_Register;
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Pragma Volatile_Full_Access(PMC);
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EXTICR1: External_Interrupt_Configuration_1.Register;
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Pragma Volatile_Full_Access(EXTICR1);
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EXTICR2: External_Interrupt_Configuration_2.Register;
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Pragma Volatile_Full_Access(EXTICR2);
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EXTICR3: External_Interrupt_Configuration_3.Register;
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Pragma Volatile_Full_Access(EXTICR3);
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EXTICR4: External_Interrupt_Configuration_4.Register;
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Pragma Volatile_Full_Access(EXTICR4);
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CMPCR: Compensation_Cell_Control_Register;
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Pragma Volatile_Full_Access(CMPCR);
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end record;
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for SYSCFG_Registers use record
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@ -226,13 +226,20 @@ package STM32.F4.USART is
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end record;
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type USART_Registers is record
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SR: Status_Register with Volatile_Full_Access; -- Status register
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DR: Unsigned_32 with Volatile_Full_Access; -- Data register
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BRR: Baud_Rate_Register with Volatile_Full_Access; -- Baud rate register
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CR1: Control_Register_1 with Volatile_Full_Access; -- Control register 1
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CR2: Control_Register_2 with Volatile_Full_Access; -- Control register 2
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CR3: Control_Register_3 with Volatile_Full_Access; -- Control register 3
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GTPR: Guard_Time_and_Prescaler_Register with Volatile_Full_Access; -- Guard time and prescaler register
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SR: Status_Register; -- Status register
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Pragma Volatile_Full_Access(SR);
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DR: Unsigned_32; -- Data register
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Pragma Volatile_Full_Access(DR);
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BRR: Baud_Rate_Register; -- Baud rate register
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Pragma Volatile_Full_Access(BRR);
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CR1: Control_Register_1; -- Control register 1
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Pragma Volatile_Full_Access(CR1);
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CR2: Control_Register_2; -- Control register 2
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Pragma Volatile_Full_Access(CR2);
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CR3: Control_Register_3; -- Control register 3
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Pragma Volatile_Full_Access(CR3);
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GTPR: Guard_Time_and_Prescaler_Register; -- Guard time and prescaler register
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Pragma Volatile_Full_Access(GTPR);
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end record with Volatile;
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for USART_Registers use record
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SR at 16#00# range 0 .. 31;
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