>< DMA2D > Graphic_Accelerator, FMPI2C > Fast_Mode_Plus_I2Cs

This commit is contained in:
Vovanium 2024-01-19 21:59:20 +03:00
parent b209dce12e
commit 8a148a30be
5 changed files with 43 additions and 44 deletions

View File

@ -6,8 +6,8 @@ use Ada.Interrupts.Names;
with Chip.Reset_and_Clock;
use Chip.Reset_and_Clock;
with Chip.DMA2D;
use Chip.DMA2D, Chip.DMA2D.Base;
with Chip.Graphic_Accelerator;
use Chip.Graphic_Accelerator, Chip.Graphic_Accelerator.DMA2D_Base;
with STM32.Graphics;
use STM32.Graphics;
@ -27,9 +27,9 @@ package body Blit is
protected body Interrupts is
procedure Handler is
R : constant Interrupt_Status_Register := DMA2D_HW.ISR;
R : constant Interrupt_Status_Register := DMA2D.ISR;
begin
DMA2D_HW.IFCR := R;
DMA2D.IFCR := R;
Ints := Ints or R.F;
Event := True;
end;
@ -38,7 +38,7 @@ package body Blit is
Event := False;
Status := Ints;
Ints := (others => False);
DMA2D_HW.IFCR := (F => Status, others => <>);
DMA2D.IFCR := (F => Status, others => <>);
end;
end Interrupts;
@ -46,23 +46,23 @@ package body Blit is
Status : Interrupt_Array;
begin
DMA2D_HW.OMAR := Target (Y1, X1)'Address;
DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D.OMAR := Target (Y1, X1)'Address;
DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
DMA2D.OPFCCR := (CM => RGB888, others => <>);
DMA2D_HW.OCOLR.RGB888 := Color;
DMA2D.OCOLR.RGB888 := Color;
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.MODE := Register_to_Memory;
R.START := True;
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
while DMA2D_HW.CR.START loop
while DMA2D.CR.START loop
Interrupts.Wait_Event (Status);
end loop;
end Blit_Rect;
@ -70,25 +70,25 @@ package body Blit is
procedure Copy_Rect (Target : in out Pixels.Pixel_Array; X1, X2, Y1, Y2, X1_Source, Y1_Source : Integer) is
Status : Interrupt_Array;
begin
DMA2D_HW.FGMAR := Target (Y1_Source, X1_Source)'Address;
DMA2D_HW.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
DMA2D.FGMAR := Target (Y1_Source, X1_Source)'Address;
DMA2D.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
DMA2D_HW.OMAR := Target (Y1, X1)'Address;
DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D.OMAR := Target (Y1, X1)'Address;
DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
DMA2D.OPFCCR := (CM => RGB888, others => <>);
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.MODE := Memory_to_Memory;
R.START := True;
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
while DMA2D_HW.CR.START loop
while DMA2D.CR.START loop
Interrupts.Wait_Event (Status);
end loop;
end;
@ -100,11 +100,11 @@ begin
RCC.AHB1RSTR (Index.DMA2D) := False;
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.E (TCI) := True;
-- Enable other interrupts here if required
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
end Blit;

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@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.DMA2D;
package STM32.F429.DMA2D is
package Base renames STM32.DMA2D;
DMA2D_HW : Base.DMA2D_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.DMA2D);
end STM32.F429.DMA2D;

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@ -0,0 +1,12 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.Graphic_Accelerator;
package STM32.F429.Graphic_Accelerator is
package DMA2D_Base renames STM32.Graphic_Accelerator;
DMA2D : DMA2D_Base.DMA2D_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.DMA2D);
end STM32.F429.Graphic_Accelerator;

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@ -1,4 +1,4 @@
package STM32.FMPI2C with Pure is
package STM32.Fast_Mode_Plus_I2Cs with Pure is
-- CR1
@ -254,7 +254,7 @@ package STM32.FMPI2C with Pure is
--
type I2C4_Registers is record
type FMPI2C_Registers is record
CR1 : Control_Register_1;
pragma Volatile_Full_Access (CR1);
CR2 : Control_Register_2;
@ -278,7 +278,7 @@ package STM32.FMPI2C with Pure is
TXDR : Integer range 0 .. 2**8 - 1;
pragma Volatile_Full_Access (TXDR);
end record;
for I2C4_Registers use record
for FMPI2C_Registers use record
CR1 at 16#00# range 0 .. 31;
CR2 at 16#04# range 0 .. 31;
OAR1 at 16#08# range 0 .. 31;
@ -292,5 +292,4 @@ package STM32.FMPI2C with Pure is
TXDR at 16#28# range 0 .. 31;
end record;
end STM32.FMPI2C;
end STM32.Fast_Mode_Plus_I2Cs;

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@ -1,7 +1,7 @@
with STM32.Graphics;
use STM32.Graphics;
package STM32.DMA2D with Pure is
package STM32.Graphic_Accelerator with Pure is
-- CR
type DMA2D_Mode is (
@ -238,4 +238,4 @@ package STM32.DMA2D with Pure is
BGCLUT at 16#0800# range 0 .. 2**8 * 32 - 1;
end record;
end STM32.DMA2D;
end STM32.Graphic_Accelerator;