>< DMA2D > Graphic_Accelerator, FMPI2C > Fast_Mode_Plus_I2Cs
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@ -6,8 +6,8 @@ use Ada.Interrupts.Names;
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with Chip.Reset_and_Clock;
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use Chip.Reset_and_Clock;
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with Chip.DMA2D;
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use Chip.DMA2D, Chip.DMA2D.Base;
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with Chip.Graphic_Accelerator;
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use Chip.Graphic_Accelerator, Chip.Graphic_Accelerator.DMA2D_Base;
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with STM32.Graphics;
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use STM32.Graphics;
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@ -27,9 +27,9 @@ package body Blit is
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protected body Interrupts is
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procedure Handler is
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R : constant Interrupt_Status_Register := DMA2D_HW.ISR;
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R : constant Interrupt_Status_Register := DMA2D.ISR;
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begin
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DMA2D_HW.IFCR := R;
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DMA2D.IFCR := R;
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Ints := Ints or R.F;
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Event := True;
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end;
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@ -38,7 +38,7 @@ package body Blit is
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Event := False;
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Status := Ints;
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Ints := (others => False);
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DMA2D_HW.IFCR := (F => Status, others => <>);
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DMA2D.IFCR := (F => Status, others => <>);
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end;
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end Interrupts;
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@ -46,23 +46,23 @@ package body Blit is
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Status : Interrupt_Array;
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begin
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DMA2D_HW.OMAR := Target (Y1, X1)'Address;
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DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
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DMA2D.OMAR := Target (Y1, X1)'Address;
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DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
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DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
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DMA2D.OPFCCR := (CM => RGB888, others => <>);
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DMA2D_HW.OCOLR.RGB888 := Color;
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DMA2D.OCOLR.RGB888 := Color;
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declare
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R : Control_Register := DMA2D_HW.CR;
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R : Control_Register := DMA2D.CR;
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begin
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R.MODE := Register_to_Memory;
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R.START := True;
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DMA2D_HW.CR := R;
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DMA2D.CR := R;
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end;
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while DMA2D_HW.CR.START loop
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while DMA2D.CR.START loop
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Interrupts.Wait_Event (Status);
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end loop;
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end Blit_Rect;
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@ -70,25 +70,25 @@ package body Blit is
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procedure Copy_Rect (Target : in out Pixels.Pixel_Array; X1, X2, Y1, Y2, X1_Source, Y1_Source : Integer) is
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Status : Interrupt_Array;
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begin
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DMA2D_HW.FGMAR := Target (Y1_Source, X1_Source)'Address;
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DMA2D_HW.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D_HW.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
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DMA2D.FGMAR := Target (Y1_Source, X1_Source)'Address;
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DMA2D.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
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DMA2D_HW.OMAR := Target (Y1, X1)'Address;
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DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
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DMA2D.OMAR := Target (Y1, X1)'Address;
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DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
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DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
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DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
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DMA2D.OPFCCR := (CM => RGB888, others => <>);
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declare
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R : Control_Register := DMA2D_HW.CR;
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R : Control_Register := DMA2D.CR;
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begin
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R.MODE := Memory_to_Memory;
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R.START := True;
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DMA2D_HW.CR := R;
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DMA2D.CR := R;
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end;
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while DMA2D_HW.CR.START loop
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while DMA2D.CR.START loop
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Interrupts.Wait_Event (Status);
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end loop;
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end;
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@ -100,11 +100,11 @@ begin
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RCC.AHB1RSTR (Index.DMA2D) := False;
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declare
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R : Control_Register := DMA2D_HW.CR;
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R : Control_Register := DMA2D.CR;
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begin
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R.E (TCI) := True;
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-- Enable other interrupts here if required
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DMA2D_HW.CR := R;
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DMA2D.CR := R;
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end;
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end Blit;
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@ -1,12 +0,0 @@
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with System.Storage_Elements;
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with STM32.Address_Map;
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with STM32.DMA2D;
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package STM32.F429.DMA2D is
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package Base renames STM32.DMA2D;
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DMA2D_HW : Base.DMA2D_Registers with Volatile, Import,
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Address => System.Storage_Elements.To_Address (STM32.Address_Map.DMA2D);
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end STM32.F429.DMA2D;
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@ -0,0 +1,12 @@
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with System.Storage_Elements;
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with STM32.Address_Map;
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with STM32.Graphic_Accelerator;
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package STM32.F429.Graphic_Accelerator is
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package DMA2D_Base renames STM32.Graphic_Accelerator;
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DMA2D : DMA2D_Base.DMA2D_Registers with Volatile, Import,
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Address => System.Storage_Elements.To_Address (STM32.Address_Map.DMA2D);
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end STM32.F429.Graphic_Accelerator;
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@ -1,4 +1,4 @@
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package STM32.FMPI2C with Pure is
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package STM32.Fast_Mode_Plus_I2Cs with Pure is
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-- CR1
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@ -254,7 +254,7 @@ package STM32.FMPI2C with Pure is
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--
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type I2C4_Registers is record
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type FMPI2C_Registers is record
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CR1 : Control_Register_1;
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pragma Volatile_Full_Access (CR1);
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CR2 : Control_Register_2;
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@ -278,7 +278,7 @@ package STM32.FMPI2C with Pure is
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TXDR : Integer range 0 .. 2**8 - 1;
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pragma Volatile_Full_Access (TXDR);
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end record;
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for I2C4_Registers use record
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for FMPI2C_Registers use record
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CR1 at 16#00# range 0 .. 31;
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CR2 at 16#04# range 0 .. 31;
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OAR1 at 16#08# range 0 .. 31;
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@ -292,5 +292,4 @@ package STM32.FMPI2C with Pure is
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TXDR at 16#28# range 0 .. 31;
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end record;
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end STM32.FMPI2C;
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end STM32.Fast_Mode_Plus_I2Cs;
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@ -1,7 +1,7 @@
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with STM32.Graphics;
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use STM32.Graphics;
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package STM32.DMA2D with Pure is
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package STM32.Graphic_Accelerator with Pure is
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-- CR
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type DMA2D_Mode is (
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@ -238,4 +238,4 @@ package STM32.DMA2D with Pure is
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BGCLUT at 16#0800# range 0 .. 2**8 * 32 - 1;
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end record;
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end STM32.DMA2D;
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end STM32.Graphic_Accelerator;
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