Vovanium
/
stm32-ada
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Merge branch 'master' of git.disroot.org:Vovanium/stm32-ada

This commit is contained in:
Vovanium 2024-01-23 14:27:02 +03:00
parent eaf559d1ac 10045f421f
commit cdbe7b2c3f
92 changed files with 2827 additions and 2260 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Makefile
View File

@ -14,12 +14,12 @@ all: library examples
library: $(LIBRARY_TARGET)
$(LIBRARY_TARGET):
gprbuild $@.gpr
gprbuild -P library/gpr/$@.gpr
clean: $(LIBRARY_TARGET:%=%-clean)
%-clean:
gprclean $*.gpr
gprclean -P library/gpr/$*.gpr
examples:
cd examples; make all

4
examples/common/407z-piswords/board-uart.ads
View File

@ -1,4 +1,4 @@
with Chip.USARTs;
with STM32.USARTs;
package Board.UART is
Port : GPIO_Registers renames GPIOA;
@ -10,7 +10,7 @@ package Board.UART is
AF : Alternate_Function renames Alternate_Functions.USART1;
Module : Chip.USARTs.USART_Base.USART_Registers renames Chip.USARTs.USART1;
Module : STM32.USARTs.USART_Registers renames STM32.USARTs.USART1;
RCC_EN : Boolean renames RCC.APB2ENR (Index.USART1);
RCC_RST : Boolean renames RCC.APB2RSTR (Index.USART1);

4
examples/common/407z-piswords/board.ads
View File

@ -1,7 +1,7 @@
with Chip.GPIO, Chip.Reset_and_Clock;
with STM32.General_Purpose_IOs, STM32.Reset_and_Clock;
use STM32.General_Purpose_IOs, STM32.Reset_and_Clock;
package Board is
use Chip.GPIO, Chip.GPIO.GPIO_Base, Chip.Reset_and_Clock;
LED_Port : GPIO_Registers renames GPIOD;
LED_Bit : constant Port_Bit_Number := 3;

5
examples/common/429disco/board-frequencies.ads
View File

@ -1,8 +1,7 @@
with Chip.Reset_and_Clock;
with STM32.Reset_and_Clock;
with STM32.Reset_and_Clock.Frequencies;
package Board.Frequencies is new STM32.Reset_and_Clock.Frequencies (
HSE_Frequency => HSE_Frequency,
RCC => Chip.Reset_and_Clock.RCC
RCC => STM32.Reset_and_Clock.RCC
);

4
examples/common/429disco/board-lcd-controller.adb
View File

@ -1,7 +1,5 @@
with STM32.LCD_TFT;
use STM32.LCD_TFT;
with Chip.LCD_TFT;
use Chip.LCD_TFT;
with Board.Frequencies;
package body Board.LCD.Controller is
@ -122,7 +120,7 @@ package body Board.LCD.Controller is
procedure Initialize_Pixel_Clock is
SAI_F : constant := 192_000_000;
SAI_R : Natural;
SAI_DIVR : Chip.Reset_and_Clock.RCC_Base.PLLSAI_Division_Factor;
SAI_DIVR : STM32.Reset_and_Clock.PLLSAI_Division_Factor;
Pixel_F : constant := 6_000_000;
begin
-- Disable

22
examples/common/429disco/board-lcd-spi_io.adb
View File

@ -8,8 +8,8 @@ with ILI9341;
with Interfaces;
with STM32.GPIO.Ports;
use STM32.GPIO.Ports;
with STM32.General_Purpose_IOs.Ports;
use STM32.General_Purpose_IOs.Ports;
package body Board.LCD.SPI_IO is
package CSX is new GPIO_Port_Boolean (LCD.CSX_Port, LCD.CSX_Bit);
@ -25,19 +25,19 @@ package body Board.LCD.SPI_IO is
SPI_RCC_RST := False;
declare
R : Chip.SPIs.SPI_Base.Control_Register_1 := SPI_Module.CR1;
R : STM32.SPIs.Control_Register_1 := SPI_Module.CR1;
begin
R.BR := Chip.SPIs.SPI_Base.PCLK_DIV_16;
R.CPHA := Chip.SPIs.SPI_Base.Late_Clock;
R.CPOL := Chip.SPIs.SPI_Base.Positive_Clock;
R.DFF := Chip.SPIs.SPI_Base.Frame_8_Bit;
R.BR := STM32.SPIs.PCLK_DIV_16;
R.CPHA := STM32.SPIs.Late_Clock;
R.CPOL := STM32.SPIs.Positive_Clock;
R.DFF := STM32.SPIs.Frame_8_Bit;
R.LSBFIRST := False;
R.SSM := True;
R.SSI := True;
R.MSTR := Chip.SPIs.SPI_Base.Master;
R.MSTR := STM32.SPIs.Master;
R.SPE := True;
R.RXONLY := False;
R.BIDIMODE := Chip.SPIs.SPI_Base.Unidirectional;
R.BIDIMODE := STM32.SPIs.Unidirectional;
R.BIDIOE := True;
R.CRCEN := False;
R.CRCNEXT := False;
@ -46,9 +46,9 @@ package body Board.LCD.SPI_IO is
end;
declare
R : Chip.SPIs.SPI_Base.Control_Register_2 := SPI_Module.CR2;
R : STM32.SPIs.Control_Register_2 := SPI_Module.CR2;
begin
R.FRF := Chip.SPIs.SPI_Base.Motorola_Mode;
R.FRF := STM32.SPIs.Motorola_Mode;
SPI_Module.CR2 := R;
end;

9
examples/common/429disco/board-lcd.ads
View File

@ -1,5 +1,5 @@
with Chip.SPIs;
use Chip.SPIs;
with STM32.SPIs;
use STM32.SPIs;
package Board.LCD is
@ -18,8 +18,9 @@ package Board.LCD is
SDA_Port : GPIO_Registers renames GPIOF;
SDA_Bit : constant Port_Bit_Number := 9;
SPI_Module : Chip.SPIs.SPI_Base.SPI_Registers renames SPI5;
SPI_AF : Chip.GPIO.GPIO_Base.Alternate_Function renames Chip.GPIO.GPIO_Base.Alternate_Functions.SPI5;
SPI_Module : STM32.SPIs.SPI_Registers renames SPI5;
SPI_AF : STM32.General_Purpose_IOs.Alternate_Function
renames STM32.General_Purpose_IOs.Alternate_Functions.SPI5;
SPI_RCC_EN : Boolean renames RCC.APB2ENR (Index.SPI5);
SPI_RCC_RST : Boolean renames RCC.APB2RSTR (Index.SPI5);

27
examples/common/429disco/board-memory.adb
View File

@ -1,4 +1,5 @@
with Chip.FMC; use Chip.FMC, Chip.FMC.Base;
with STM32.Flexible_Memory_Controller;
use STM32.Flexible_Memory_Controller;
-- with STM32.RCC; use STM32.RCC;
-- with STM32.GPIO; use STM32.GPIO;
with Ada.Real_Time; use Ada.Real_Time;
@ -7,8 +8,8 @@ package body Board.Memory is
procedure Send_Command (R : SDRAM.Command_Mode_Register) is
begin
FMC_HW.SDCMR := R;
while FMC_HW.SDSR.BUSY loop
FMC.SDCMR := R;
while FMC.SDSR.BUSY loop
null;
end loop;
end;
@ -149,17 +150,17 @@ package body Board.Memory is
-- 1. SDCRx Registers
declare
R : SDRAM.Control_Register := FMC_HW.SDCR1;
R : SDRAM.Control_Register := FMC.SDCR1;
begin
R.SDCLK := SDRAM.Period_2_HCLK;
R.RBURST := False;
R.RPIPE := 1;
FMC_HW.SDCR1 := R;
FMC.SDCR1 := R;
end;
declare
R : SDRAM.Control_Register := FMC_HW.SDCR2;
R : SDRAM.Control_Register := FMC.SDCR2;
begin
R.NC := SDRAM.Column_8_Bits;
R.NR := SDRAM.Row_12_Bits;
@ -168,22 +169,22 @@ package body Board.Memory is
R.CAS := 3;
R.WP := False;
FMC_HW.SDCR2 := R;
FMC.SDCR2 := R;
end;
-- 2. SDTRx Registers
declare
R : SDRAM.Timing_Register := FMC_HW.SDTR1;
R : SDRAM.Timing_Register := FMC.SDTR1;
begin
R.TRC := 7 - 1;
R.TRP := 2 - 1;
FMC_HW.SDTR1 := R;
FMC.SDTR1 := R;
end;
declare
R : SDRAM.Timing_Register := FMC_HW.SDTR2;
R : SDRAM.Timing_Register := FMC.SDTR2;
begin
R.TMRD := 2 - 1;
R.TXSR := 7 - 1;
@ -191,7 +192,7 @@ package body Board.Memory is
R.TWR := 2 - 1;
R.TRCD := 2 - 1;
FMC_HW.SDTR2 := R;
FMC.SDTR2 := R;
end;
-- 3. Set MODE to 001 and Target Bank Bits
@ -246,10 +247,10 @@ package body Board.Memory is
-- 8. Program refresh rate
declare
R : SDRAM.Refresh_Timer_Register := FMC_HW.SDRTR;
R : SDRAM.Refresh_Timer_Register := FMC.SDRTR;
begin
R.COUNT := 16#056A#;
FMC_HW.SDRTR := R;
FMC.SDRTR := R;
end;
-- 9. Mobile SDRAM configure Extended mode register

4
examples/common/429disco/board-memory.ads
View File

@ -1,9 +1,11 @@
with System, System.Storage_Elements;
use System, System.Storage_Elements;
with STM32.Address_Map;
package Board.Memory is
pragma Elaborate_Body;
Memory_Base : constant := STM32.Address_Map.FMC_Bank_6;
Memory_Base : constant Address := STM32.Address_Map.FMC_Bank_6;
Memory_Size : constant := 64 * 1024**2; -- 64 Mbit

4
examples/common/429disco/board-uart.ads
View File

@ -1,4 +1,4 @@
with Chip.USARTs;
with STM32.USARTs;
package Board.UART is
@ -11,7 +11,7 @@ package Board.UART is
AF : Alternate_Function renames Alternate_Functions.USART1;
Module : Chip.USARTs.USART_Base.USART_Registers renames Chip.USARTs.USART1;
Module : STM32.USARTs.USART_Registers renames STM32.USARTs.USART1;
RCC_EN : Boolean renames RCC.APB2ENR (Index.USART1);
RCC_RST : Boolean renames RCC.APB2RSTR (Index.USART1);

4
examples/common/429disco/board.ads
View File

@ -1,7 +1,7 @@
with Chip.GPIO, Chip.Reset_and_Clock;
with STM32.General_Purpose_IOs, STM32.Reset_and_Clock;
use STM32.General_Purpose_IOs, STM32.Reset_and_Clock;
package Board is
use Chip.GPIO, Chip.GPIO.GPIO_Base, Chip.Reset_and_Clock;
-- LED

8
examples/common/f4/board-uart-io.adb
View File

@ -1,7 +1,7 @@
with STM32.GPIO.Ports;
use STM32.GPIO.Ports;
with Chip.USARTs;
use Chip.USARTs.USART_Base;
with STM32.General_Purpose_IOs.Ports;
use STM32.General_Purpose_IOs.Ports;
with STM32.USARTs;
use STM32.USARTs;
package body Board.UART.IO is
package TX is new GPIO_Port_Boolean (Port, TX_Bit);

54
examples/lcd_demo/blit.adb
View File

@ -3,11 +3,11 @@ use Ada.Interrupts.Names;
--with System.Storage_Elements;
--use type System.Storage_Elements.Storage_Offset;
with Chip.Reset_and_Clock;
use Chip.Reset_and_Clock;
with STM32.Reset_and_Clock;
use STM32.Reset_and_Clock;
with Chip.DMA2D;
use Chip.DMA2D, Chip.DMA2D.Base;
with STM32.Graphic_Accelerator;
use STM32.Graphic_Accelerator;
with STM32.Graphics;
use STM32.Graphics;
@ -27,9 +27,9 @@ package body Blit is
protected body Interrupts is
procedure Handler is
R : constant Interrupt_Status_Register := DMA2D_HW.ISR;
R : constant Interrupt_Status_Register := DMA2D.ISR;
begin
DMA2D_HW.IFCR := R;
DMA2D.IFCR := R;
Ints := Ints or R.F;
Event := True;
end;
@ -38,7 +38,7 @@ package body Blit is
Event := False;
Status := Ints;
Ints := (others => False);
DMA2D_HW.IFCR := (F => Status, others => <>);
DMA2D.IFCR := (F => Status, others => <>);
end;
end Interrupts;
@ -46,23 +46,23 @@ package body Blit is
Status : Interrupt_Array;
begin
DMA2D_HW.OMAR := Target (Y1, X1)'Address;
DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D.OMAR := Target (Y1, X1)'Address;
DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
DMA2D.OPFCCR := (CM => RGB888, others => <>);
DMA2D_HW.OCOLR.RGB888 := Color;
DMA2D.OCOLR.RGB888 := Color;
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.MODE := Register_to_Memory;
R.START := True;
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
while DMA2D_HW.CR.START loop
while DMA2D.CR.START loop
Interrupts.Wait_Event (Status);
end loop;
end Blit_Rect;
@ -70,25 +70,25 @@ package body Blit is
procedure Copy_Rect (Target : in out Pixels.Pixel_Array; X1, X2, Y1, Y2, X1_Source, Y1_Source : Integer) is
Status : Interrupt_Array;
begin
DMA2D_HW.FGMAR := Target (Y1_Source, X1_Source)'Address;
DMA2D_HW.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
DMA2D.FGMAR := Target (Y1_Source, X1_Source)'Address;
DMA2D.FGOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.FGPFCCR := (AM => No_Alpha_Modification, CM => RGB888, others => <>);
DMA2D_HW.OMAR := Target (Y1, X1)'Address;
DMA2D_HW.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D_HW.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D.OMAR := Target (Y1, X1)'Address;
DMA2D.OOR := (LO => Target'Length(2) - (X2 - X1 + 1), others => <>);
DMA2D.NLR := (NL => Y2 - Y1 + 1, PL => X2 - X1 + 1, others => <>);
DMA2D_HW.OPFCCR := (CM => RGB888, others => <>);
DMA2D.OPFCCR := (CM => RGB888, others => <>);
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.MODE := Memory_to_Memory;
R.START := True;
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
while DMA2D_HW.CR.START loop
while DMA2D.CR.START loop
Interrupts.Wait_Event (Status);
end loop;
end;
@ -100,11 +100,11 @@ begin
RCC.AHB1RSTR (Index.DMA2D) := False;
declare
R : Control_Register := DMA2D_HW.CR;
R : Control_Register := DMA2D.CR;
begin
R.E (TCI) := True;
-- Enable other interrupts here if required
DMA2D_HW.CR := R;
DMA2D.CR := R;
end;
end Blit;

3
examples/lcd_demo/init_layer.adb
View File

@ -1,6 +1,3 @@
with Chip.LCD_TFT;
use Chip.LCD_TFT;
with STM32.Graphics;
with STM32.LCD_TFT;
use STM32.LCD_TFT;

2
examples/lcd_demo/pixels.ads
View File

@ -11,7 +11,7 @@ use System.Storage_Elements;
package Pixels is
SDRAM_Pool : Simple_Pool := Make_Simple_Pool (
To_Address (Board.Memory.Memory_Base),
Board.Memory.Memory_Base,
Board.Memory.Memory_Size / System.Storage_Unit);
type Pixel_Array is array (Integer range <>, Integer range <>) of aliased STM32.Graphics.RGB888_Pixel with Component_Size => 24;

8
examples/led_flasher/led_flasher.adb
View File

@ -1,9 +1,9 @@
with Board; use Board;
with STM32.Reset_and_Clock; use STM32.Reset_and_Clock;
with STM32.GPIO; use STM32.GPIO;
with STM32.GPIO.Ports; use STM32.GPIO.Ports;
with Ada.Real_Time; use Ada.Real_Time;
with STM32.Reset_and_Clock; use STM32.Reset_and_Clock;
with STM32.General_Purpose_IOs; use STM32.General_Purpose_IOs;
with STM32.General_Purpose_IOs.Ports; use STM32.General_Purpose_IOs.Ports;
with Ada.Real_Time; use Ada.Real_Time;
procedure LED_Flasher is
Period: constant Time_Span := Milliseconds(250);

25
examples/sdram_test/sdram_test.adb
View File

@ -1,12 +1,13 @@
with STM32.GPIO.Ports; use STM32.GPIO.Ports;
with STM32.General_Purpose_IOs.Ports;
use STM32.General_Purpose_IOs.Ports;
with Board; use Board;
with Board.UART.IO;
with Board.Memory; -- SDRAM initialization is here!
with STM32.Address_Map;
with Ada.Real_Time; use Ada.Real_Time;
with Interfaces; use Interfaces;
with System;
with System, System.Storage_Elements;
use System, System.Storage_Elements;
procedure SDRAM_Test is
@ -14,7 +15,7 @@ procedure SDRAM_Test is
type Test_Type is array (Integer range 0 .. Board.Memory.Memory_Size / 32 - 1) of Unsigned_32 with Size => Board.Memory.Memory_Size;
M : Test_Type with Import, Address => System'To_Address(Board.Memory.Memory_Base);
M : Test_Type with Import, Address => Board.Memory.Memory_Base;
package LED is new GPIO_Port_Boolean (LED_Port, LED_Bit);
@ -70,19 +71,19 @@ begin
LED_RCC_EN := True;
LED.Set_MODER (STM32.GPIO.Output_Mode);
LED.Set_OTYPER (STM32.GPIO.Push_Pull_Type);
LED.Set_OSPEEDR (STM32.GPIO.Very_High_Speed);
LED.Set_PUPDR (STM32.GPIO.No_Pull);
LED.Set_MODER (STM32.General_Purpose_IOs.Output_Mode);
LED.Set_OTYPER (STM32.General_Purpose_IOs.Push_Pull_Type);
LED.Set_OSPEEDR (STM32.General_Purpose_IOs.Very_High_Speed);
LED.Set_PUPDR (STM32.General_Purpose_IOs.No_Pull);
LED.Set (not LED_On);
LED_2_RCC_EN := True;
LED_2.Set_MODER (STM32.GPIO.Output_Mode);
LED_2.Set_OTYPER (STM32.GPIO.Push_Pull_Type);
LED_2.Set_OSPEEDR (STM32.GPIO.Very_High_Speed);
LED_2.Set_PUPDR (STM32.GPIO.No_Pull);
LED_2.Set_MODER (STM32.General_Purpose_IOs.Output_Mode);
LED_2.Set_OTYPER (STM32.General_Purpose_IOs.Push_Pull_Type);
LED_2.Set_OSPEEDR (STM32.General_Purpose_IOs.Very_High_Speed);
LED_2.Set_PUPDR (STM32.General_Purpose_IOs.No_Pull);
LED_2.Set (not LED_2_On);

19
examples/spi_lcd/spi_lcd.adb
View File

@ -2,7 +2,8 @@ with Ada.Real_Time; use Ada.Real_Time;
with Board.LCD.SPI_IO;
use Board;
with STM32.GPIO.Ports; use STM32.GPIO.Ports;
with STM32.General_Purpose_IOs.Ports;
use STM32.General_Purpose_IOs.Ports;
procedure SPI_LCD is
package LED is new GPIO_Port_Boolean(LED_Port, LED_Bit);
@ -23,19 +24,19 @@ begin
-- LED to see what's happen
LED_RCC_EN := True;
LED.Set_MODER (STM32.GPIO.Output_Mode);
LED.Set_OTYPER (STM32.GPIO.Push_Pull_Type);
LED.Set_OSPEEDR (STM32.GPIO.Very_High_Speed);
LED.Set_PUPDR (STM32.GPIO.No_Pull);
LED.Set_MODER (STM32.General_Purpose_IOs.Output_Mode);
LED.Set_OTYPER (STM32.General_Purpose_IOs.Push_Pull_Type);
LED.Set_OSPEEDR (STM32.General_Purpose_IOs.Very_High_Speed);
LED.Set_PUPDR (STM32.General_Purpose_IOs.No_Pull);
LED.Set (not LED_On);
LED_2_RCC_EN := True;
LED_2.Set_MODER (STM32.GPIO.Output_Mode);
LED_2.Set_OTYPER (STM32.GPIO.Push_Pull_Type);
LED_2.Set_OSPEEDR (STM32.GPIO.Very_High_Speed);
LED_2.Set_PUPDR (STM32.GPIO.No_Pull);
LED_2.Set_MODER (STM32.General_Purpose_IOs.Output_Mode);
LED_2.Set_OTYPER (STM32.General_Purpose_IOs.Push_Pull_Type);
LED_2.Set_OSPEEDR (STM32.General_Purpose_IOs.Very_High_Speed);
LED_2.Set_PUPDR (STM32.General_Purpose_IOs.No_Pull);
LED_2.Set (not LED_2_On);

214
library/source/f4/stm32-address_map.ads
View File

@ -1,114 +1,128 @@
package STM32.Address_Map with Pure is
with System.Storage_Elements;
use System.Storage_Elements, System;
package STM32.Address_Map is
-- Regions / memories
Aliased_Memory : constant := 16#0000_0000#;
Flash_Memory : constant := 16#0800_0000#;
CCM_RAM : constant := 16#1000_0000#;
Option_Bytes : constant := 16#1FFE_C000#;
System_Memory : constant := 16#1FFF_0000#;
Option_Bytes_2 : constant := 16#1FFF_C000#;
SRAM_1 : constant := 16#2000_0000#;
SRAM_2 : constant := 16#2001_C000#;
SRAM_3 : constant := 16#2002_0000#;
Aliased_Memory : constant Address := To_Address (16#0000_0000#);
Flash_Memory : constant Address := To_Address (16#0800_0000#);
CCM_RAM : constant Address := To_Address (16#1000_0000#);
Option_Bytes : constant Address := To_Address (16#1FFE_C000#);
System_Memory : constant Address := To_Address (16#1FFF_0000#);
Option_Bytes_2 : constant Address := To_Address (16#1FFF_C000#);
SRAM_1 : constant Address := To_Address (16#2000_0000#);
SRAM_2 : constant Address := To_Address (16#2001_C000#);
SRAM_3 : constant Address := To_Address (16#2002_0000#);
-- APB1
APB1 : constant := 16#4000_0000#;
TIM2 : constant := 16#4000_0000#;
TIM3 : constant := 16#4000_0400#;
TIM4 : constant := 16#4000_0800#;
TIM5 : constant := 16#4000_0C00#;
TIM6 : constant := 16#4000_1000#;
TIM7 : constant := 16#4000_1400#;
TIM12 : constant := 16#4000_1800#;
TIM13 : constant := 16#4000_1C00#;
TIM14 : constant := 16#4000_2000#;
RTC_and_BKP : constant := 16#4000_2800#;
WWDG : constant := 16#4000_2C00#;
IWDG : constant := 16#4000_3000#;
I2S2ext : constant := 16#4000_3400#;
SPI2_I2S2 : constant := 16#4000_3800#;
SPI3_I2S3 : constant := 16#4000_3C00#;
I2S3ext : constant := 16#4000_4000#;
USART2 : constant := 16#4000_4400#;
USART3 : constant := 16#4000_4800#;
UART4 : constant := 16#4000_4C00#;
UART5 : constant := 16#4000_5000#;
I2C1 : constant := 16#4000_5400#;
I2C2 : constant := 16#4000_5800#;
I2C3 : constant := 16#4000_5C00#;
CAN1 : constant := 16#4000_6400#;
CAN2 : constant := 16#4000_6800#;
PWR : constant := 16#4000_7000#;
DAC : constant := 16#4000_7400#;
UART7 : constant := 14#4000_7800#;
UART8 : constant := 14#4000_7C00#;
APB1 : constant Address := To_Address (16#4000_0000#);
TIM2 : constant Address := APB1 + 16#0000#;
TIM3 : constant Address := APB1 + 16#0400#;
TIM4 : constant Address := APB1 + 16#0800#;
TIM5 : constant Address := APB1 + 16#0C00#;
TIM6 : constant Address := APB1 + 16#1000#;
TIM7 : constant Address := APB1 + 16#1400#;
TIM12 : constant Address := APB1 + 16#1800#;
TIM13 : constant Address := APB1 + 16#1C00#;
TIM14 : constant Address := APB1 + 16#2000#;
LPTIM1 : constant Address := APB1 + 16#2400#;
RTC_and_BKP : constant Address := APB1 + 16#2800#;
WWDG : constant Address := APB1 + 16#2C00#;
IWDG : constant Address := APB1 + 16#3000#;
I2S2ext : constant Address := APB1 + 16#3400#;
SPI2_I2S2 : constant Address := APB1 + 16#3800#;
SPI3_I2S3 : constant Address := APB1 + 16#3C00#;
I2S3ext : constant Address := APB1 + 16#4000#;
USART2 : constant Address := APB1 + 16#4400#;
USART3 : constant Address := APB1 + 16#4800#;
UART4 : constant Address := APB1 + 16#4C00#;
UART5 : constant Address := APB1 + 16#5000#;
I2C1 : constant Address := APB1 + 16#5400#;
I2C2 : constant Address := APB1 + 16#5800#;
I2C3 : constant Address := APB1 + 16#5C00#;
FMPI2C1 : constant Address := APB1 + 16#6000#;
CAN1 : constant Address := APB1 + 16#6400#;
CAN2 : constant Address := APB1 + 16#6800#;
CAN3 : constant Address := APB1 + 16#6C00#;
PWR : constant Address := APB1 + 16#7000#;
DAC : constant Address := APB1 + 16#7400#;
UART7 : constant Address := APB1 + 16#7800#;
UART8 : constant Address := APB1 + 16#7C00#;
-- APB2
APB2 : constant := 16#4001_0000#;
TIM1 : constant := 16#4001_0000#;
TIM8 : constant := 16#4001_0400#;
USART1 : constant := 16#4001_1000#;
USART6 : constant := 16#4001_1400#;
ADC1 : constant := 16#4001_2000#;
ADC2 : constant := 16#4001_2100#;
ADC3 : constant := 16#4001_2200#;
ADC_Common : constant := 16#4001_2300#;
SDIO : constant := 16#4001_2C00#;
SPI1 : constant := 16#4001_3000#;
SPI4 : constant := 16#4001_3400#;
SYSCFG : constant := 16#4001_3800#;
EXTI : constant := 16#4001_3C00#;
TIM9 : constant := 16#4001_4000#;
TIM10 : constant := 16#4001_4400#;
TIM11 : constant := 16#4001_4800#;
SPI5 : constant := 16#4001_5000#;
SPI6 : constant := 16#4001_5400#;
SAI1 : constant := 16#4001_5800#;
LTDC : constant := 16#4001_6800#;
APB2 : constant Address := To_Address (16#4001_0000#);
TIM1 : constant Address := APB2 + 16#0000#;
TIM8 : constant Address := APB2 + 16#0400#;
USART1 : constant Address := APB2 + 16#1000#;
USART6 : constant Address := APB2 + 16#1400#;
UART9 : constant Address := APB2 + 16#1800#;
UART10 : constant Address := APB2 + 16#1C00#;
ADC1 : constant Address := APB2 + 16#2000#;
ADC2 : constant Address := APB2 + 16#2100#;
ADC3 : constant Address := APB2 + 16#2200#;
ADC_Common : constant Address := APB2 + 16#2300#;
SDIO : constant Address := APB2 + 16#2C00#;
SPI1 : constant Address := APB2 + 16#3000#;
SPI4 : constant Address := APB2 + 16#3400#;
SYSCFG : constant Address := APB2 + 16#3800#;
EXTI : constant Address := APB2 + 16#3C00#;
TIM9 : constant Address := APB2 + 16#4000#;
TIM10 : constant Address := APB2 + 16#4400#;
TIM11 : constant Address := APB2 + 16#4800#;
SPI5 : constant Address := APB2 + 16#5000#;
SPI6 : constant Address := APB2 + 16#5400#;
SAI1 : constant Address := APB2 + 16#5800#;
SAI2 : constant Address := APB2 + 16#5C00#;
DFSDM1 : constant Address := APB2 + 16#6000#;
DFSDM2 : constant Address := APB2 + 16#6400#;
LTDC : constant Address := APB2 + 16#6800#;
-- AHB1
AHB1 : constant := 16#4002_0000#;
GPIOA : constant := 16#4002_0000#;
GPIOB : constant := 16#4002_0400#;
GPIOC : constant := 16#4002_0800#;
GPIOD : constant := 16#4002_0C00#;
GPIOE : constant := 16#4002_1000#;
GPIOF : constant := 16#4002_1400#;
GPIOG : constant := 16#4002_1800#;
GPIOH : constant := 16#4002_1C00#;
GPIOI : constant := 16#4002_2000#;
GPIOJ : constant := 16#4002_2400#;
GPIOK : constant := 16#4002_2800#;
CRC : constant := 16#4002_3000#;
RCC : constant := 16#4002_3800#;
Flash_IR : constant := 16#4002_3C00#;
BKPSRAM : constant := 16#4002_4000#;
DMA1 : constant := 16#4002_6000#;
DMA2 : constant := 16#4002_6400#;
Ethernet_MAC : constant := 16#4002_8000#;
DMA2D : constant := 16#4002_B000#;
USB_OTG_HS : constant := 16#4004_0000#;
AHB1 : constant Address := To_Address (16#4002_0000#);
GPIOA : constant Address := AHB1 + 16#0000#;
GPIOB : constant Address := AHB1 + 16#0400#;
GPIOC : constant Address := AHB1 + 16#0800#;
GPIOD : constant Address := AHB1 + 16#0C00#;
GPIOE : constant Address := AHB1 + 16#1000#;
GPIOF : constant Address := AHB1 + 16#1400#;
GPIOG : constant Address := AHB1 + 16#1800#;
GPIOH : constant Address := AHB1 + 16#1C00#;
GPIOI : constant Address := AHB1 + 16#2000#;
GPIOJ : constant Address := AHB1 + 16#2400#;
GPIOK : constant Address := AHB1 + 16#2800#;
CRC : constant Address := AHB1 + 16#3000#;
RCC : constant Address := AHB1 + 16#3800#;
Flash_IR : constant Address := AHB1 + 16#3C00#;
BKPSRAM : constant Address := AHB1 + 16#4000#;
DMA1 : constant Address := AHB1 + 16#6000#;
DMA2 : constant Address := AHB1 + 16#6400#;
Ethernet_MAC : constant Address := AHB1 + 16#8000#;
DMA2D : constant Address := AHB1 + 16#B000#;
USB_OTG_HS : constant Address := AHB1 + 16#2_0000#;
-- AHB2
AHB2 : constant := 16#5000_0000#;
USB_OTG_FS : constant := 16#5000_0000#;
DCMI : constant := 16#5005_0000#;
CRYP : constant := 16#5006_0000#;
HASH : constant := 16#5006_0400#;
RNG : constant := 16#5006_0800#;
AHB2 : constant Address := To_Address (16#5000_0000#);
USB_OTG_FS : constant Address := AHB2 + 16#0_0000#;
DCMI : constant Address := AHB2 + 16#5_0000#;
CRYP : constant Address := AHB2 + 16#6_0000#;
HASH : constant Address := AHB2 + 16#6_0400#;
RNG : constant Address := AHB2 + 16#6_0800#;
-- AHB 3
AHB3 : constant := 16#6000_0000#;
FMC_Bank_1 : constant := 16#6000_0000#;
FSMC_Bank1_1 : constant := 16#6000_0000#;
FSMC_Bank1_2 : constant := 16#6400_0000#;
FSMC_Bank1_3 : constant := 16#6800_0000#;
FSMC_Bank1_4 : constant := 16#6C00_0000#;
FMC_Bank_2 : constant := 16#7000_0000#;
FMC_Bank_3 : constant := 16#8000_0000#;
FMC_Bank_4 : constant := 16#9000_0000#;
FMC_FSMC : constant := 16#A000_0000#;
FMC_Bank_5 : constant := 16#C000_0000#;
FMC_Bank_6 : constant := 16#D000_0000#;
AHB3 : constant Address := To_Address (16#6000_0000#);
FMC_Bank_1 : constant Address := AHB3;
FSMC_Bank1_1 : constant Address := FMC_Bank_1;
FSMC_Bank1_2 : constant Address := FMC_Bank_1 + 16#0400_0000#;
FSMC_Bank1_3 : constant Address := FMC_Bank_1 + 16#0800_0000#;
FSMC_Bank1_4 : constant Address := FMC_Bank_1 + 16#0C00_0000#;
FMC_Bank_2 : constant Address := AHB3 + 16#1000_0000#;
FMC_Bank_3 : constant Address := AHB3 + 16#2000_0000#;
FMC_Bank_4 : constant Address := AHB3 + 16#3000_0000#;
FMC_FSMC : constant Address := AHB3 + 16#4000_0000#;
FMC_Bank_5 : constant Address := AHB3 + 16#6000_0000#;
FMC_Bank_6 : constant Address := AHB3 + 16#7000_0000#;
CPU_Internal : constant Address := To_Address (16#E000_0000#);
DBG : constant Address := CPU_Internal + 16#4_2000#;
end STM32.Address_Map;

141
library/source/f4/stm32-aes_accelerator.ads Normal file
View File

@ -0,0 +1,141 @@
with STM32.Address_Map;
-- AES Hardware Accelerator
--
-- This module replaces CRYP module in STM32F4x3 devices.
-- It is completely not compatible with CRYP.
package STM32.AES_Accelerator is
-- CR
type Data_Type is (
Data_32_Bit, -- No swapping of data
Data_16_Bit, -- Each word consist of two half-words which are swapped with each other
Data_8_Bit, -- Each word consist of four bytes in reverse order
Data_1_Bit) -- Each word is reversed bit-wise
with Size => 2;
type Operating_Mode is (
Encryption,
Key_Derivation,
Decryption,
Key_Derivation_Single_Decryption)
with Size => 2;
type Chaining_Mode is (
Electronic_Codebook,
Cipher_Block_Chaining,
Counter_Mode,
Galois_Counter_Mode,
Counter_with_CBC_MAC);
type Chaining_Mode_0 is mod 4;
type Chaining_Mode_2 is mod 2;
function To_Mode_0 (Mode : Chaining_Mode) return Chaining_Mode_0 is (
Chaining_Mode_0 (Unsigned_32 (Chaining_Mode'Pos (Mode)) and 2#011#)
);
-- CHMOD0 field value of a given algorithm mode
function To_Mode_2 (Mode : Chaining_Mode) return Chaining_Mode_2 is (
Chaining_Mode_2 (Shift_Right (Unsigned_32 (Chaining_Mode'Pos (Mode)), 2))
);
-- CHMOD3 field value of a given algorithm mode
function To_Mode (Mode_2 : Chaining_Mode_2; Mode_0 : Chaining_Mode_0) return Chaining_Mode is (
Chaining_Mode'Val (Shift_Left (Unsigned_32 (Mode_2), 2) or Unsigned_32 (Mode_0))
);
type Chaining_Phase is (
Init_Phase,
Header_Phase,
Payload_Phase,
Final_Phase)
with Size => 2;
type Key_Size is (
Key_128_Bits,
Key_256_Bits)
with Size => 1;
type Control_Register is record
EN : Boolean := False; -- AES enable
DATATYPE : Data_Type := Data_32_Bit; -- Data type selection (for data
MODE : Operating_Mode := Encryption; -- AES operating mode
CHMOD0 : Chaining_Mode_0 := To_Mode_0 (Electronic_Codebook); -- AES chaining mode
CCFC : Boolean := False; -- CCF clear
ERRC : Boolean := False; -- Error clear
CCFIE : Boolean := False; -- CCF interrupt enable
ERRIE : Boolean := False; -- Error interrupt enable
DMAINEN : Boolean := False; -- Enable DMA input
DMAOUTEN : Boolean := False; -- Enable DMA output
GCMPH : Chaining_Phase := Init_Phase; -- GCM or CCM phase selection
Unused_15 : Unused_1_Bit := 0;
CHMOD2 : Chaining_Mode_2 := To_Mode_2 (Electronic_Codebook); -- AES chaining mode
Unused_17 : Unused_1_Bit := 0;
KEYSIZE : Key_Size := Key_128_Bits; -- Key size selection
Unused_19 : Unused_13_Bits := 0;
end record with Size => 32;
for Control_Register use record
EN at 0 range 0 .. 0;
DATATYPE at 0 range 1 .. 2;
MODE at 0 range 3 .. 4;
CHMOD0 at 0 range 5 .. 6;
CCFC at 0 range 7 .. 7;
ERRC at 0 range 8 .. 8;
CCFIE at 0 range 9 .. 9;
ERRIE at 0 range 10 .. 10;
DMAINEN at 0 range 11 .. 11;
DMAOUTEN at 0 range 12 .. 12;
GCMPH at 0 range 13 .. 14;
Unused_15 at 0 range 15 .. 15;
CHMOD2 at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 17;
KEYSIZE at 0 range 18 .. 18;
Unused_19 at 0 range 19 .. 31;
end record;
-- SR
type Status_Register is record
CCF : Boolean; -- Computation complete flag
RDERR : Boolean; -- Read error flag
WRERR : Boolean; -- Write error flag
BUSY : Boolean; -- Busy flag
Unused_4 : Unused_28_Bits;
end record with Size => 32;
for Status_Register use record
CCF at 0 range 0 .. 0;
RDERR at 0 range 1 .. 1;
WRERR at 0 range 2 .. 2;
BUSY at 0 range 3 .. 3;
Unused_4 at 0 range 4 .. 31;
end record;
-- KEYRx
subtype Key_Index is Integer range 0 .. 3;
type Key_Registers is array (Key_Index) of Unsigned_32 with Size => 32 * 4;
type AES_Registers is record
CR : Control_Register;
SR : Status_Register;
DINR : Unsigned_32;
DOUTR : Unsigned_32;
KEYR : Key_Registers;
IVR : Key_Registers;
end record;
for AES_Registers use record
CR at 16#0# range 0 .. 31;
SR at 16#4# range 0 .. 31;
DINR at 16#8# range 0 .. 31;
DOUTR at 16#C# range 0 .. 31;
KEYR at 16#10# range 0 .. 32 * 4 - 1;
IVR at 16#20# range 0 .. 32 * 4 - 1;
end record;
AES : AES_Registers with Volatile, Import, Address => Address_Map.CRYP;
end STM32.AES_Accelerator;

15
library/source/f4/stm32-adc.ads → library/source/f4/stm32-analog_to_digital_convertors.ads
View File

@ -1,4 +1,10 @@
package STM32.ADC with Pure is
with STM32.Address_Map;
-- Analog to Digital Convertors
--
-- Units exist in all devices. Fx0, Fx1, Fx2, Fx3 devices have 1 ADC, others 3.
package STM32.Analog_to_Digital_Convertors is
-- SR
@ -524,4 +530,9 @@ package STM32.ADC with Pure is
CDR at 16#08# range 0 .. 31;
end record;
end STM32.ADC;
ADC1 : aliased ADC_Registers with Volatile, Import, Address => Address_Map.ADC1;
ADC2 : aliased ADC_Registers with Volatile, Import, Address => Address_Map.ADC2;
ADC3 : aliased ADC_Registers with Volatile, Import, Address => Address_Map.ADC3;
ADC_Common : Common_ADC_Registers with Volatile, Import, Address => Address_Map.ADC_Common;
end STM32.Analog_to_Digital_Convertors;

15
library/source/f4/stm32-can.ads → library/source/f4/stm32-cans.ads
View File

@ -1,4 +1,11 @@
package STM32.CAN with Pure is
with STM32.Address_Map;
-- Controller Area Network Interfaces
--
-- Units exist in all STM32F4 devices except F4x1 and F410.
-- F4x3 devices have 3 CANs all others have 2.
package STM32.CANs is
-- bxCAN hardware
-- Correspondence in register names:
@ -525,4 +532,8 @@ package STM32.CAN with Pure is
FR at 16#0240# range 0 .. 32 * 2 * 28 - 1;
end record;
end STM32.CAN;
CAN1 : aliased CAN_Registers with Volatile, Import, Address => Address_Map.CAN1;
CAN2 : aliased CAN_Registers with Volatile, Import, Address => Address_Map.CAN2;
CAN3 : aliased CAN_Registers with Volatile, Import, Address => Address_Map.CAN3;
end STM32.CANs;

11
library/source/f4/stm32-crc.ads → library/source/f4/stm32-crc_calculation.ads
View File

@ -1,4 +1,8 @@
package STM32.CRC with Pure is
with STM32.Address_Map;
-- CRC Calculation Unit
package STM32.CRC_Calculation is
-- Applies to whole STM32F4xx family
-- IDR
@ -38,4 +42,7 @@ package STM32.CRC with Pure is
IDR at 16#04# range 0 .. 31;
CR at 16#08# range 0 .. 31;
end record;
end STM32.CRC;
CRC : CRC_Registers with Volatile, Import, Address => Address_Map.CRC;
end STM32.CRC_Calculation;

10
library/source/f4/stm32-cryp.ads → library/source/f4/stm32-cryptographic_processor.ads
View File

@ -1,4 +1,8 @@
package STM32.CRYP with Pure is
with STM32.Address_Map;
-- Cryptographic Processor
package STM32.Cryptographic_Processor is
-- Register correspondence
@ -231,4 +235,6 @@ package STM32.CRYP with Pure is
CSGCMR at 16#70# range 0 .. 32 * 8 - 1;
end record;
end STM32.CRYP;
CRYP : CRYP_Registers with Volatile, Import, Address => Address_Map.CRYP;
end STM32.Cryptographic_Processor;

35
library/source/f4/stm32-dbg.ads → library/source/f4/stm32-debug.ads
View File

@ -1,20 +1,28 @@
package STM32.DBG with Pure is
with STM32.Address_Map;
-- Debug support
package STM32.Debug is
-- IDCODE
DEV_ID_STM32F405 : constant := 16#413#;
DEV_ID_STM32F407 : constant := 16#413#;
DEV_ID_STM32F415 : constant := 16#413#;
DEV_ID_STM32F417 : constant := 16#413#;
DEV_ID_STM32F427 : constant := 16#419#;
DEV_ID_STM32F429 : constant := 16#419#;
DEV_ID_STM32F437 : constant := 16#419#;
DEV_ID_STM32F439 : constant := 16#419#;
type Device_ID is mod 2**12;
DEV_ID_STM32F405 : constant Device_ID := 16#413#;
DEV_ID_STM32F407 : constant Device_ID := 16#413#;
DEV_ID_STM32F415 : constant Device_ID := 16#413#;
DEV_ID_STM32F417 : constant Device_ID := 16#413#;
DEV_ID_STM32F427 : constant Device_ID := 16#419#;
DEV_ID_STM32F429 : constant Device_ID := 16#419#;
DEV_ID_STM32F437 : constant Device_ID := 16#419#;
DEV_ID_STM32F439 : constant Device_ID := 16#419#;
type Revision_ID is range 0 .. 2**16 - 1;
type Device_ID_Register is record
DEV_ID : Integer range 0 .. 2**12 - 1; -- Device identifier
Unused_12 : Integer range 0 .. 15;
REV_ID : Integer range 0 .. 2**16 - 1; -- Revision identifier
DEV_ID : Device_ID; -- Device identifier
Unused_12 : Unused_4_Bits;
REV_ID : Revision_ID; -- Revision identifier
end record with Size => 32;
for Device_ID_Register use record
DEV_ID at 0 range 0 .. 11;
@ -155,5 +163,6 @@ package STM32.DBG with Pure is
APB2_FZ at 16#0C# range 0 .. 31;
end record;
end STM32.DBG;
DBG : DBG_Registers with Volatile, Import, Address => Address_Map.DBG;
end STM32.Debug;

9
library/source/f4/stm32-dcmi.ads → library/source/f4/stm32-digital_camera_interface.ads
View File

@ -1,4 +1,8 @@
package STM32.DCMI with Pure is
with STM32.Address_Map;
-- Digital Camera Interface
package STM32.Digital_Camera_Interface is
-- CR
@ -246,5 +250,6 @@ package STM32.DCMI with Pure is
DR at 16#28# range 0 .. 31;
end record;
end STM32.DCMI;
DCMI : DCMI_Registers with Volatile, Import, Address => Address_Map.DCMI;
end STM32.Digital_Camera_Interface;

34
library/source/f4/stm32-dac.ads → library/source/f4/stm32-digital_to_analog_convertors.ads
View File

@ -1,21 +1,27 @@
package STM32.DAC with Pure is
with STM32.Address_Map;
-- Digital to Analog Convertors
--
-- Units exist in all F4 devices except F4x1
package STM32.Digital_to_Analog_Convertors is
-- Correspondence in register names
-- DHR12Rx -- DHR (x).DHR12R
-- DHR12Lx -- DHR (x).DHR12L
-- DHR8Rx -- DHR (x).DHR8R
-- Correspondence in field names
-- ENx -- C (x).EN
-- BOFFx -- C (x).EN
-- TENx -- C (x).EN
-- TSELx -- C (x).EN
-- WAVEx -- C (x).EN
-- MAMPx -- C (x).MAMP
-- DMAENx -- C (x).DMAEN
-- DMAUDRIEx -- C (x).DMAUDRIE
-- DACCxDHR -- (x) (12-bit)
-- DACCxHDR -- DACCHDR (x) (8-bit)
-- DMAUDRx -- (x).DMAUDR
-- ENx -- CR (x).EN
-- BOFFx -- CR (x).BOFF
-- TENx -- CR (x).TEN
-- TSELx -- CR (x).TSEL
-- WAVEx -- CR (x).WAVE
-- MAMPx -- CR (x).MAMP
-- DMAENx -- CR (x).DMAEN
-- DMAUDRIEx -- CR (x).DMAUDRIE
-- DACCxDHR -- DHR12* (x) (12-bit)
-- DACCxHDR -- DHR8RD.DACCHDR (x) (8-bit)
-- DMAUDRx -- SR (x).DMAUDR
-- CR
@ -173,4 +179,6 @@ package STM32.DAC with Pure is
SR at 16#34# range 0 .. 31;
end record;
end STM32.DAC;
DAC : DAC_Registers with Volatile, Import, Address => Address_Map.DAC;
end STM32.Digital_to_Analog_Convertors;

129
library/source/f4/stm32-dma.ads → library/source/f4/stm32-direct_memory_access.ads
View File

@ -1,4 +1,8 @@
package STM32.DMA with Pure is
with STM32.Address_Map;
-- DMA Controller
package STM32.Direct_Memory_Access is
-- LISR, HISR, LIFCR, HIFCR
-- This Register definition is a bit weird,
@ -37,16 +41,16 @@ package STM32.DMA with Pure is
array (Integer range 0 .. 1) of Interrupt_Status_Register;
-- SxCR
type Data_Transfer_Direction is (
Peripherial_to_Memory,
Memory_to_Peripherial,
Memory_to_Memory
type Transfer_Direction is (
Peripheral_to_Memory, -- Peripheral to Memory Transfer
Memory_to_Peripheral, -- Memory to Peripheral Transfer
Memory_to_Memory -- Memory to Memory Transfer (only available on DMA2)
) with Size => 2;
for Data_Transfer_Direction use (
Peripherial_to_Memory => 2#00#,
Memory_to_Peripherial => 2#01#,
Memory_to_Memory => 2#10#
for Transfer_Direction use (
Peripheral_to_Memory => 2#00#,
Memory_to_Peripheral => 2#01#,
Memory_to_Memory => 2#10#
);
type Data_Size is (
@ -61,6 +65,10 @@ package STM32.DMA with Pure is
Word => 2#10#
);
subtype Priority_Level is Integer range 0 .. 3;
subtype Target_Memory is Integer range 0 .. 1;
type Burst_Transfer is (
Single,
INCR4,
@ -68,59 +76,54 @@ package STM32.DMA with Pure is
INCR16
) with Size => 2;
for Burst_Transfer use (
Single => 2#00#,
INCR4 => 2#01#,
INCR8 => 2#10#,
INCR16 => 2#11#
);
subtype Channel_Number is Integer range 0 .. 15;
-- note: channels 8 .. 15 are only available on F4x3 devices
type Stream_Configuration_Register is record
EN : Boolean;
DMEIE : Boolean;
TEIE : Boolean;
HTIE : Boolean;
TCIE : Boolean;
PFCTRL : Boolean;
DIR : Data_Transfer_Direction;
CIRC : Boolean;
PINC : Boolean;
MINC : Boolean;
PSIZE : Data_Size;
MSIZE : Data_Size;
PINCOS : Boolean;
PL : Integer range 0 .. 3;
DBM : Boolean;
CT : Integer range 0 .. 1;
Reserved_20 : Integer range 0 .. 1;
PBURST : Burst_Transfer;
MBURST : Burst_Transfer;
CHSEL : Integer range 0 .. 7;
Reserved_28 : Integer range 0 .. 2**4 - 1;
EN : Boolean := False;
DMEIE : Boolean := False;
TEIE : Boolean := False;
HTIE : Boolean := False;
TCIE : Boolean := False;
PFCTRL : Boolean := False;
DIR : Transfer_Direction := Peripheral_to_Memory;
CIRC : Boolean := False;
PINC : Boolean := False;
MINC : Boolean := False;
PSIZE : Data_Size := Byte;
MSIZE : Data_Size := Byte;
PINCOS : Boolean := False;
PL : Priority_Level := 0;
DBM : Boolean := False;
CT : Target_Memory := 0;
Unused_20 : Unused_1_Bit := 0;
PBURST : Burst_Transfer := Single;
MBURST : Burst_Transfer := Single;
CHSEL : Channel_Number := 0;
Unused_29 : Unused_3_Bits := 0;
end record with Size => 32;
for Stream_Configuration_Register use record
EN at 0 range 0 .. 0;
DMEIE at 0 range 1 .. 1;
TEIE at 0 range 2 .. 2;
HTIE at 0 range 3 .. 3;
TCIE at 0 range 4 .. 4;
PFCTRL at 0 range 5 .. 5;
DIR at 0 range 6 .. 7;
CIRC at 0 range 8 .. 8;
PINC at 0 range 9 .. 9;
MINC at 0 range 10 .. 10;
PSIZE at 0 range 11 .. 12;
MSIZE at 0 range 13 .. 14;
PINCOS at 0 range 15 .. 15;
PL at 0 range 16 .. 17;
DBM at 0 range 18 .. 18;
CT at 0 range 19 .. 19;
Reserved_20 at 0 range 20 .. 20;
PBURST at 0 range 21 .. 22;
MBURST at 0 range 23 .. 24;
CHSEL at 0 range 25 .. 27;
Reserved_28 at 0 range 28 .. 31;
EN at 0 range 0 .. 0;
DMEIE at 0 range 1 .. 1;
TEIE at 0 range 2 .. 2;
HTIE at 0 range 3 .. 3;
TCIE at 0 range 4 .. 4;
PFCTRL at 0 range 5 .. 5;
DIR at 0 range 6 .. 7;
CIRC at 0 range 8 .. 8;
PINC at 0 range 9 .. 9;
MINC at 0 range 10 .. 10;
PSIZE at 0 range 11 .. 12;
MSIZE at 0 range 13 .. 14;
PINCOS at 0 range 15 .. 15;
PL at 0 range 16 .. 17;
DBM at 0 range 18 .. 18;
CT at 0 range 19 .. 19;
Unused_20 at 0 range 20 .. 20;
PBURST at 0 range 21 .. 22;
MBURST at 0 range 23 .. 24;
CHSEL at 0 range 25 .. 28;
Unused_29 at 0 range 29 .. 31;
end record;
-- NDTR
@ -192,8 +195,8 @@ package STM32.DMA with Pure is
pragma Volatile_Full_Access(CR);
NDTR : Stream_Number_Of_Data_Register;
pragma Volatile_Full_Access(NDTR);
PAR : Address_Register;
MAR : Memory_Address_Register_Pair;
PAR : Address_Register; -- Address in peripheral and also source in MtM transfer
MAR : Memory_Address_Register_Pair; -- Address in memory to transfer
FCR : FIFO_Control_Register;
pragma Volatile_Full_Access(FCR);
end record with Size => DMA_Stream_Registers_Size, Volatile;
@ -221,4 +224,8 @@ package STM32.DMA with Pure is
IFCR at 16#08# range 0 .. 63;
S at 16#10# range 0 .. DMA_Streams * DMA_Stream_Registers_Size - 1;
end record;
end STM32.DMA;
DMA1 : DMA_Registers with Volatile, Import, Address => Address_Map.DMA1;
DMA2 : DMA_Registers with Volatile, Import, Address => Address_Map.DMA2;
end STM32.Direct_Memory_Access;

10
library/source/f4/stm32-flash.ads → library/source/f4/stm32-embedded_flash.ads
View File

@ -1,4 +1,8 @@
package STM32.FLASH with Pure is
with STM32.Address_Map;
-- Embedded Flash Memory Interface
package STM32.Embedded_Flash is
-- ACR
type Access_Control_Register is record
@ -251,4 +255,6 @@ package STM32.FLASH with Pure is
OPTCR1 at 16#18# range 0 .. 31;
end record;
end STM32.FLASH;
FLASH : Flash_Registers with Volatile, Import, Address => Address_Map.Flash_IR;
end STM32.Embedded_Flash;

8
library/source/f4/stm32-external_interrupts.ads
View File

@ -1,4 +1,8 @@
package STM32.External_Interrupts with Preelaborate is
with STM32.Address_Map;
-- External Interrupts and Events Controller
package STM32.External_Interrupts is
subtype Line_Number is Integer range 0 .. 31;
package Lines is
@ -40,4 +44,6 @@ package STM32.External_Interrupts with Preelaborate is
PR at 16#14# range 0 .. 31;
end record;
EXTI : EXTI_Registers with Volatile, Import, Address => Address_Map.EXTI;
end STM32.External_Interrupts;

21
library/source/f4/stm32-f407-adc.ads
View File

@ -1,21 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.ADC;
package STM32.F407.ADC is
package Base renames STM32.ADC;
ADC1 : Base.ADC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.ADC1);
ADC2 : Base.ADC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.ADC2);
ADC3 : Base.ADC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.ADC3);
ADC_Common : Base.Common_ADC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.ADC_Common);
end STM32.F407.ADC;

15
library/source/f4/stm32-f407-can.ads
View File

@ -1,15 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.CAN;
package STM32.F407.CAN is
package Base renames STM32.CAN;
CAN1 : Base.CAN_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.CAN1);
CAN2 : Base.CAN_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.CAN2);
end STM32.F407.CAN;

12
library/source/f4/stm32-f407-external_interrupts.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.External_Interrupts;
package STM32.F407.External_Interrupts is
package EXTI_Base renames STM32.External_Interrupts;
EXTI : EXTI_Base.EXTI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.EXTI);
end STM32.F407.External_Interrupts;

12
library/source/f4/stm32-f407-fsmc.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.FSMC;
package STM32.F407.FSMC is
package Base renames STM32.FSMC;
FSMC_HW : Base.FSMC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.FMC_FSMC);
end STM32.F407.FSMC;

36
library/source/f4/stm32-f407-gpio.ads
View File

@ -1,36 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.GPIO;
package STM32.F407.GPIO is
package GPIO_Base renames STM32.GPIO;
GPIOA : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOA);
GPIOB : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOB);
GPIOC : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOC);
GPIOD : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOD);
GPIOE : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOE);
GPIOF : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOF);
GPIOG : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOG);
GPIOH : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOH);
GPIOI : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOI);
end STM32.F407.GPIO;

12
library/source/f4/stm32-f407-power.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.Power;
package STM32.F407.Power is
package Base renames STM32.Power;
PWR : Base.PWR_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.PWR);
end STM32.F407.Power;

14
library/source/f4/stm32-f407-reset_and_clock.ads
View File

@ -1,14 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.Reset_and_Clock;
package STM32.F407.Reset_and_Clock is
package RCC_Base renames STM32.Reset_and_Clock;
package Index renames RCC_Base.Index;
RCC : RCC_Base.RCC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.RCC);
end STM32.F407.Reset_and_Clock;

529
library/source/f4/stm32-f407-rtc.ads
View File

@ -1,529 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
package STM32.F407.RTC is
-- This RTC is used in f405, f407, f415, f417, f427, f429, f437, f439, f446 and f469 devices
package Base is
-- TR, TSTR
type Time_Register is record
SU : Integer range 0 .. 9 := 0; -- Second units in BCD format
ST : Integer range 0 .. 5 := 0; -- Second tens in BCD format
Unused_7 : Integer range 0 .. 1 := 0;
MNU : Integer range 0 .. 9 := 0; -- Minute units in BCD format
MNT : Integer range 0 .. 5 := 0; -- Minute tens in BCD format
Unused_15 : Integer range 0 .. 1 := 0;
HU : Integer range 0 .. 9 := 0; -- Hour units in BCD format
HT : Integer range 0 .. 3 := 0; -- Hour tens in BCD format
PM : Boolean := False; -- AM/PM notation
Unused_23 : Integer range 0 .. 2**9 - 1 := 0;
end record with Size => 32;
for Time_Register use record
SU at 0 range 0 .. 3;
ST at 0 range 4 .. 6;
Unused_7 at 0 range 7 .. 7;
MNU at 0 range 8 .. 11;
MNT at 0 range 12 .. 14;
Unused_15 at 0 range 15 .. 15;
HU at 0 range 16 .. 19;
HT at 0 range 20 .. 21;
PM at 0 range 22 .. 22;
Unused_23 at 0 range 23 .. 31;
end record;
-- DR, TSDR
Monday : constant Integer := 1;
Tuesday : constant Integer := 2;
Wednesday : constant Integer := 3;
Thursday : constant Integer := 4;
Friday : constant Integer := 5;
Saturday : constant Integer := 6;
Sunday : constant Integer := 7;
type Date_Register is record
DU : Integer range 0 .. 9 := 1; -- Date units in BCD format
DT : Integer range 0 .. 3 := 0; -- Date tens in BCD format
Reserved_6 : Integer range 0 .. 3 := 0;
MU : Integer range 0 .. 9 := 1; -- Month units in BCD format
MT : Integer range 0 .. 1 := 0; -- Month tens in BCD format
WDU : Integer range 0 .. 7 := 1; -- Week day units
YU : Integer range 0 .. 9 := 0; -- Year units in BCD format
YT : Integer range 0 .. 9 := 0; -- Year tens in BCD format
Reserved_24 : Integer range 0 .. 2**8 - 1 := 0;
end record with Size => 32;
for Date_Register use record
DU at 0 range 0 .. 3;
DT at 0 range 4 .. 5;
Reserved_6 at 0 range 6 .. 7;
MU at 0 range 8 .. 11;
MT at 0 range 12 .. 12;
WDU at 0 range 13 .. 15;
YU at 0 range 16 .. 19;
YT at 0 range 20 .. 23;
Reserved_24 at 0 range 24 .. 31;
end record;
-- CR
type Wakeup_Clock is (
RTC_Div_16,
RTC_Div_8,
RTC_Div_4,
RTC_Div_2,
CK_SPRE,
CK_SPRE_A,
CK_SPRE_Add_2_Power_16,
CK_SPRE_Add_2_Power_16_A
) with Size => 3;
for Wakeup_Clock use (
RTC_Div_16 => 2#000#,
RTC_Div_8 => 2#001#,
RTC_Div_4 => 2#010#,
RTC_Div_2 => 2#011#,
CK_SPRE => 2#100#,
CK_SPRE_A => 2#101#,
CK_SPRE_Add_2_Power_16 => 2#110#,
CK_SPRE_Add_2_Power_16_A => 2#111#
);
type Timestamp_Edge is (
Rising_Edge,
Falling_Edge
) with Size => 1;
for Timestamp_Edge use (
Rising_Edge => 0,
Falling_Edge => 1
);
type Hour_Format is (
Hour_24,
Hour_AM_PM
) with Size => 1;
for Hour_Format use (
Hour_24 => 0,
Hour_AM_PM => 1
);
type Output_Polarity is (
Active_High,
Active_Low
) with Size => 1;
for Output_Polarity use (
Active_High => 0,
Active_Low => 1
);
-- Note assignment (not compatible with LTDC and DCMI)
type Alarm_Output is (
Alarm_Disabled,
Alarm_A,
Alarm_B,
Wakeup
) with Size => 2;
for Alarm_Output use (
Alarm_Disabled => 2#00#,
Alarm_A => 2#01#,
Alarm_B => 2#10#,
Wakeup => 2#11#
);
type Control_Register is record
WCKSEL : Wakeup_Clock := RTC_Div_16; -- Wakeup clock selection
TSEDGE : Timestamp_Edge := Rising_Edge; -- Time-stamp event active
REFCKON : Boolean := False; -- Reference clock detection enable
BYPSHAD : Boolean := False; -- Byass the shadow registers
FMT : Hour_Format := Hour_24; -- Hour format
DCE : Boolean := False; -- Coarse digital calibration
ALRAE : Boolean := False; -- Alarm A enable
ALRBE : Boolean := False; -- Alarm B enable
WUTE : Boolean := False; -- Wakeup timer enable
TSE : Boolean := False; -- Time stamp enable
ALRAIE : Boolean := False; -- Alarm A interrupt enable
ALRBIE : Boolean := False; -- Alarm B interrupt enable
WUTIE : Boolean := False; -- Wakeup timer interrupt enable
TSIE : Boolean := False; -- Time-stamp interrupt enable
ADD1H : Boolean := False; -- Add 1 hour (summer time change)
SUB1H : Boolean := False; -- Subtract 1 hour (winter time change)
BKP : Boolean := False; -- Backup
POL : Output_Polarity := Active_High; -- Output polarity
OSEL : Alarm_Output := Alarm_Disabled; -- Output selection
COE : Boolean := False; -- Calibration output enable
Unused_24 : Integer range 0 .. 2**8 - 1 := 0;
end record with Size => 32;
for Control_Register use record
WCKSEL at 0 range 0 .. 2;
TSEDGE at 0 range 3 .. 3;
REFCKON at 0 range 4 .. 4;
BYPSHAD at 0 range 5 .. 5; -- note this does not exist in SVD
FMT at 0 range 6 .. 6;
DCE at 0 range 7 .. 7;
ALRAE at 0 range 8 .. 8;
ALRBE at 0 range 9 .. 9;
WUTE at 0 range 10 .. 10;
TSE at 0 range 11 .. 11;
ALRAIE at 0 range 12 .. 12;
ALRBIE at 0 range 13 .. 13;
WUTIE at 0 range 14 .. 14;
TSIE at 0 range 15 .. 15;
ADD1H at 0 range 16 .. 16;
SUB1H at 0 range 17 .. 17;
BKP at 0 range 18 .. 18;
POL at 0 range 20 .. 20;
OSEL at 0 range 21 .. 22;
COE at 0 range 23 .. 23;
Unused_24 at 0 range 24 .. 31;
end record;
-- ISR
type Initialization_and_Status_Register is record
ALRAWF : Boolean := True; -- Alarm A write flag
ALRBWF : Boolean := True; -- Alarm B write flag
WUTWF : Boolean := True; -- Wakeup timer write flag
SHPF : Boolean := False; -- Shift operation pending
INITS : Boolean := False; -- Initialization status flag
RSF : Boolean := False; -- Registers synchronization
INITF : Boolean := False; -- Initialization flag
INIT : Boolean := False; -- Initialization mode
ALRAF : Boolean := True; -- Alarm A flag
ALRBF : Boolean := True; -- Alarm B flag
WUTF : Boolean := True; -- Wakeup timer flag
TSF : Boolean := True; -- Time-stamp flag
TSOVF : Boolean := True; -- Time-stamp overflow flag
TAMP1F : Boolean := True; -- Tamper detection flag
TAMP2F : Boolean := True; -- TAMPER2 detection flag
Unused_15 : Integer range 0 .. 1 := 0;
RECALPF : Boolean := False; -- Recalibration pending Flag
Unused_17 : Integer range 0 .. 2**15 - 1 := 0;
end record with Size => 32;
for Initialization_and_Status_Register use record
ALRAWF at 0 range 0 .. 0;
ALRBWF at 0 range 1 .. 1;
WUTWF at 0 range 2 .. 2;
SHPF at 0 range 3 .. 3;
INITS at 0 range 4 .. 4;
RSF at 0 range 5 .. 5;
INITF at 0 range 6 .. 6;
INIT at 0 range 7 .. 7;
ALRAF at 0 range 8 .. 8;
ALRBF at 0 range 9 .. 9;
WUTF at 0 range 10 .. 10;
TSF at 0 range 11 .. 11;
TSOVF at 0 range 12 .. 12;
TAMP1F at 0 range 13 .. 13;
TAMP2F at 0 range 14 .. 14;
Unused_15 at 0 range 15 .. 15;
RECALPF at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 31;
end record;
-- PRER
type Prescaler_Register is record
PREDIV_S : Integer range 0 .. 2**15 - 1 := 16#00FF#; -- Synchronous prescaler factor minus 1
Reserved_15 : Integer range 0 .. 1 := 0;
PREDIV_A : Integer range 0 .. 2**7 - 1 := 16#7F#; -- Asynchronous prescaler factor minus 1
Reserved_23 : Integer range 0 .. 2**9 - 1 := 0;
end record with Size => 32;
for Prescaler_Register use record
PREDIV_S at 0 range 0 .. 14;
Reserved_15 at 0 range 15 .. 15;
PREDIV_A at 0 range 16 .. 22;
Reserved_23 at 0 range 23 .. 31;
end record;
-- CALIBR
type Calibration_Sign is (
Increase_Frequency,
Decrease_Frequency
) with Size => 1;
for Calibration_Sign use (
Increase_Frequency => 0,
Decrease_Frequency => 1
);
type CALIBR_Register is record
DC : Integer range 0 .. 31 := 0; -- Digital calibration (by 4 ppm plus / by 2 ppm minus)
Reserved_5 : Integer range 0 .. 3 := 0;
DCS : Calibration_Sign := Increase_Frequency; -- Digital calibration sign
Reserved_8 : Integer range 0 .. 2**24 - 1 := 0;
end record with Size => 32;
for CALIBR_Register use record
DC at 0 range 0 .. 4;
Reserved_5 at 0 range 5 .. 6;
DCS at 0 range 7 .. 7;
Reserved_8 at 0 range 8 .. 31;
end record;
-- ALRMAR, ALRMBR
type Day_Mode is (
Month_Day,
Week_Day
) with Size => 1;
for Day_Mode use (
Month_Day => 0,
Week_Day => 1
);
type Alarm_Register is record
SU : Integer range 0 .. 9 := 0; -- Second units in BCD format
ST : Integer range 0 .. 5 := 0; -- Second tens in BCD format
MSKS : Boolean := False; -- Alarm A seconds mask
MNU : Integer range 0 .. 9 := 0; -- Minute units in BCD format
MNT : Integer range 0 .. 5 := 0; -- Minute tens in BCD format
MSKMN : Boolean := False; -- Alarm A minutes mask
HU : Integer range 0 .. 9 := 0; -- Hour units in BCD format
HT : Integer range 0 .. 2 := 0; -- Hour tens in BCD format
PM : Boolean := False; -- AM/PM notation
MSKH : Boolean := False; -- Alarm A hours mask
DU : Integer range 0 .. 9 := 0; -- Date units or day in BCD
DT : Integer range 0 .. 3 := 0; -- Date tens in BCD format
WDSEL : Day_Mode := Month_Day; -- Week day selection
MSKD : Boolean := False; -- Alarm A date mask
end record with Size => 32;
for Alarm_Register use record
SU at 0 range 0 .. 3;
ST at 0 range 4 .. 6;
MSKS at 0 range 7 .. 7;
MNU at 0 range 8 .. 11;
MNT at 0 range 12 .. 14;
MSKMN at 0 range 15 .. 15;
HU at 0 range 16 .. 19;
HT at 0 range 20 .. 21;
PM at 0 range 22 .. 22;
MSKH at 0 range 23 .. 23;
DU at 0 range 24 .. 27;
DT at 0 range 28 .. 29;
WDSEL at 0 range 30 .. 30;
MSKD at 0 range 31 .. 31;
end record;
-- Note: MSKx flags are renamed to more meaningful names
-- WPR
type Write_Protection_Register is new Unsigned_32 range 0 .. 2**8 - 1;
WPR_Unlock_1 : constant Write_Protection_Register := 16#CA#; -- Unlock sequence step 1
WPR_Unlock_2 : constant Write_Protection_Register := 16#53#; -- Unlock sequence step 2
WPR_Lock : constant Write_Protection_Register := 16#00#; -- Whatever not equal to unlock sequence
-- SHIFTR
type Shift_Control_Register is record
SUBFS : Integer range 0 .. 2**15 - 1 := 0; -- Subtract a fraction of a
Unused_15 : Integer range 0 .. 2**16 - 1 := 0;
ADD1S : Boolean := False; -- Add one second
end record with Size => 32;
for Shift_Control_Register use record
SUBFS at 0 range 0 .. 14;
Unused_15 at 0 range 15 .. 30;
ADD1S at 0 range 31 .. 31;
end record;
-- CALR
type Calibration_Register is record
CALM : Integer range 0 .. 2**9 - 1 := 0; -- Calibration minus decreases frequency by 0.9537 ppm (1/2**20) per one
Unused_9 : Integer range 0 .. 15 := 0;
CALW16 : Boolean := False; -- Use a 16-second calibration cy
CALW8 : Boolean := False; -- Use an 8-second calibration cy
CALP : Boolean := False; -- Increase frequency of RTC by 488.5 ppm (1/2**11)
Unused_16 : Integer range 0 .. 2**16 - 1 := 0;
end record with Size => 32;
for Calibration_Register use record
CALM at 0 range 0 .. 8;
Unused_9 at 0 range 9 .. 12;
CALW16 at 0 range 13 .. 13;
CALW8 at 0 range 14 .. 14;
CALP at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- TAFCR
type Tamper_Level is (
Low_or_Rising,
High_or_Falling
) with Size => 1;
for Tamper_Level use (
Low_or_Rising => 0,
High_or_Falling => 1
);
type Tamper_Filter is (
Tamper_on_Edge,
Tamper_on_2_Samples,
Tamper_on_4_Samples,
Tamper_on_8_Samples
) with Size => 2;
for Tamper_Filter use (
Tamper_on_Edge => 2#00#,
Tamper_on_2_Samples => 2#01#,
Tamper_on_4_Samples => 2#10#,
Tamper_on_8_Samples => 2#11#
);
type Precharge_Duration is (
Precharge_1_Cycle,
Precharge_2_Cycles,
Precharge_4_Cycles,
Precharge_8_Cycles
) with Size => 2;
for Precharge_Duration use (
Precharge_1_Cycle => 2#00#,
Precharge_2_Cycles => 2#01#,
Precharge_4_Cycles => 2#10#,
Precharge_8_Cycles => 2#11#
);
type Pin_Mapping is (
AF1,
AF2
) with Size => 1;
for Pin_Mapping use (
AF1 => 0,
AF2 => 1
);
type Alarm_Output_Type is (
Open_Drain,
Push_Pull
) with Size => 1;
for Alarm_Output_Type use (
Open_Drain => 0,
Push_Pull => 1
);
type Tamper_and_Alternate_Function_Register is record
TAMP1E : Boolean := False; -- Tamper 1 detection enable
TAMP1TRG : Tamper_Level := Low_or_Rising; -- Active level for tamper 1
TAMPIE : Boolean := False; -- Tamper interrupt enable
TAMP2E : Boolean := False; -- Tamper 2 detection enable
TAMP2TRG : Tamper_Level := Low_or_Rising; -- Active level for tamper 2
TAMPTS : Boolean := False; -- Activate timestamp on tamper d
TAMPFREQ : Integer range 0 .. 7 := 0; -- Tamper sampling frequency equals fRTC / 2**(15 - x)
TAMPFLT : Tamper_Filter := Tamper_on_Edge; -- Tamper filter count
TAMPPRCH : Precharge_Duration := Precharge_1_Cycle; -- Tamper precharge duration
TAMPPUDIS : Boolean := False; -- TAMPER pull-up disable
TAMP1INSEL : Pin_Mapping := AF1; -- TAMPER1 mapping
TSINSEL : Pin_Mapping := AF1; -- TIMESTAMP mapping
ALARMOUTTYPE : Alarm_Output_Type := Open_Drain; -- RTC_ALARM output type
Reserved_19 : Integer range 0 .. 2**13 - 1 := 0;
end record with Size => 32;
for Tamper_and_Alternate_Function_Register use record
TAMP1E at 0 range 0 .. 0;
TAMP1TRG at 0 range 1 .. 1;
TAMPIE at 0 range 2 .. 2;
TAMP2E at 0 range 3 .. 3;
TAMP2TRG at 0 range 4 .. 4;
TAMPTS at 0 range 7 .. 7;
TAMPFREQ at 0 range 8 .. 10;
TAMPFLT at 0 range 11 .. 12;
TAMPPRCH at 0 range 13 .. 14;
TAMPPUDIS at 0 range 15 .. 15;
TAMP1INSEL at 0 range 16 .. 16;
TSINSEL at 0 range 17 .. 17;
ALARMOUTTYPE at 0 range 18 .. 18;
Reserved_19 at 0 range 19 .. 31;
end record;
-- ALRMASSR, ALRMBSSR
type Alarm_Subsecond_Register is record
SS : Integer range 0 .. 2**15 - 1; -- Sub seconds value
Unused_15 : Integer range 0 .. 2**9 - 1;
MASKSS : Integer range 0 .. 15; -- Mask the most-significant bits
Unused_28 : Integer range 0 .. 15;
end record with Size => 32;
for Alarm_Subsecond_Register use record
SS at 0 range 0 .. 14;
Unused_15 at 0 range 15 .. 23;
MASKSS at 0 range 24 .. 27;
Unused_28 at 0 range 28 .. 31;
end record;
-- BKPxR
type Backup_Registers is array (0 .. 19) of Unsigned_32;
type RTC_Registers is record
TR : Time_Register;
pragma Volatile_Full_Access(TR);
DR : Date_Register;
pragma Volatile_Full_Access(DR);
CR : Control_Register;
pragma Volatile_Full_Access(CR);
ISR : Initialization_and_Status_Register;
pragma Volatile_Full_Access(ISR);
PRER : Prescaler_Register;
pragma Volatile_Full_Access(PRER);
WUTR : Integer range 0 .. 2**16 - 1 := 16#FFFF#;
pragma Volatile_Full_Access(WUTR);
CALIBR : CALIBR_Register;
pragma Volatile_Full_Access(CALIBR);
ALRMAR : Alarm_Register;
pragma Volatile_Full_Access(ALRMAR);
ALRMBR : Alarm_Register;
pragma Volatile_Full_Access(ALRMBR);
WPR : Write_Protection_Register;
pragma Volatile_Full_Access(WPR);
SSR : Integer range 0 .. 2**16 - 1;
pragma Volatile_Full_Access(SSR);
SHIFTR : Shift_Control_Register;
pragma Volatile_Full_Access(SHIFTR);
TSTR : Time_Register;
pragma Volatile_Full_Access(TSTR);
TSDR : Date_Register;
pragma Volatile_Full_Access(TSDR);
TSSSR : Integer range 0 .. 2**16 - 1;
pragma Volatile_Full_Access(TSSSR);
CALR : Calibration_Register;
pragma Volatile_Full_Access(CALR);
TAFCR : Tamper_and_Alternate_Function_Register;
pragma Volatile_Full_Access(TAFCR);
ALRMASSR : Alarm_Subsecond_Register;
pragma Volatile_Full_Access(ALRMASSR);
ALRMBSSR : Alarm_Subsecond_Register;
pragma Volatile_Full_Access(ALRMBSSR);
BKPR : Backup_Registers;
end record;
for RTC_Registers use record
TR at 16#00# range 0 .. 31;
DR at 16#04# range 0 .. 31;
CR at 16#08# range 0 .. 31;
ISR at 16#0C# range 0 .. 31;
PRER at 16#10# range 0 .. 31;
WUTR at 16#14# range 0 .. 31;
CALIBR at 16#18# range 0 .. 31;
ALRMAR at 16#1C# range 0 .. 31;
ALRMBR at 16#20# range 0 .. 31;
WPR at 16#24# range 0 .. 31;
SSR at 16#28# range 0 .. 31;
SHIFTR at 16#2C# range 0 .. 31;
TSTR at 16#30# range 0 .. 31;
TSDR at 16#34# range 0 .. 31;
TSSSR at 16#38# range 0 .. 31;
CALR at 16#3C# range 0 .. 31;
TAFCR at 16#40# range 0 .. 31;
ALRMASSR at 16#44# range 0 .. 31;
ALRMBSSR at 16#48# range 0 .. 31;
BKPR at 16#50# range 0 .. 32 * 20 - 1;
end record;
end Base;
RTC_HW : Base.RTC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (Address_Map.RTC_and_BKP);
end STM32.F407.RTC;

18
library/source/f4/stm32-f407-spis.ads
View File

@ -1,18 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.SPIs;
package STM32.F407.SPIs is
package SPI_Base renames STM32.SPIs;
SPI1 : aliased SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI1);
SPI2 : aliased SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI2_I2S2);
SPI3 : aliased SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI3_I2S3);
end STM32.F407.SPIs;

12
library/source/f4/stm32-f407-system_configuration.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.System_Configuration;
package STM32.F407.System_Configuration is
package SYSCFG_Base renames STM32.System_Configuration;
SYSCFG : SYSCFG_Base.SYSCFG_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SYSCFG);
end STM32.F407.System_Configuration;

51
library/source/f4/stm32-f407-tim.ads
View File

@ -1,51 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.Timers;
package STM32.F407.TIM is
package Base renames STM32.Timers;
TIM1: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM1);
TIM2: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM2);
TIM3: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM3);
TIM4: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM4);
TIM5: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM5);
TIM6: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM6);
TIM7: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM7);
TIM8: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM8);
TIM9: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM9);
TIM10: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM10);
TIM11: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM11);
TIM12: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM12);
TIM13: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM13);
TIM14: aliased Base.Timer_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.TIM14);
end STM32.F407.TIM;

27
library/source/f4/stm32-f407-usarts.ads
View File

@ -1,27 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.USARTs;
package STM32.F407.USARTs is
package USART_Base renames STM32.USARTs;
USART1: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART1);
USART2: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART2);
USART3: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART3);
UART4: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART4);
UART5: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART5);
USART6: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART6);
end STM32.F407.USARTs;

3
library/source/f4/stm32-f429-adc.ads
View File

@ -1,3 +0,0 @@
with STM32.F407.ADC;
package STM32.F429.ADC renames STM32.F407.ADC;

3
library/source/f4/stm32-f429-can.ads
View File

@ -1,3 +0,0 @@
with STM32.F407.CAN;
package STM32.F429.CAN renames STM32.F407.CAN;

12
library/source/f4/stm32-f429-crc.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.CRC;
package STM32.F429.CRC is
package Base renames STM32.CRC;
CRC_HW : Base.CRC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.CRC);
end STM32.F429.CRC;

12
library/source/f4/stm32-f429-cryp.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.CRYP;
package STM32.F429.CRYP is
package Base renames STM32.CRYP;
CRYP_HW : Base.CRYP_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.CRYP);
end STM32.F429.CRYP;

12
library/source/f4/stm32-f429-dac.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.DAC;
package STM32.F429.DAC is
package Base renames STM32.DAC;
DAC_HW : Base.DAC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.DAC);
end STM32.F429.DAC;

12
library/source/f4/stm32-f429-dcmi.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.DCMI;
package STM32.F429.DCMI is
package Base renames STM32.DCMI;
DCMI_HW : Base.DCMI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.DCMI);
end STM32.F429.DCMI;

12
library/source/f4/stm32-f429-dma2d.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.DMA2D;
package STM32.F429.DMA2D is
package Base renames STM32.DMA2D;
DMA2D_HW : Base.DMA2D_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.DMA2D);
end STM32.F429.DMA2D;

3
library/source/f4/stm32-f429-external_interrupts.ads
View File

@ -1,3 +0,0 @@
with STM32.F407.External_Interrupts;
package STM32.F429.External_Interrupts renames STM32.F407.External_Interrupts;

12
library/source/f4/stm32-f429-fmc.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.FMC;
package STM32.F429.FMC is
package Base renames STM32.FMC;
FMC_HW : Base.FMC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.FMC_FSMC);
end STM32.F429.FMC;

42
library/source/f4/stm32-f429-gpio.ads
View File

@ -1,42 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.GPIO;
package STM32.F429.GPIO is
package GPIO_Base renames STM32.GPIO;
GPIOA : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOA);
GPIOB : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOB);
GPIOC : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOC);
GPIOD : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOD);
GPIOE : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOE);
GPIOF : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOF);
GPIOG : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOG);
GPIOH : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOH);
GPIOI : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOI);
GPIOJ : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOJ);
GPIOK : GPIO_Base.GPIO_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.GPIOK);
end STM32.F429.GPIO;

12
library/source/f4/stm32-f429-hash.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.HASH;
package STM32.F429.HASH is
package Base renames STM32.HASH;
HASH_HW : Base.HASH_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.HASH);
end STM32.F429.HASH;

18
library/source/f4/stm32-f429-i2cs.ads
View File

@ -1,18 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.I2Cs;
package STM32.F429.I2Cs is
package I2C_Base renames STM32.I2Cs;
I2C1 : I2C_Base.I2C_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.I2C1);
I2C2 : I2C_Base.I2C_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.I2C2);
I2C3 : I2C_Base.I2C_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.I2C3);
end STM32.F429.I2Cs;

12
library/source/f4/stm32-f429-lcd_tft.ads
View File

@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.LCD_TFT;
package STM32.F429.LCD_TFT is
package LTDC_Base renames STM32.LCD_TFT;
LTDC : LTDC_Base.LTDC_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.LTDC);
end STM32.F429.LCD_TFT;

5
library/source/f4/stm32-f429-power.ads
View File

@ -1,5 +0,0 @@
with STM32.F407.Power;
package STM32.F429.Power renames STM32.F407.Power;
-- todo: differentiate

4
library/source/f4/stm32-f429-reset_and_clock.ads
View File

@ -1,4 +0,0 @@
with STM32.F407.Reset_and_Clock;
package STM32.F429.Reset_and_Clock renames STM32.F407.Reset_and_Clock;
-- todo: differentiate

30
library/source/f4/stm32-f429-spis.ads
View File

@ -1,30 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.SPIs;
package STM32.F429.SPIs is
package SPI_Base renames STM32.SPIs;
SPI1 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI1);
SPI2 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI2_I2S2);
SPI3 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI3_I2S3);
SPI4 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI4);
SPI5 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI5);
SPI6 : SPI_Base.SPI_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.SPI6);
I2S2 : SPI_Base.SPI_Registers renames SPI2;
I2S3 : SPI_Base.SPI_Registers renames SPI3;
end STM32.F429.SPIs;

5
library/source/f4/stm32-f429-system_configuration.ads
View File

@ -1,5 +0,0 @@
with STM32.F407.System_Configuration;
package STM32.F429.System_Configuration renames STM32.F407.System_Configuration;
-- todo: differentiate

33
library/source/f4/stm32-f429-usarts.ads
View File

@ -1,33 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.USARTs;
package STM32.F429.USARTs is
package USART_Base renames STM32.USARTs;
USART1: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART1);
USART2: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART2);
USART3: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART3);
UART4: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART4);
UART5: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART5);
USART6: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.USART6);
UART7: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART7);
UART8: aliased USART_Base.USART_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address(Address_Map.UART8);
end STM32.F429.USARTs;

111
library/source/f4/stm32-fmpi2c.ads → library/source/f4/stm32-fast_mode_plus_i2cs.ads
View File

@ -1,54 +1,61 @@
package STM32.FMPI2C with Pure is
with STM32.Address_Map;
-- Fast Mode+ I2C controllers
--
-- These units exist in models F410, F412, F413, F423 and F446.
-- They're identical through all listed models.
package STM32.Fast_Mode_Plus_I2Cs is
-- CR1
type Control_Register_1 is record
PE : Boolean := False; -- Peripheral inable
TXIE : Boolean := False; -- Transmitter interrupt enable
RXIE : Boolean := False; -- Receiver interrupt enable
ADDRE : Boolean := False; -- Address match interrupt enable
NACKIE : Boolean := False; -- Not acknowledge interrupt enable
STOPIE : Boolean := False; -- Stop detection interrupt enable
TCIE : Boolean := False; -- Transfer complete interrupt enable
ERRIE : Boolean := False; -- Error detection interrupts enable
DNF : Integer range 0 .. 15 := 0; -- Digital filter period
ANFOFF : Boolean := False; -- Disable analog noise filter
Reserved_13 : Integer range 0 .. 1 := 0;
TXDMAEN : Boolean := False; -- Transmit DMA requests enable
RXDMAEN : Boolean := False; -- Receive DMA resuqests enable
SBC : Boolean := False; -- Slave byte control
NOSTRETCH : Boolean := False; -- Clock stretching disable
WUPEN : Boolean := False; -- Undocumented?
GCEN : Boolean := False; -- General call ACK enable
SMBHEN : Boolean := False; -- SMBus host address enable
SMBDEN : Boolean := False; -- SMBus device default address enable
ALERTEN : Boolean := False; -- SMBus alert enable
PECEN : Boolean := False; -- PEC calculation enable
Reserved_24 : Integer range 0 .. 2**8 - 1 := 0;
PE : Boolean := False; -- Peripheral inable
TXIE : Boolean := False; -- Transmitter interrupt enable
RXIE : Boolean := False; -- Receiver interrupt enable
ADDRE : Boolean := False; -- Address match interrupt enable
NACKIE : Boolean := False; -- Not acknowledge interrupt enable
STOPIE : Boolean := False; -- Stop detection interrupt enable
TCIE : Boolean := False; -- Transfer complete interrupt enable
ERRIE : Boolean := False; -- Error detection interrupts enable
DNF : Integer range 0 .. 15 := 0; -- Digital filter period
ANFOFF : Boolean := False; -- Disable analog noise filter
Unused_13 : Unused_1_Bit := 0;
TXDMAEN : Boolean := False; -- Transmit DMA requests enable
RXDMAEN : Boolean := False; -- Receive DMA resuqests enable
SBC : Boolean := False; -- Slave byte control
NOSTRETCH : Boolean := False; -- Clock stretching disable
WUPEN : Boolean := False; -- Undocumented?
GCEN : Boolean := False; -- General call ACK enable
SMBHEN : Boolean := False; -- SMBus host address enable
SMBDEN : Boolean := False; -- SMBus device default address enable
ALERTEN : Boolean := False; -- SMBus alert enable
PECEN : Boolean := False; -- PEC calculation enable
Unused_24 : Unused_8_Bits := 0;
end record with Size => 32;
for Control_Register_1 use record
PE at 0 range 0 .. 0;
TXIE at 0 range 1 .. 1;
RXIE at 0 range 2 .. 2;
ADDRE at 0 range 3 .. 3;
NACKIE at 0 range 4 .. 4;
STOPIE at 0 range 5 .. 5;
TCIE at 0 range 6 .. 6;
ERRIE at 0 range 7 .. 7;
DNF at 0 range 8 .. 11;
ANFOFF at 0 range 12 .. 12;
Reserved_13 at 0 range 13 .. 13;
TXDMAEN at 0 range 14 .. 14;
RXDMAEN at 0 range 15 .. 15;
SBC at 0 range 16 .. 16;
NOSTRETCH at 0 range 17 .. 17;
WUPEN at 0 range 18 .. 18;
GCEN at 0 range 19 .. 19;
SMBHEN at 0 range 20 .. 20;
SMBDEN at 0 range 21 .. 21;
ALERTEN at 0 range 22 .. 22;
PECEN at 0 range 23 .. 23;
Reserved_24 at 0 range 24 .. 31;
for Control_Register_1 use record -- F410,F412 F4x3,F446
PE at 0 range 0 .. 0; -- + +
TXIE at 0 range 1 .. 1; -- + +
RXIE at 0 range 2 .. 2; -- + +
ADDRE at 0 range 3 .. 3; -- + +
NACKIE at 0 range 4 .. 4; -- + +
STOPIE at 0 range 5 .. 5; -- + +
TCIE at 0 range 6 .. 6; -- + +
ERRIE at 0 range 7 .. 7; -- + +
DNF at 0 range 8 .. 11; -- + +
ANFOFF at 0 range 12 .. 12; -- + +
Unused_13 at 0 range 13 .. 13;
TXDMAEN at 0 range 14 .. 14; -- + +
RXDMAEN at 0 range 15 .. 15; -- + +
SBC at 0 range 16 .. 16; -- + +
NOSTRETCH at 0 range 17 .. 17; -- + +
WUPEN at 0 range 18 .. 18; -- + -
GCEN at 0 range 19 .. 19; -- + +
SMBHEN at 0 range 20 .. 20; -- + +
SMBDEN at 0 range 21 .. 21; -- + +
ALERTEN at 0 range 22 .. 22; -- + +
PECEN at 0 range 23 .. 23; -- + +
Unused_24 at 0 range 24 .. 31;
end record;
-- CR2
@ -254,7 +261,7 @@ package STM32.FMPI2C with Pure is
--
type I2C4_Registers is record
type FMPI2C_Registers is record
CR1 : Control_Register_1;
pragma Volatile_Full_Access (CR1);
CR2 : Control_Register_2;
@ -278,7 +285,7 @@ package STM32.FMPI2C with Pure is
TXDR : Integer range 0 .. 2**8 - 1;
pragma Volatile_Full_Access (TXDR);
end record;
for I2C4_Registers use record
for FMPI2C_Registers use record
CR1 at 16#00# range 0 .. 31;
CR2 at 16#04# range 0 .. 31;
OAR1 at 16#08# range 0 .. 31;
@ -292,5 +299,11 @@ package STM32.FMPI2C with Pure is
TXDR at 16#28# range 0 .. 31;
end record;
end STM32.FMPI2C;
FMPI2C1 : aliased FMPI2C_Registers with Volatile, Import, Address => Address_Map.FMPI2C1;
I2C4 : FMPI2C_Registers renames FMPI2C1;
-- Device user manuals use different names for these units,
-- but they're the same.
end STM32.Fast_Mode_Plus_I2Cs;

156
library/source/f4/stm32-fmc.ads → library/source/f4/stm32-flexible_memory_controller.ads
View File

@ -1,15 +1,15 @@
package STM32.FMC with Pure is
with STM32.Address_Map;
-- Flexible (Static) Memory Controller
package STM32.Flexible_Memory_Controller is
type Memory_Width is (
Memory_8_Bits,
Memory_16_Bits,
Memory_32_Bits -- note: not all devices allow this
Memory_32_Bits, -- note: not all devices allow this
Memory_Width_Unused
) with Size => 2;
for Memory_Width use (
Memory_8_Bits => 2#00#,
Memory_16_Bits => 2#01#,
Memory_32_Bits => 2#10#
);
-- NOR Flash / PSRAM controller registers
@ -62,44 +62,46 @@ package STM32.FMC with Pure is
);
type Chip_Select_Control_Register is record
MBKEN : Boolean;
MUXEN : Boolean;
MTYP : Memory_Type;
MWID : Memory_Width;
FACCEN : Boolean;
Reserved_7 : Integer range 0 .. 1;
BURSTEN : Boolean;
WAITPOL : Signal_Polarity;
WRAPMOD : Boolean;
WAITCFG : Wait_Timing;
WREN : Boolean;
WAITEN : Boolean;
EXTMOD : Boolean;
ASYNCWAIT : Boolean;
CPSIZE : CRAM_Page_Size;
CBURSTRW : Boolean;
CCLKEN : Boolean; -- (not available in all versions)
Reserved_21 : Integer range 0 .. 2**11 - 1;
MBKEN : Boolean;
MUXEN : Boolean;
MTYP : Memory_Type;
MWID : Memory_Width;
FACCEN : Boolean;
Unused_7 : Unused_1_bit := 0;
BURSTEN : Boolean;
WAITPOL : Signal_Polarity;
WRAPMOD : Boolean;
WAITCFG : Wait_Timing;
WREN : Boolean;
WAITEN : Boolean;
EXTMOD : Boolean;
ASYNCWAIT : Boolean;
CPSIZE : CRAM_Page_Size;
CBURSTRW : Boolean;
CCLKEN : Boolean; -- (not available in all versions)
WFDIS : Boolean;
Unused_22 : Unused_10_Bits := 0;
end record with Size => 32;
for Chip_Select_Control_Register use record
MBKEN at 0 range 0 .. 0;
MUXEN at 0 range 1 .. 1;
MTYP at 0 range 2 .. 3;
MWID at 0 range 4 .. 5;
FACCEN at 0 range 6 .. 6;
Reserved_7 at 0 range 7 .. 7;
BURSTEN at 0 range 8 .. 8;
WAITPOL at 0 range 9 .. 9;
WRAPMOD at 0 range 10 .. 10;
WAITCFG at 0 range 11 .. 11;
WREN at 0 range 12 .. 12;
WAITEN at 0 range 13 .. 13;
EXTMOD at 0 range 14 .. 14;
ASYNCWAIT at 0 range 15 .. 15;
CPSIZE at 0 range 16 .. 18;
CBURSTRW at 0 range 19 .. 19;
CCLKEN at 0 range 20 .. 20;
Reserved_21 at 0 range 21 .. 31;
MBKEN at 0 range 0 .. 0;
MUXEN at 0 range 1 .. 1;
MTYP at 0 range 2 .. 3;
MWID at 0 range 4 .. 5;
FACCEN at 0 range 6 .. 6;
Unused_7 at 0 range 7 .. 7;
BURSTEN at 0 range 8 .. 8;
WAITPOL at 0 range 9 .. 9;
WRAPMOD at 0 range 10 .. 10;
WAITCFG at 0 range 11 .. 11;
WREN at 0 range 12 .. 12;
WAITEN at 0 range 13 .. 13;
EXTMOD at 0 range 14 .. 14;
ASYNCWAIT at 0 range 15 .. 15;
CPSIZE at 0 range 16 .. 18;
CBURSTRW at 0 range 19 .. 19;
CCLKEN at 0 range 20 .. 20;
WFDIS at 0 range 21 .. 21;
Unused_22 at 0 range 22 .. 31;
end record;
-- BTRx, also PWTRx
@ -155,7 +157,7 @@ package STM32.FMC with Pure is
NAND_Flash => 1
);
subtype Memory_Width is FMC.Memory_Width range Memory_8_Bits .. Memory_16_Bits;
subtype Memory_Width is Flexible_Memory_Controller.Memory_Width range Memory_8_Bits .. Memory_16_Bits;
type ECC_Page_Size is (
ECC_Page_256_Bytes,
@ -416,65 +418,6 @@ package STM32.FMC with Pure is
end SDRAM;
type FSMC_Registers is record
BCR1 : SRAM.Chip_Select_Control_Register;
BCR2 : SRAM.Chip_Select_Control_Register;
BCR3 : SRAM.Chip_Select_Control_Register;
BCR4 : SRAM.Chip_Select_Control_Register;
BTR1 : SRAM.Chip_Select_Timing_Register;
BTR2 : SRAM.Chip_Select_Timing_Register;
BTR3 : SRAM.Chip_Select_Timing_Register;
BTR4 : SRAM.Chip_Select_Timing_Register;
BWTR1 : SRAM.Chip_Select_Timing_Register;
BWTR2 : SRAM.Chip_Select_Timing_Register;
BWTR3 : SRAM.Chip_Select_Timing_Register;
BWTR4 : SRAM.Chip_Select_Timing_Register;
PCR2 : PC_Card.Control_Register;
PCR3 : PC_Card.Control_Register;
PCR4 : PC_Card.Control_Register;
SR2 : PC_Card.FIFO_Status_and_Interrupt_Register;
SR3 : PC_Card.FIFO_Status_and_Interrupt_Register;
SR4 : PC_Card.FIFO_Status_and_Interrupt_Register;
PMEM2 : PC_Card.Timing_Register;
PMEM3 : PC_Card.Timing_Register;
PMEM4 : PC_Card.Timing_Register;
PATT2 : PC_Card.Timing_Register;
PATT3 : PC_Card.Timing_Register;
PATT4 : PC_Card.Timing_Register;
PIO4 : PC_Card.Timing_Register;
ECCR2 : Unsigned_32;
ECCR3 : Unsigned_32;
end record with Volatile;
for FSMC_Registers use record
BCR1 at 16#0000# range 0 .. 31;
BCR2 at 16#0008# range 0 .. 31;
BCR3 at 16#0010# range 0 .. 31;
BCR4 at 16#0018# range 0 .. 31;
BTR1 at 16#0004# range 0 .. 31;
BTR2 at 16#000C# range 0 .. 31;
BTR3 at 16#0014# range 0 .. 31;
BTR4 at 16#001C# range 0 .. 31;
BWTR1 at 16#0104# range 0 .. 31;
BWTR2 at 16#010C# range 0 .. 31;
BWTR3 at 16#0114# range 0 .. 31;
BWTR4 at 16#011C# range 0 .. 31;
PCR2 at 16#0060# range 0 .. 31;
PCR3 at 16#0080# range 0 .. 31;
PCR4 at 16#00A0# range 0 .. 31;
SR2 at 16#0064# range 0 .. 31;
SR3 at 16#0084# range 0 .. 31;
SR4 at 16#00A4# range 0 .. 31;
PMEM2 at 16#0068# range 0 .. 31;
PMEM3 at 16#0088# range 0 .. 31;
PMEM4 at 16#00A8# range 0 .. 31;
PATT2 at 16#006C# range 0 .. 31;
PATT3 at 16#008C# range 0 .. 31;
PATT4 at 16#00AC# range 0 .. 31;
PIO4 at 16#00B0# range 0 .. 31;
ECCR2 at 16#0074# range 0 .. 31;
ECCR3 at 16#0094# range 0 .. 31;
end record;
type FMC_Registers is record
BCR1 : SRAM.Chip_Select_Control_Register;
BCR2 : SRAM.Chip_Select_Control_Register;
@ -503,6 +446,7 @@ package STM32.FMC with Pure is
PIO4 : PC_Card.Timing_Register;
ECCR2 : Unsigned_32;
ECCR3 : Unsigned_32;
-- Registers below are not available in FSMC
SDCR1 : SDRAM.Control_Register;
SDCR2 : SDRAM.Control_Register;
SDTR1 : SDRAM.Timing_Register;
@ -548,4 +492,8 @@ package STM32.FMC with Pure is
SDSR at 16#0158# range 0 .. 31;
end record;
end STM32.FMC;
FMC : FMC_Registers with Volatile, Import, Address => Address_Map.FMC_FSMC;
FSMC : FMC_Registers renames FMC;
end STM32.Flexible_Memory_Controller;

2
library/source/f4/stm32-flexible_static_memory_controller.ads Normal file
View File

@ -0,0 +1,2 @@
with STM32.Flexible_Memory_Controller;
package STM32.Flexible_Static_Memory_Controller renames STM32.Flexible_Memory_Controller;

2
library/source/f4/stm32-fsmc.ads
View File

@ -1,2 +0,0 @@
with STM32.FMC;
package STM32.FSMC renames STM32.FMC;

4
library/source/f4/stm32-gpio-ports.adb → library/source/f4/stm32-general_purpose_ios-ports.adb
View File

@ -1,4 +1,4 @@
package body STM32.GPIO.Ports is
package body STM32.General_Purpose_IOs.Ports is
package body GPIO_Port_Boolean is
@ -111,4 +111,4 @@ package body STM32.GPIO.Ports is
end;
end GPIO_Port_Modular;
end STM32.GPIO.Ports;
end STM32.General_Purpose_IOs.Ports;

4
library/source/f4/stm32-gpio-ports.ads → library/source/f4/stm32-general_purpose_ios-ports.ads
View File

@ -1,4 +1,4 @@
package STM32.GPIO.Ports is
package STM32.General_Purpose_IOs.Ports is
-- Single GPIO pin
generic
@ -34,4 +34,4 @@ package STM32.GPIO.Ports is
procedure Set_AFR (Value : Alternate_Function) with Inline;
end GPIO_Port_Modular;
end STM32.GPIO.Ports;
end STM32.General_Purpose_IOs.Ports;

20
library/source/f4/stm32-gpio.ads → library/source/f4/stm32-general_purpose_ios.ads
View File

@ -1,4 +1,8 @@
package STM32.GPIO with Pure is
with STM32.Address_Map;
-- General Purpose IO and Pin Function Mapping
package STM32.General_Purpose_IOs is
subtype Port_Bit_Number is Natural range 0 .. 15;
@ -194,4 +198,16 @@ package STM32.GPIO with Pure is
AFR at 16#20# range 0 .. 63;
end record;
end STM32.GPIO;
GPIOA : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOA;
GPIOB : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOB;
GPIOC : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOC;
GPIOD : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOD;
GPIOE : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOE;
GPIOF : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOF;
GPIOG : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOG;
GPIOH : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOH;
GPIOI : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOI;
GPIOJ : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOJ;
GPIOK : aliased GPIO_Registers with Volatile, Import, Address => Address_Map.GPIOK;
end STM32.General_Purpose_IOs;

9
library/source/f4/stm32-dma2d.ads → library/source/f4/stm32-graphic_accelerator.ads
View File

@ -1,7 +1,10 @@
with STM32.Address_Map;
with STM32.Graphics;
use STM32.Graphics;
package STM32.DMA2D with Pure is
-- DMA2D Graphic Accelerator
package STM32.Graphic_Accelerator is
-- CR
type DMA2D_Mode is (
@ -238,4 +241,6 @@ package STM32.DMA2D with Pure is
BGCLUT at 16#0800# range 0 .. 2**8 * 32 - 1;
end record;
end STM32.DMA2D;
DMA2D : DMA2D_Registers with Volatile, Import, Address => Address_Map.DMA2D;
end STM32.Graphic_Accelerator;

756
library/source/f4/stm32-hash.ads
View File

@ -1,756 +0,0 @@
package STM32.HASH with Pure is
-- CR
type Data_Type is (
Data_32_Bit, -- No swapping of data
Data_16_Bit, -- Each word consist of two half-words which are swapped with each other
Data_8_Bit, -- Each word consist of four bytes in reverse order
Data_1_Bit -- Each word is reversed bit-wise
) with Size => 2;
for Data_Type use (
Data_32_Bit => 2#00#,
Data_16_Bit => 2#01#,
Data_8_Bit => 2#10#,
Data_1_Bit => 2#11#
);
type Hash_Mode is (
Hash,
HMAC
) with Size => 1;
for Hash_Mode use (
Hash => 0,
HMAC => 1
);
type Algorithm_0 is mod 2;
type Algorithm_1 is mod 2;
type Algorithm is (
SHA_1,
MD5,
SHA224,
SHA256
) with Size => 2;
for Algorithm use (
SHA_1 => 2#00#,
MD5 => 2#01#,
SHA224 => 2#10#,
SHA256 => 2#11#
);
function To_Algorithm_0 (Algo : Algorithm) return Algorithm_0 is (
Algorithm_0 (Unsigned_32 (Algorithm'Pos (Algo)) and 2#01#)
);
-- ALGO0 field value of a given algorithm
function To_Algorithm_1 (Algo : Algorithm) return Algorithm_1 is (
Algorithm_1 (Shift_Right (Unsigned_32 (Algorithm'Pos (Algo)), 1))
);
-- ALGO1 field value of a given algorithm
function To_Algorithm (Algo_1 : Algorithm_1; Algo_0 : Algorithm_0) return Algorithm is (
Algorithm'Val (Shift_Left (Unsigned_32 (Algo_1), 1) or Unsigned_32 (Algo_0))
);
-- Composes ALGO0 and ALGO1 to a single value of algorithm
type Control_Register is record
Unused_0 : Integer range 0 .. 3 := 0;
INIT : Boolean := False; -- Initialize message digest
DMAE : Boolean := False; -- DMA enable
DATATYPE : Data_Type := Data_32_Bit; -- Data type selection
MODE : Hash_Mode := Hash; -- Mode selection
ALGO0 : Algorithm_0 := 0; -- Algorithm selection bit 0
NBW : Integer range 0 .. 15 := 0; -- Number of words already
DINNE : Boolean := False; -- DIN not empty
MDMAT : Boolean := False; -- Multiple DMA Transfers
Unused_14 : Integer range 0 .. 3 := 0;
LKEY : Boolean := False; -- Long key selection
Unused_17 : Integer range 0 .. 1 := 0;
ALGO1 : Algorithm_1 := 0; -- Algorithm selection bit 1
Unused_19 : Integer range 0 .. 2**13 - 1 := 0;
end record with Size => 32;
for Control_Register use record
Unused_0 at 0 range 0 .. 1;
INIT at 0 range 2 .. 2;
DMAE at 0 range 3 .. 3;
DATATYPE at 0 range 4 .. 5;
MODE at 0 range 6 .. 6;
ALGO0 at 0 range 7 .. 7;
NBW at 0 range 8 .. 11;
DINNE at 0 range 12 .. 12;
MDMAT at 0 range 13 .. 13;
Unused_14 at 0 range 14 .. 15;
LKEY at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 17;
ALGO1 at 0 range 18 .. 18;
Unused_19 at 0 range 19 .. 31;
end record;
-- STR
type Start_Register is record
NBLW : Integer range 0 .. 2**5 - 1 := 0; -- Number of valid bits in the la
Unused_5 : Integer range 0 .. 7 := 0;
DCAL : Boolean := False; -- Digest calculation
Unused_9 : Integer range 0 .. 2**23 - 1 := 0;
end record with Size => 32;
for Start_Register use record
NBLW at 0 range 0 .. 4;
Unused_5 at 0 range 5 .. 7;
DCAL at 0 range 8 .. 8;
Unused_9 at 0 range 9 .. 31;
end record;
-- HRx
type Unsigned_32_Array is array (Integer range <>) of Unsigned_32;
-- IMR
type Interrupt_Enable_Register is record
DINIE : Boolean := False; -- Data input interrupt enable
DCIE : Boolean := False; -- Digest calculation completion interrupt enable
Unused : Integer range 0 .. 2**30 - 1 := 0;
end record with Size => 32;
for Interrupt_Enable_Register use record
DINIE at 0 range 0 .. 0;
DCIE at 0 range 1 .. 1;
Unused at 0 range 2 .. 31;
end record;
-- SR
type Status_Register is record
DINIS : Boolean := True; -- Data input interrupt status
DCIS : Boolean := True; -- Digest calculation completion interrupt status
DMAS : Boolean := False; -- DMA Status
BUSY : Boolean := False; -- Busy bit
Unused_4 : Integer range 0 .. 2**28 - 1 := 0;
end record with Size => 32;
for Status_Register use record
DINIS at 0 range 0 .. 0;
DCIS at 0 range 1 .. 1;
DMAS at 0 range 2 .. 2;
BUSY at 0 range 3 .. 3;
Unused_4 at 0 range 4 .. 31;
end record;
-- CSR0
type CSR0_Register is record
CSR0 : Unsigned_32; -- CSR0
end record with Size => 32;
for CSR0_Register use record
CSR0 at 0 range 0 .. 31;
end record;
-- CSR1
type CSR1_Register is record
CSR1 : Unsigned_32; -- CSR1
end record with Size => 32;
for CSR1_Register use record
CSR1 at 0 range 0 .. 31;
end record;
-- CSR2
type CSR2_Register is record
CSR2 : Unsigned_32; -- CSR2
end record with Size => 32;
for CSR2_Register use record
CSR2 at 0 range 0 .. 31;
end record;
-- CSR3
type CSR3_Register is record
CSR3 : Unsigned_32; -- CSR3
end record with Size => 32;
for CSR3_Register use record
CSR3 at 0 range 0 .. 31;
end record;
-- CSR4
type CSR4_Register is record
CSR4 : Unsigned_32; -- CSR4
end record with Size => 32;
for CSR4_Register use record
CSR4 at 0 range 0 .. 31;
end record;
-- CSR5
type CSR5_Register is record
CSR5 : Unsigned_32; -- CSR5
end record with Size => 32;
for CSR5_Register use record
CSR5 at 0 range 0 .. 31;
end record;
-- CSR6
type CSR6_Register is record
CSR6 : Unsigned_32; -- CSR6
end record with Size => 32;
for CSR6_Register use record
CSR6 at 0 range 0 .. 31;
end record;
-- CSR7
type CSR7_Register is record
CSR7 : Unsigned_32; -- CSR7
end record with Size => 32;
for CSR7_Register use record
CSR7 at 0 range 0 .. 31;
end record;
-- CSR8
type CSR8_Register is record
CSR8 : Unsigned_32; -- CSR8
end record with Size => 32;
for CSR8_Register use record
CSR8 at 0 range 0 .. 31;
end record;
-- CSR9
type CSR9_Register is record
CSR9 : Unsigned_32; -- CSR9
end record with Size => 32;
for CSR9_Register use record
CSR9 at 0 range 0 .. 31;
end record;
-- CSR10
type CSR10_Register is record
CSR10 : Unsigned_32; -- CSR10
end record with Size => 32;
for CSR10_Register use record
CSR10 at 0 range 0 .. 31;
end record;
-- CSR11
type CSR11_Register is record
CSR11 : Unsigned_32; -- CSR11
end record with Size => 32;
for CSR11_Register use record
CSR11 at 0 range 0 .. 31;
end record;
-- CSR12
type CSR12_Register is record
CSR12 : Unsigned_32; -- CSR12
end record with Size => 32;
for CSR12_Register use record
CSR12 at 0 range 0 .. 31;
end record;
-- CSR13
type CSR13_Register is record
CSR13 : Unsigned_32; -- CSR13
end record with Size => 32;
for CSR13_Register use record
CSR13 at 0 range 0 .. 31;
end record;
-- CSR14
type CSR14_Register is record
CSR14 : Unsigned_32; -- CSR14
end record with Size => 32;
for CSR14_Register use record
CSR14 at 0 range 0 .. 31;
end record;
-- CSR15
type CSR15_Register is record
CSR15 : Unsigned_32; -- CSR15
end record with Size => 32;
for CSR15_Register use record
CSR15 at 0 range 0 .. 31;
end record;
-- CSR16
type CSR16_Register is record
CSR16 : Unsigned_32; -- CSR16
end record with Size => 32;
for CSR16_Register use record
CSR16 at 0 range 0 .. 31;
end record;
-- CSR17
type CSR17_Register is record
CSR17 : Unsigned_32; -- CSR17
end record with Size => 32;
for CSR17_Register use record
CSR17 at 0 range 0 .. 31;
end record;
-- CSR18
type CSR18_Register is record
CSR18 : Unsigned_32; -- CSR18
end record with Size => 32;
for CSR18_Register use record
CSR18 at 0 range 0 .. 31;
end record;
-- CSR19
type CSR19_Register is record
CSR19 : Unsigned_32; -- CSR19
end record with Size => 32;
for CSR19_Register use record
CSR19 at 0 range 0 .. 31;
end record;
-- CSR20
type CSR20_Register is record
CSR20 : Unsigned_32; -- CSR20
end record with Size => 32;
for CSR20_Register use record
CSR20 at 0 range 0 .. 31;
end record;
-- CSR21
type CSR21_Register is record
CSR21 : Unsigned_32; -- CSR21
end record with Size => 32;
for CSR21_Register use record
CSR21 at 0 range 0 .. 31;
end record;
-- CSR22
type CSR22_Register is record
CSR22 : Unsigned_32; -- CSR22
end record with Size => 32;
for CSR22_Register use record
CSR22 at 0 range 0 .. 31;
end record;
-- CSR23
type CSR23_Register is record
CSR23 : Unsigned_32; -- CSR23
end record with Size => 32;
for CSR23_Register use record
CSR23 at 0 range 0 .. 31;
end record;
-- CSR24
type CSR24_Register is record
CSR24 : Unsigned_32; -- CSR24
end record with Size => 32;
for CSR24_Register use record
CSR24 at 0 range 0 .. 31;
end record;
-- CSR25
type CSR25_Register is record
CSR25 : Unsigned_32; -- CSR25
end record with Size => 32;
for CSR25_Register use record
CSR25 at 0 range 0 .. 31;
end record;
-- CSR26
type CSR26_Register is record
CSR26 : Unsigned_32; -- CSR26
end record with Size => 32;
for CSR26_Register use record
CSR26 at 0 range 0 .. 31;
end record;
-- CSR27
type CSR27_Register is record
CSR27 : Unsigned_32; -- CSR27
end record with Size => 32;
for CSR27_Register use record
CSR27 at 0 range 0 .. 31;
end record;
-- CSR28
type CSR28_Register is record
CSR28 : Unsigned_32; -- CSR28
end record with Size => 32;
for CSR28_Register use record
CSR28 at 0 range 0 .. 31;
end record;
-- CSR29
type CSR29_Register is record
CSR29 : Unsigned_32; -- CSR29
end record with Size => 32;
for CSR29_Register use record
CSR29 at 0 range 0 .. 31;
end record;
-- CSR30
type CSR30_Register is record
CSR30 : Unsigned_32; -- CSR30
end record with Size => 32;
for CSR30_Register use record
CSR30 at 0 range 0 .. 31;
end record;
-- CSR31
type CSR31_Register is record
CSR31 : Unsigned_32; -- CSR31
end record with Size => 32;
for CSR31_Register use record
CSR31 at 0 range 0 .. 31;
end record;
-- CSR32
type CSR32_Register is record
CSR32 : Unsigned_32; -- CSR32
end record with Size => 32;
for CSR32_Register use record
CSR32 at 0 range 0 .. 31;
end record;
-- CSR33
type CSR33_Register is record
CSR33 : Unsigned_32; -- CSR33
end record with Size => 32;
for CSR33_Register use record
CSR33 at 0 range 0 .. 31;
end record;
-- CSR34
type CSR34_Register is record
CSR34 : Unsigned_32; -- CSR34
end record with Size => 32;
for CSR34_Register use record
CSR34 at 0 range 0 .. 31;
end record;
-- CSR35
type CSR35_Register is record
CSR35 : Unsigned_32; -- CSR35
end record with Size => 32;
for CSR35_Register use record
CSR35 at 0 range 0 .. 31;
end record;
-- CSR36
type CSR36_Register is record
CSR36 : Unsigned_32; -- CSR36
end record with Size => 32;
for CSR36_Register use record
CSR36 at 0 range 0 .. 31;
end record;
-- CSR37
type CSR37_Register is record
CSR37 : Unsigned_32; -- CSR37
end record with Size => 32;
for CSR37_Register use record
CSR37 at 0 range 0 .. 31;
end record;
-- CSR38
type CSR38_Register is record
CSR38 : Unsigned_32; -- CSR38
end record with Size => 32;
for CSR38_Register use record
CSR38 at 0 range 0 .. 31;
end record;
-- CSR39
type CSR39_Register is record
CSR39 : Unsigned_32; -- CSR39
end record with Size => 32;
for CSR39_Register use record
CSR39 at 0 range 0 .. 31;
end record;
-- CSR40
type CSR40_Register is record
CSR40 : Unsigned_32; -- CSR40
end record with Size => 32;
for CSR40_Register use record
CSR40 at 0 range 0 .. 31;
end record;
-- CSR41
type CSR41_Register is record
CSR41 : Unsigned_32; -- CSR41
end record with Size => 32;
for CSR41_Register use record
CSR41 at 0 range 0 .. 31;
end record;
-- CSR42
type CSR42_Register is record
CSR42 : Unsigned_32; -- CSR42
end record with Size => 32;
for CSR42_Register use record
CSR42 at 0 range 0 .. 31;
end record;
-- CSR43
type CSR43_Register is record
CSR43 : Unsigned_32; -- CSR43
end record with Size => 32;
for CSR43_Register use record
CSR43 at 0 range 0 .. 31;
end record;
-- CSR44
type CSR44_Register is record
CSR44 : Unsigned_32; -- CSR44
end record with Size => 32;
for CSR44_Register use record
CSR44 at 0 range 0 .. 31;
end record;
-- CSR45
type CSR45_Register is record
CSR45 : Unsigned_32; -- CSR45
end record with Size => 32;
for CSR45_Register use record
CSR45 at 0 range 0 .. 31;
end record;
-- CSR46
type CSR46_Register is record
CSR46 : Unsigned_32; -- CSR46
end record with Size => 32;
for CSR46_Register use record
CSR46 at 0 range 0 .. 31;
end record;
-- CSR47
type CSR47_Register is record
CSR47 : Unsigned_32; -- CSR47
end record with Size => 32;
for CSR47_Register use record
CSR47 at 0 range 0 .. 31;
end record;
-- CSR48
type CSR48_Register is record
CSR48 : Unsigned_32; -- CSR48
end record with Size => 32;
for CSR48_Register use record
CSR48 at 0 range 0 .. 31;
end record;
-- CSR49
type CSR49_Register is record
CSR49 : Unsigned_32; -- CSR49
end record with Size => 32;
for CSR49_Register use record
CSR49 at 0 range 0 .. 31;
end record;
-- CSR50
type CSR50_Register is record
CSR50 : Unsigned_32; -- CSR50
end record with Size => 32;
for CSR50_Register use record
CSR50 at 0 range 0 .. 31;
end record;
-- CSR51
type CSR51_Register is record
CSR51 : Unsigned_32; -- CSR51
end record with Size => 32;
for CSR51_Register use record
CSR51 at 0 range 0 .. 31;
end record;
-- CSR52
type CSR52_Register is record
CSR52 : Unsigned_32; -- CSR52
end record with Size => 32;
for CSR52_Register use record
CSR52 at 0 range 0 .. 31;
end record;
-- CSR53
type CSR53_Register is record
CSR53 : Unsigned_32; -- CSR53
end record with Size => 32;
for CSR53_Register use record
CSR53 at 0 range 0 .. 31;
end record;
type HASH_Registers is record
CR : Control_Register;
DIN : Unsigned_32;
STR : Start_Register;
HR : Unsigned_32_Array (0 .. 4);
IMR : Interrupt_Enable_Register;
SR : Status_Register;
CSR : Unsigned_32_Array (0 .. 53);
HASH_HR : Unsigned_32_Array (0 .. 7);
end record;
for HASH_Registers use record
CR at 16#0000# range 0 .. 31;
DIN at 16#0004# range 0 .. 31;
STR at 16#0008# range 0 .. 31;
HR at 16#000C# range 0 .. 32 * 5 - 1;
IMR at 16#0020# range 0 .. 31;
SR at 16#0024# range 0 .. 31;
CSR at 16#00F8# range 0 .. 32 * 54 - 1;
HASH_HR at 16#0310# range 0 .. 32 * 8 - 1;
end record;
end STM32.HASH;

159
library/source/f4/stm32-hash_processor.ads Normal file
View File

@ -0,0 +1,159 @@
with STM32.Address_Map;
-- Hash Processor
package STM32.Hash_Processor is
-- CR
type Data_Type is (
Data_32_Bit, -- No swapping of data
Data_16_Bit, -- Each word consist of two half-words which are swapped with each other
Data_8_Bit, -- Each word consist of four bytes in reverse order
Data_1_Bit -- Each word is reversed bit-wise
) with Size => 2;
type Mode_Select is (
Hash_Mode,
HMAC_Mode
) with Size => 1;
type Algorithm_0 is mod 2;
type Algorithm_1 is mod 2;
type Algorithm is (
SHA_1,
MD5,
SHA224,
SHA256
) with Size => 2;
for Algorithm use (
SHA_1 => 2#00#,
MD5 => 2#01#,
SHA224 => 2#10#,
SHA256 => 2#11#
);
function To_Algorithm_0 (Algo : Algorithm) return Algorithm_0 is (
Algorithm_0 (Unsigned_32 (Algorithm'Pos (Algo)) and 2#01#)
);
-- ALGO0 field value of a given algorithm
function To_Algorithm_1 (Algo : Algorithm) return Algorithm_1 is (
Algorithm_1 (Shift_Right (Unsigned_32 (Algorithm'Pos (Algo)), 1))
);
-- ALGO1 field value of a given algorithm
function To_Algorithm (Algo_1 : Algorithm_1; Algo_0 : Algorithm_0) return Algorithm is (
Algorithm'Val (Shift_Left (Unsigned_32 (Algo_1), 1) or Unsigned_32 (Algo_0))
);
-- Composes ALGO0 and ALGO1 to a single value of algorithm
type Control_Register is record
Unused_0 : Integer range 0 .. 3 := 0;
INIT : Boolean := False; -- Initialize message digest
DMAE : Boolean := False; -- DMA enable
DATATYPE : Data_Type := Data_32_Bit; -- Data type selection
MODE : Mode_Select := Hash_Mode; -- Mode selection
ALGO0 : Algorithm_0 := 0; -- Algorithm selection bit 0
NBW : Integer range 0 .. 15 := 0; -- Number of words already
DINNE : Boolean := False; -- DIN not empty
MDMAT : Boolean := False; -- Multiple DMA Transfers
Unused_14 : Integer range 0 .. 3 := 0;
LKEY : Boolean := False; -- Long key selection
Unused_17 : Integer range 0 .. 1 := 0;
ALGO1 : Algorithm_1 := 0; -- Algorithm selection bit 1
Unused_19 : Integer range 0 .. 2**13 - 1 := 0;
end record with Size => 32;
for Control_Register use record
Unused_0 at 0 range 0 .. 1;
INIT at 0 range 2 .. 2;
DMAE at 0 range 3 .. 3;
DATATYPE at 0 range 4 .. 5;
MODE at 0 range 6 .. 6;
ALGO0 at 0 range 7 .. 7;
NBW at 0 range 8 .. 11;
DINNE at 0 range 12 .. 12;
MDMAT at 0 range 13 .. 13;
Unused_14 at 0 range 14 .. 15;
LKEY at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 17;
ALGO1 at 0 range 18 .. 18;
Unused_19 at 0 range 19 .. 31;
end record;
-- STR
subtype Valid_Bit_Count is Integer range 0 .. 2**5 - 1;
type Start_Register is record
NBLW : Valid_Bit_Count := 0; -- Number of valid bits in the la
Unused_5 : Unused_3_Bits := 0;
DCAL : Boolean := False; -- Digest calculation
Unused_9 : Unused_23_Bits := 0;
end record with Size => 32;
for Start_Register use record
NBLW at 0 range 0 .. 4;
Unused_5 at 0 range 5 .. 7;
DCAL at 0 range 8 .. 8;
Unused_9 at 0 range 9 .. 31;
end record;
-- HRx
type Unsigned_32_Array is array (Integer range <>) of Unsigned_32;
-- IMR
type Interrupt_Enable_Register is record
DINIE : Boolean := False; -- Data input interrupt enable
DCIE : Boolean := False; -- Digest calculation completion interrupt enable
Unused : Unused_30_Bits := 0;
end record with Size => 32;
for Interrupt_Enable_Register use record
DINIE at 0 range 0 .. 0;
DCIE at 0 range 1 .. 1;
Unused at 0 range 2 .. 31;
end record;
-- SR
type Status_Register is record
DINIS : Boolean := True; -- Data input interrupt status
DCIS : Boolean := True; -- Digest calculation completion interrupt status
DMAS : Boolean := False; -- DMA Status
BUSY : Boolean := False; -- Busy bit
Unused_4 : Unused_28_Bits := 0;
end record with Size => 32;
for Status_Register use record
DINIS at 0 range 0 .. 0;
DCIS at 0 range 1 .. 1;
DMAS at 0 range 2 .. 2;
BUSY at 0 range 3 .. 3;
Unused_4 at 0 range 4 .. 31;
end record;
type HASH_Registers is record
CR : Control_Register;
DIN : Unsigned_32;
STR : Start_Register;
HR : Unsigned_32_Array (0 .. 4);
IMR : Interrupt_Enable_Register;
SR : Status_Register;
CSR : Unsigned_32_Array (0 .. 53);
HASH_HR : Unsigned_32_Array (0 .. 7);
end record;
for HASH_Registers use record
CR at 16#0000# range 0 .. 31;
DIN at 16#0004# range 0 .. 31;
STR at 16#0008# range 0 .. 31;
HR at 16#000C# range 0 .. 32 * 5 - 1;
IMR at 16#0020# range 0 .. 31;
SR at 16#0024# range 0 .. 31;
CSR at 16#00F8# range 0 .. 32 * 54 - 1;
HASH_HR at 16#0310# range 0 .. 32 * 8 - 1;
end record;
HASH : HASH_Registers with Volatile, Import, Address => Address_Map.HASH;
end STM32.Hash_Processor;

18
library/source/f4/stm32-i2cs.ads
View File

@ -1,4 +1,11 @@
package STM32.I2Cs with Pure is
with STM32.Address_Map;
-- Inter-Integrated Circuit Interface Controllers
--
-- These units are the same through the whole STM32F4 family
-- The only difference is FLTR register is absent in some models
package STM32.I2Cs is
-- CR1
@ -241,6 +248,9 @@ package STM32.I2Cs with Pure is
Reserved at 0 range 5 .. 15;
end record;
-- note: FLTR only present in models F413, F415, F417, F42x, F43x, F44x, F469 and F479
-- FLTR is absent in F40x, F410, F411, and F412
--
type I2C_Registers is record
@ -268,4 +278,10 @@ package STM32.I2Cs with Pure is
FLTR at 16#24# range 0 .. 15;
end record;
--
I2C1 : aliased I2C_Registers with Volatile, Import, Address => Address_Map.I2C1;
I2C2 : aliased I2C_Registers with Volatile, Import, Address => Address_Map.I2C2;
I2C3 : aliased I2C_Registers with Volatile, Import, Address => Address_Map.I2C3;
end STM32.I2Cs;

10
library/source/f4/stm32-iwdg.ads → library/source/f4/stm32-independent_watchdog.ads
View File

@ -1,4 +1,8 @@
package STM32.IWDG with Pure is
with STM32.Address_Map;
-- Independent Watchdog
package STM32.Independent_Watchdog is
-- KR
@ -94,4 +98,6 @@ package STM32.IWDG with Pure is
end record;
end STM32.IWDG;
IWDG : aliased IWDG_Registers with Volatile, Import, Address => Address_Map.IWDG;
end STM32.Independent_Watchdog;

8
library/source/f4/stm32-lcd_tft.ads
View File

@ -1,7 +1,11 @@
with STM32.Address_Map;
with STM32.Graphics;
use STM32.Graphics;
package STM32.LCD_TFT with Pure is
-- LCD TFT Controller
package STM32.LCD_TFT is
type Frame_Configuration_Register is record
VH : Integer range 0 .. 2**11 - 1;
@ -303,4 +307,6 @@ package STM32.LCD_TFT with Pure is
L at 16#0080# range 0 .. 2 * 8 * 16#80# - 1;
end record;
LTDC : LTDC_Registers with Volatile, Import, Address => Address_Map.LTDC;
end STM32.LCD_TFT;

229
library/source/f4/stm32-low_power_timers.ads Normal file
View File

@ -0,0 +1,229 @@
with STM32.Address_Map;
-- Low Power Timers
--
-- Available in F410 and F4x3 devices
package STM32.Low_Power_Timers is
-- ISR, ICR, IER
type Interrupt_Register is record
CMPM : Boolean := False; -- Compare match
ARRM : Boolean := False; -- Autoreload match
EXTTRIG : Boolean := False; -- External trigger edge
CMPOK : Boolean := False; -- Compare register update OK
ARROK : Boolean := False; -- Autoreload register update OK
UP : Boolean := False; -- Counter direction change down to up
DOWN : Boolean := False; -- Counter direction change up to down
Unused_7 : Unused_25_Bits := 0;
end record with Size => 32;
for Interrupt_Register use record
CMPM at 0 range 0 .. 0;
ARRM at 0 range 1 .. 1;
EXTTRIG at 0 range 2 .. 2;
CMPOK at 0 range 3 .. 3;
ARROK at 0 range 4 .. 4;
UP at 0 range 5 .. 5;
DOWN at 0 range 6 .. 6;
Unused_7 at 0 range 7 .. 31;
end record;
-- CFGR
type Clock_Select is (
Internal_Clock,
External_Input_1)
with Size => 1;
type Clock_Polarity is (
Rising_Edge_Clock,
Falling_Edge_Clock,
Both_Edges_Clock)
with Size => 2;
for Clock_Polarity use (
Rising_Edge_Clock => 2#00#,
Falling_Edge_Clock => 2#01#,
Both_Edges_Clock => 2#10#);
type Filter is new Logarithmic range Value_1 .. Value_8 with Size => 2;
type Prescaler is new Logarithmic range Value_1 .. Value_128 with Size => 3;
type Trigger_Select is range 0 .. 7 with Size => 3;
type Trigger_Enable is (
Software_Trigger,
Rising_Edge_Trigger,
Falling_Edge_Trigger,
Both_Edges_Trigger)
with Size => 2;
type Waveform_Shape is (
Normal,
Set_Once)
with Size => 1;
type Waveform_Polarity is (
Waveform_Positive,
Waveform_Negative)
with Size => 1;
type Preload_Mode is (
APB_Write,
End_of_Cycle)
with Size => 1;
type Configuration_Register is record
CKSEL : Clock_Select := Internal_Clock; -- Clock selector
CKPOL : Clock_Polarity := Rising_Edge_Clock; -- Clock Polarity
CKFLT : Filter := Value_1; -- Digital filter foe external clock
Unused_5 : Unused_1_Bit := 0;
TRGFLT : Filter := Value_1; -- Digital filter for trigger
Unused_8 : Unused_1_Bit := 0;
PRESC : Prescaler := Value_1; -- Clock prescaler
Unused_12 : Unused_1_Bit := 0;
TRIGSEL : Trigger_Select := 0; -- Trigger selector
Unused_16 : Unused_1_Bit := 0;
TRIGEN : Trigger_Enable := Software_Trigger; -- Trigger enable and
TIMOUT : Boolean := False; -- Timeout enable
WAVE : Waveform_Shape := Normal; -- Waveform shape
WAVPOL : Waveform_Polarity := Waveform_Positive; -- Waveform shape polarity
PRELOAD : Preload_Mode := APB_Write; -- Registers update mode
COUNTMODE : Clock_Select := Internal_Clock; -- Counter mode
ENC : Boolean := False; -- Encoder mode enable
Unused_25 : Unused_7_Bits := 0;
end record with Size => 32;
for Configuration_Register use record
CKSEL at 0 range 0 .. 0;
CKPOL at 0 range 1 .. 2;
CKFLT at 0 range 3 .. 4;
Unused_5 at 0 range 5 .. 5;
TRGFLT at 0 range 6 .. 7;
Unused_8 at 0 range 8 .. 8;
PRESC at 0 range 9 .. 11;
Unused_12 at 0 range 12 .. 12;
TRIGSEL at 0 range 13 .. 15;
Unused_16 at 0 range 16 .. 16;
TRIGEN at 0 range 17 .. 18;
TIMOUT at 0 range 19 .. 19;
WAVE at 0 range 20 .. 20;
WAVPOL at 0 range 21 .. 21;
PRELOAD at 0 range 22 .. 22;
COUNTMODE at 0 range 23 .. 23;
ENC at 0 range 24 .. 24;
Unused_25 at 0 range 25 .. 31;
end record;
-- CR
type Control_Register is record
ENABLE : Boolean := False; -- LPTIM Enable
SNGSTRT : Boolean := False; -- Start in single mode
CNTSTRT : Boolean := False; -- Start in continuous mode
Unused_3 : Unused_29_Bits := 0;
end record with Size => 32;
for Control_Register use record
ENABLE at 0 range 0 .. 0;
SNGSTRT at 0 range 1 .. 1;
CNTSTRT at 0 range 2 .. 2;
Unused_3 at 0 range 3 .. 31;
end record;
-- CMP
type Count_Register is range 0 .. 2**16 - 1 with Size => 32;
type CMP_Register is record
CMP : Integer range 0 .. 2**16 - 1; -- Compare value
Unused_16 : Integer range 0 .. 2**16 - 1;
end record with Size => 32;
for CMP_Register use record
CMP at 0 range 0 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- ARR
type ARR_Register is record
ARR : Integer range 0 .. 2**16 - 1; -- Auto reload value
Unused_16 : Integer range 0 .. 2**16 - 1;
end record with Size => 32;
for ARR_Register use record
ARR at 0 range 0 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- CNT
type CNT_Register is record
CNT : Integer range 0 .. 2**16 - 1; -- Counter value
Unused_16 : Integer range 0 .. 2**16 - 1;
end record with Size => 32;
for CNT_Register use record
CNT at 0 range 0 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- OPTR
type Input_1_Remap is (
Input_1_PB5_PC0,
Input_1_PA4,
Input_1_PB9,
Input_1_TIM6_DAC)
with Size => 2;
type Option_Register is record
OPT : Input_1_Remap := Input_1_PB5_PC0; -- (OR) Timer Input 1 Remap option
Unused_2 : Unused_30_Bits := 0;
end record with Size => 32;
for Option_Register use record
OPT at 0 range 0 .. 1;
Unused_2 at 0 range 2 .. 31;
end record;
-- OR renamed to OPT to avoid keyword clash
-- OPTR is present only in F410
--
type LPTIM_Registers is record
ISR : Interrupt_Register;
pragma Volatile_Full_Access(ISR);
ICR : Interrupt_Register;
pragma Volatile_Full_Access(ICR);
IER : Interrupt_Register;
pragma Volatile_Full_Access(IER);
CFGR : Configuration_Register;
pragma Volatile_Full_Access(CFGR);
CR : Control_Register;
pragma Volatile_Full_Access(CR);
CMP : Count_Register;
ARR : Count_Register;
CNT : Count_Register;
OPTR : Option_Register;
pragma Volatile_Full_Access(OPTR);
end record;
for LPTIM_Registers use record
ISR at 16#00# range 0 .. 31;
ICR at 16#04# range 0 .. 31;
IER at 16#08# range 0 .. 31;
CFGR at 16#0C# range 0 .. 31;
CR at 16#10# range 0 .. 31;
CMP at 16#14# range 0 .. 31;
ARR at 16#18# range 0 .. 31;
CNT at 16#1C# range 0 .. 31;
OPTR at 16#20# range 0 .. 31;
end record;
LPTIM1 : LPTIM_Registers with Volatile, Import, Address => Address_Map.LPTIM1;
end STM32.Low_Power_Timers;

8
library/source/f4/stm32-power.ads
View File

@ -1,4 +1,8 @@
package STM32.Power with Pure is
with STM32.Address_Map;
-- Power Controller
package STM32.Power is
type PVD_Level is (
PVD_2_0_V,
@ -127,4 +131,6 @@ package STM32.Power with Pure is
CSR at 16#04# range 0 .. 31;
end record;
PWR : PWR_Registers with Volatile, Import, Address => Address_Map.PWR;
end STM32.Power;

7
library/source/f4/stm32-rng.ads → library/source/f4/stm32-random_number_generator.ads
View File

@ -1,4 +1,6 @@
package STM32.RNG with Pure is
with STM32.Address_Map;
package STM32.Random_Number_Generator is
-- CR
@ -52,5 +54,6 @@ package STM32.RNG with Pure is
end record;
end STM32.RNG;
RNG : RNG_Registers with Volatile, Import, Address => Address_Map.RNG;
end STM32.Random_Number_Generator;

490
library/source/f4/stm32-real_time_clock.ads Normal file
View File

@ -0,0 +1,490 @@
with STM32.Address_Map;
-- Real Time Clock
package STM32.Real_Time_Clock is
-- RTC identical through the whole F4 family.
-- TR, TSTR
subtype BCD_Digit is Integer range 0 .. 9;
subtype BCD_Tens is BCD_Digit range 0 .. 5;
subtype Hour_Tens is BCD_Digit range 0 .. 3;
type Time_Register is record
SU : BCD_Digit := 0; -- Second units in BCD format
ST : BCD_Tens := 0; -- Second tens in BCD format
MNU : BCD_Digit := 0; -- Minute units in BCD format
MNT : BCD_Tens := 0; -- Minute tens in BCD format
HU : BCD_Digit := 0; -- Hour units in BCD format
HT : Hour_Tens := 0; -- Hour tens in BCD format
PM : Boolean := False; -- AM/PM notation
Unused_23 : Unused_9_Bits := 0;
end record with Size => 32;
for Time_Register use record
SU at 0 range 0 .. 3;
ST at 0 range 4 .. 7;
MNU at 0 range 8 .. 11;
MNT at 0 range 12 .. 15;
HU at 0 range 16 .. 19;
HT at 0 range 20 .. 21;
PM at 0 range 22 .. 22;
Unused_23 at 0 range 23 .. 31;
end record;
-- note: bug in SVD for f405, f407, f415, f417, f427, f429, f437, f439, f446 and f469 devices
-- DR, TSDR
Monday : constant Integer := 1;
Tuesday : constant Integer := 2;
Wednesday : constant Integer := 3;
Thursday : constant Integer := 4;
Friday : constant Integer := 5;
Saturday : constant Integer := 6;
Sunday : constant Integer := 7;
type Date_Register is record
DU : Integer range 0 .. 9 := 1; -- Date units in BCD format
DT : Integer range 0 .. 3 := 0; -- Date tens in BCD format
Unused_6 : Integer range 0 .. 3 := 0;
MU : Integer range 0 .. 9 := 1; -- Month units in BCD format
MT : Integer range 0 .. 1 := 0; -- Month tens in BCD format
WDU : Integer range 0 .. 7 := 1; -- Week day units
YU : Integer range 0 .. 9 := 0; -- Year units in BCD format
YT : Integer range 0 .. 9 := 0; -- Year tens in BCD format
Unused_24 : Integer range 0 .. 2**8 - 1 := 0;
end record with Size => 32;
for Date_Register use record
DU at 0 range 0 .. 3;
DT at 0 range 4 .. 5;
Unused_6 at 0 range 6 .. 7;
MU at 0 range 8 .. 11;
MT at 0 range 12 .. 12;
WDU at 0 range 13 .. 15;
YU at 0 range 16 .. 19;
YT at 0 range 20 .. 23;
Unused_24 at 0 range 24 .. 31;
end record;
-- CR
type Wakeup_Clock is (
RTC_Div_16,
RTC_Div_8,
RTC_Div_4,
RTC_Div_2,
CK_SPRE,
CK_SPRE_A,
CK_SPRE_Add_2_Power_16,
CK_SPRE_Add_2_Power_16_A
) with Size => 3;
for Wakeup_Clock use (
RTC_Div_16 => 2#000#,
RTC_Div_8 => 2#001#,
RTC_Div_4 => 2#010#,
RTC_Div_2 => 2#011#,
CK_SPRE => 2#100#,
CK_SPRE_A => 2#101#,
CK_SPRE_Add_2_Power_16 => 2#110#,
CK_SPRE_Add_2_Power_16_A => 2#111#
);
type Timestamp_Edge is (
Rising_Edge,
Falling_Edge
) with Size => 1;
type Hour_Format is (
Hour_24,
Hour_AM_PM
) with Size => 1;
type Output_Polarity is (
Active_High,
Active_Low
) with Size => 1;
-- Note assignment (not compatible with LTDC and DCMI)
type Alarm_Output is (
Alarm_Disabled,
Alarm_A,
Alarm_B,
Wakeup
) with Size => 2;
for Alarm_Output use (
Alarm_Disabled => 2#00#,
Alarm_A => 2#01#,
Alarm_B => 2#10#,
Wakeup => 2#11#
);
type Control_Register is record
WCKSEL : Wakeup_Clock := RTC_Div_16; -- Wakeup clock selection
TSEDGE : Timestamp_Edge := Rising_Edge; -- Time-stamp event active
REFCKON : Boolean := False; -- Reference clock detection enable
BYPSHAD : Boolean := False; -- Byass the shadow registers
FMT : Hour_Format := Hour_24; -- Hour format
DCE : Boolean := False; -- Coarse digital calibration
ALRAE : Boolean := False; -- Alarm A enable
ALRBE : Boolean := False; -- Alarm B enable
WUTE : Boolean := False; -- Wakeup timer enable
TSE : Boolean := False; -- Time stamp enable
ALRAIE : Boolean := False; -- Alarm A interrupt enable
ALRBIE : Boolean := False; -- Alarm B interrupt enable
WUTIE : Boolean := False; -- Wakeup timer interrupt enable
TSIE : Boolean := False; -- Time-stamp interrupt enable
ADD1H : Boolean := False; -- Add 1 hour (summer time change)
SUB1H : Boolean := False; -- Subtract 1 hour (winter time change)
BKP : Boolean := False; -- Backup
POL : Output_Polarity := Active_High; -- Output polarity
OSEL : Alarm_Output := Alarm_Disabled; -- Output selection
COE : Boolean := False; -- Calibration output enable
Unused_24 : Integer range 0 .. 2**8 - 1 := 0;
end record with Size => 32;
for Control_Register use record
WCKSEL at 0 range 0 .. 2;
TSEDGE at 0 range 3 .. 3;
REFCKON at 0 range 4 .. 4;
BYPSHAD at 0 range 5 .. 5; -- note this does not exist in SVD
FMT at 0 range 6 .. 6;
DCE at 0 range 7 .. 7;
ALRAE at 0 range 8 .. 8;
ALRBE at 0 range 9 .. 9;
WUTE at 0 range 10 .. 10;
TSE at 0 range 11 .. 11;
ALRAIE at 0 range 12 .. 12;
ALRBIE at 0 range 13 .. 13;
WUTIE at 0 range 14 .. 14;
TSIE at 0 range 15 .. 15;
ADD1H at 0 range 16 .. 16;
SUB1H at 0 range 17 .. 17;
BKP at 0 range 18 .. 18;
POL at 0 range 20 .. 20;
OSEL at 0 range 21 .. 22;
COE at 0 range 23 .. 23;
Unused_24 at 0 range 24 .. 31;
end record;
-- ISR
type Initialization_and_Status_Register is record
ALRAWF : Boolean := True; -- Alarm A write flag
ALRBWF : Boolean := True; -- Alarm B write flag
WUTWF : Boolean := True; -- Wakeup timer write flag
SHPF : Boolean := False; -- Shift operation pending
INITS : Boolean := False; -- Initialization status flag
RSF : Boolean := False; -- Registers synchronization
INITF : Boolean := False; -- Initialization flag
INIT : Boolean := False; -- Initialization mode
ALRAF : Boolean := True; -- Alarm A flag
ALRBF : Boolean := True; -- Alarm B flag
WUTF : Boolean := True; -- Wakeup timer flag
TSF : Boolean := True; -- Time-stamp flag
TSOVF : Boolean := True; -- Time-stamp overflow flag
TAMP1F : Boolean := True; -- Tamper detection flag
TAMP2F : Boolean := True; -- TAMPER2 detection flag
Unused_15 : Integer range 0 .. 1 := 0;
RECALPF : Boolean := False; -- Recalibration pending Flag
Unused_17 : Integer range 0 .. 2**15 - 1 := 0;
end record with Size => 32;
for Initialization_and_Status_Register use record
ALRAWF at 0 range 0 .. 0;
ALRBWF at 0 range 1 .. 1;
WUTWF at 0 range 2 .. 2;
SHPF at 0 range 3 .. 3;
INITS at 0 range 4 .. 4;
RSF at 0 range 5 .. 5;
INITF at 0 range 6 .. 6;
INIT at 0 range 7 .. 7;
ALRAF at 0 range 8 .. 8;
ALRBF at 0 range 9 .. 9;
WUTF at 0 range 10 .. 10;
TSF at 0 range 11 .. 11;
TSOVF at 0 range 12 .. 12;
TAMP1F at 0 range 13 .. 13;
TAMP2F at 0 range 14 .. 14;
Unused_15 at 0 range 15 .. 15;
RECALPF at 0 range 16 .. 16;
Unused_17 at 0 range 17 .. 31;
end record;
-- PRER
type Prescaler_Register is record
PREDIV_S : Integer range 0 .. 2**15 - 1 := 16#00FF#; -- Synchronous prescaler factor minus 1
Unused_15 : Unused_1_Bit := 0;
PREDIV_A : Integer range 0 .. 2**7 - 1 := 16#7F#; -- Asynchronous prescaler factor minus 1
Unused_23 : Integer range 0 .. 2**9 - 1 := 0;
end record with Size => 32;
for Prescaler_Register use record
PREDIV_S at 0 range 0 .. 14;
Unused_15 at 0 range 15 .. 15;
PREDIV_A at 0 range 16 .. 22;
Unused_23 at 0 range 23 .. 31;
end record;
-- CALIBR
type Calibration_Sign is (
Increase_Frequency,
Decrease_Frequency
) with Size => 1;
type CALIBR_Register is record
DC : Integer range 0 .. 31 := 0; -- Digital calibration (by 4 ppm plus / by 2 ppm minus)
Unused_5 : Unused_2_Bits := 0;
DCS : Calibration_Sign := Increase_Frequency; -- Digital calibration sign
Unused_8 : Unused_24_Bits := 0;
end record with Size => 32;
for CALIBR_Register use record
DC at 0 range 0 .. 4;
Unused_5 at 0 range 5 .. 6;
DCS at 0 range 7 .. 7;
Unused_8 at 0 range 8 .. 31;
end record;
-- ALRMAR, ALRMBR
type Day_Mode is (
Month_Day,
Week_Day
) with Size => 1;
for Day_Mode use (
Month_Day => 0,
Week_Day => 1
);
type Alarm_Register is record
SU : Integer range 0 .. 9 := 0; -- Second units in BCD format
ST : Integer range 0 .. 5 := 0; -- Second tens in BCD format
MSKS : Boolean := False; -- Alarm A seconds mask
MNU : Integer range 0 .. 9 := 0; -- Minute units in BCD format
MNT : Integer range 0 .. 5 := 0; -- Minute tens in BCD format
MSKMN : Boolean := False; -- Alarm A minutes mask
HU : Integer range 0 .. 9 := 0; -- Hour units in BCD format
HT : Integer range 0 .. 2 := 0; -- Hour tens in BCD format
PM : Boolean := False; -- AM/PM notation
MSKH : Boolean := False; -- Alarm A hours mask
DU : Integer range 0 .. 9 := 0; -- Date units or day in BCD
DT : Integer range 0 .. 3 := 0; -- Date tens in BCD format
WDSEL : Day_Mode := Month_Day; -- Week day selection
MSKD : Boolean := False; -- Alarm A date mask
end record with Size => 32;
for Alarm_Register use record
SU at 0 range 0 .. 3;
ST at 0 range 4 .. 6;
MSKS at 0 range 7 .. 7;
MNU at 0 range 8 .. 11;
MNT at 0 range 12 .. 14;
MSKMN at 0 range 15 .. 15;
HU at 0 range 16 .. 19;
HT at 0 range 20 .. 21;
PM at 0 range 22 .. 22;
MSKH at 0 range 23 .. 23;
DU at 0 range 24 .. 27;
DT at 0 range 28 .. 29;
WDSEL at 0 range 30 .. 30;
MSKD at 0 range 31 .. 31;
end record;
-- Note: MSKx flags are renamed to more meaningful names
-- WPR
type Write_Protection_Register is new Unsigned_32 range 0 .. 2**8 - 1;
WPR_Unlock_1 : constant Write_Protection_Register := 16#CA#; -- Unlock sequence step 1
WPR_Unlock_2 : constant Write_Protection_Register := 16#53#; -- Unlock sequence step 2
WPR_Lock : constant Write_Protection_Register := 16#00#; -- Whatever not equal to unlock sequence
-- SHIFTR
type Shift_Control_Register is record
SUBFS : Integer range 0 .. 2**15 - 1 := 0; -- Subtract a fraction of a
Unused_15 : Unused_16_Bits := 0;
ADD1S : Boolean := False; -- Add one second
end record with Size => 32;
for Shift_Control_Register use record
SUBFS at 0 range 0 .. 14;
Unused_15 at 0 range 15 .. 30;
ADD1S at 0 range 31 .. 31;
end record;
-- CALR
type Calibration_Register is record
CALM : Integer range 0 .. 2**9 - 1 := 0; -- Calibration minus decreases frequency by 0.9537 ppm (1/2**20) per one
Unused_9 : Integer range 0 .. 15 := 0;
CALW16 : Boolean := False; -- Use a 16-second calibration cy
CALW8 : Boolean := False; -- Use an 8-second calibration cy
CALP : Boolean := False; -- Increase frequency of RTC by 488.5 ppm (1/2**11)
Unused_16 : Integer range 0 .. 2**16 - 1 := 0;
end record with Size => 32;
for Calibration_Register use record
CALM at 0 range 0 .. 8;
Unused_9 at 0 range 9 .. 12;
CALW16 at 0 range 13 .. 13;
CALW8 at 0 range 14 .. 14;
CALP at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- TAFCR
type Tamper_Level is (
Low_or_Rising,
High_or_Falling
) with Size => 1;
for Tamper_Level use (
Low_or_Rising => 0,
High_or_Falling => 1
);
type Tamper_Filter is (
Tamper_on_Edge,
Tamper_on_2_Samples,
Tamper_on_4_Samples,
Tamper_on_8_Samples
) with Size => 2;
for Tamper_Filter use (
Tamper_on_Edge => 2#00#,
Tamper_on_2_Samples => 2#01#,
Tamper_on_4_Samples => 2#10#,
Tamper_on_8_Samples => 2#11#
);
type Precharge_Duration is new Logarithmic range Value_1 .. Value_8 with Size => 2;
type Pin_Mapping is (
AF1,
AF2
) with Size => 1;
type Alarm_Output_Type is (
Open_Drain,
Push_Pull
) with Size => 1;
type Tamper_and_Alternate_Function_Register is record
TAMP1E : Boolean := False; -- Tamper 1 detection enable
TAMP1TRG : Tamper_Level := Low_or_Rising; -- Active level for tamper 1
TAMPIE : Boolean := False; -- Tamper interrupt enable
TAMP2E : Boolean := False; -- Tamper 2 detection enable
TAMP2TRG : Tamper_Level := Low_or_Rising; -- Active level for tamper 2
TAMPTS : Boolean := False; -- Activate timestamp on tamper d
TAMPFREQ : Integer range 0 .. 7 := 0; -- Tamper sampling frequency equals fRTC / 2**(15 - x)
TAMPFLT : Tamper_Filter := Tamper_on_Edge; -- Tamper filter count
TAMPPRCH : Precharge_Duration := Value_1; -- Tamper precharge duration
TAMPPUDIS : Boolean := False; -- TAMPER pull-up disable
TAMP1INSEL : Pin_Mapping := AF1; -- TAMPER1 mapping
TSINSEL : Pin_Mapping := AF1; -- TIMESTAMP mapping
ALARMOUTTYPE : Alarm_Output_Type := Open_Drain; -- RTC_ALARM output type
Reserved_19 : Integer range 0 .. 2**13 - 1 := 0;
end record with Size => 32;
for Tamper_and_Alternate_Function_Register use record
TAMP1E at 0 range 0 .. 0;
TAMP1TRG at 0 range 1 .. 1;
TAMPIE at 0 range 2 .. 2;
TAMP2E at 0 range 3 .. 3;
TAMP2TRG at 0 range 4 .. 4;
TAMPTS at 0 range 7 .. 7;
TAMPFREQ at 0 range 8 .. 10;
TAMPFLT at 0 range 11 .. 12;
TAMPPRCH at 0 range 13 .. 14;
TAMPPUDIS at 0 range 15 .. 15;
TAMP1INSEL at 0 range 16 .. 16;
TSINSEL at 0 range 17 .. 17;
ALARMOUTTYPE at 0 range 18 .. 18;
Reserved_19 at 0 range 19 .. 31;
end record;
-- ALRMASSR, ALRMBSSR
type Alarm_Subsecond_Register is record
SS : Integer range 0 .. 2**15 - 1; -- Sub seconds value
Unused_15 : Integer range 0 .. 2**9 - 1;
MASKSS : Integer range 0 .. 15; -- Mask the most-significant bits
Unused_28 : Integer range 0 .. 15;
end record with Size => 32;
for Alarm_Subsecond_Register use record
SS at 0 range 0 .. 14;
Unused_15 at 0 range 15 .. 23;
MASKSS at 0 range 24 .. 27;
Unused_28 at 0 range 28 .. 31;
end record;
-- BKPxR
type Backup_Registers is array (0 .. 19) of Unsigned_32;
type RTC_Registers is record
TR : Time_Register;
pragma Volatile_Full_Access(TR);
DR : Date_Register;
pragma Volatile_Full_Access(DR);
CR : Control_Register;
pragma Volatile_Full_Access(CR);
ISR : Initialization_and_Status_Register;
pragma Volatile_Full_Access(ISR);
PRER : Prescaler_Register;
pragma Volatile_Full_Access(PRER);
WUTR : Integer range 0 .. 2**16 - 1 := 16#FFFF#;
pragma Volatile_Full_Access(WUTR);
CALIBR : CALIBR_Register;
pragma Volatile_Full_Access(CALIBR);
ALRMAR : Alarm_Register;
pragma Volatile_Full_Access(ALRMAR);
ALRMBR : Alarm_Register;
pragma Volatile_Full_Access(ALRMBR);
WPR : Write_Protection_Register;
pragma Volatile_Full_Access(WPR);
SSR : Integer range 0 .. 2**16 - 1;
pragma Volatile_Full_Access(SSR);
SHIFTR : Shift_Control_Register;
pragma Volatile_Full_Access(SHIFTR);
TSTR : Time_Register;
pragma Volatile_Full_Access(TSTR);
TSDR : Date_Register;
pragma Volatile_Full_Access(TSDR);
TSSSR : Integer range 0 .. 2**16 - 1;
pragma Volatile_Full_Access(TSSSR);
CALR : Calibration_Register;
pragma Volatile_Full_Access(CALR);
TAFCR : Tamper_and_Alternate_Function_Register;
pragma Volatile_Full_Access(TAFCR);
ALRMASSR : Alarm_Subsecond_Register;
pragma Volatile_Full_Access(ALRMASSR);
ALRMBSSR : Alarm_Subsecond_Register;
pragma Volatile_Full_Access(ALRMBSSR);
BKPR : Backup_Registers;
end record;
for RTC_Registers use record
TR at 16#00# range 0 .. 31;
DR at 16#04# range 0 .. 31;
CR at 16#08# range 0 .. 31;
ISR at 16#0C# range 0 .. 31;
PRER at 16#10# range 0 .. 31;
WUTR at 16#14# range 0 .. 31;
CALIBR at 16#18# range 0 .. 31;
ALRMAR at 16#1C# range 0 .. 31;
ALRMBR at 16#20# range 0 .. 31;
WPR at 16#24# range 0 .. 31;
SSR at 16#28# range 0 .. 31;
SHIFTR at 16#2C# range 0 .. 31;
TSTR at 16#30# range 0 .. 31;
TSDR at 16#34# range 0 .. 31;
TSSSR at 16#38# range 0 .. 31;
CALR at 16#3C# range 0 .. 31;
TAFCR at 16#40# range 0 .. 31;
ALRMASSR at 16#44# range 0 .. 31;
ALRMBSSR at 16#48# range 0 .. 31;
BKPR at 16#50# range 0 .. 32 * 20 - 1;
end record;
RTC : RTC_Registers with Volatile, Import, Address => Address_Map.RTC_and_BKP;
end STM32.Real_Time_Clock;

8
library/source/f4/stm32-reset_and_clock.ads
View File

@ -1,4 +1,8 @@
package STM32.Reset_and_Clock with Pure is
with STM32.Address_Map;
-- Reset and Clock Controller
package STM32.Reset_and_Clock is
-- CR
HSITRIM_Default : constant Integer := 16#10#; -- This constant comes from HAL
@ -675,4 +679,6 @@ package STM32.Reset_and_Clock with Pure is
DCKCFGR at 16#8C# range 0 .. 31;
end record;
RCC : RCC_Registers with Volatile, Import, Address => Address_Map.RCC;
end STM32.Reset_and_Clock;

11
library/source/f4/stm32-sdio.ads → library/source/f4/stm32-sdio_interface.ads
View File

@ -1,4 +1,10 @@
package STM32.SDIO with Pure is
with STM32.Address_Map;
-- SD / SDIO / MMC interface
--
-- This unit is in all STM32F4xx series models except F410
package STM32.SDIO_Interface is
-- POWER
@ -299,5 +305,6 @@ package STM32.SDIO with Pure is
FIFO at 16#80# range 0 .. 31;
end record;
end STM32.SDIO;
SDIO : aliased SDIO_Registers with Volatile, Import, Address => Address_Map.SDIO;
end STM32.SDIO_Interface;

49
library/source/f4/stm32-spis.ads
View File

@ -1,4 +1,30 @@
package STM32.SPIs with Pure is
with STM32.Address_Map;
-- Serial Peripherial Interface Controllers
--
-- Units exist an all STM32F4 devices in various combinations
--
-- Availability chart:
-- SPI# 1 2 3 4 5 6
-- F401 + + + + - -
-- F405 + + + - - -
-- F407 + + + - - -
-- F410 + + - - - -
-- F411 + + + + + -
-- F412 + + + + + -
-- F413 + + + + + -
-- F415 + + + - - -
-- F417 + + + - - -
-- F423 + + + + + -
-- F427 + + + + + +
-- F429 + + + + + +
-- F437 + + + + + +
-- F446 + + + + - -
-- F469 + + + + + +
-- F479 + + + + + +
-- They all are identical
package STM32.SPIs is
type Clock_Phase is (
Late_Clock, -- First clock transition is the first data capture edge
@ -300,4 +326,25 @@ package STM32.SPIs with Pure is
I2SPR at 16#20# range 0 .. 15;
end record;
SPI1 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI1;
SPI2 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI2_I2S2;
SPI3 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI3_I2S3;
SPI4 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI4;
SPI5 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI5;
SPI6 : aliased SPI_Registers with Volatile, Import,
Address => Address_Map.SPI6;
I2S2 : SPI_Registers renames SPI2;
I2S3 : SPI_Registers renames SPI3;
end STM32.SPIs;

9
library/source/f4/stm32-system_configuration.ads
View File

@ -1,4 +1,8 @@
package STM32.System_Configuration with Pure is
with STM32.Address_Map;
-- System Configuration Controller
package STM32.System_Configuration is
type Memory_Mapping is (
Main_Flash,
@ -139,4 +143,7 @@ package STM32.System_Configuration with Pure is
CMPCR at 16#20# range 0 .. 31;
end record;
SYSCFG : SYSCFG_Registers with Volatile, Import,
Address => Address_Map.SYSCFG;
end STM32.System_Configuration;

22
library/source/f4/stm32-timers.ads
View File

@ -1,3 +1,7 @@
with STM32.Address_Map;
-- Timers, Including Basic, General Purpose (both kids) and Advanced Control
package STM32.Timers is
-- There's some differences in SVD files between devices,
@ -601,10 +605,24 @@ package STM32.Timers is
OPTR at 16#50# range 0 .. 15; -- - * - - - * -
end record;
TIM1: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM1;
TIM2: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM2;
TIM3: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM3;
TIM4: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM4;
TIM5: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM5;
TIM6: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM6;
TIM7: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM7;
TIM8: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM8;
TIM9: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM9;
TIM10: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM10;
TIM11: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM11;
TIM12: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM12;
TIM13: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM13;
TIM14: aliased Timer_Registers with Volatile, Import, Address => Address_Map.TIM14;
-- In F469 TIM9,TIM12 no CR2
-- check:
-- in F412,F413 TIM12 CCMR1 IC2F have 4 bits?
-- There are register fields in SVD, but Docs know nothi about:
-- in F412,F413 TIM6,7 CR1 have field UIFREMAP
-- in F412,F413 TIM6,7 CNT have field UIFCPY

19
library/source/f4/stm32-usarts.ads
View File

@ -1,4 +1,10 @@
package STM32.USARTs with Pure is
with STM32.Address_Map;
-- Universal (Synchronous-)Asynchronous Receivers-Transmitters
--
-- Available in all STM32F4 device in different quantities
package STM32.USARTs is
-- NOTE: USARTs ans UARTs are on APB
-- Registers should be written as a whole
@ -249,6 +255,17 @@ package STM32.USARTs with Pure is
GTPR at 16#18# range 0 .. 31;
end record;
USART1: aliased USART_Registers with Volatile, Import, Address => Address_Map.USART1;
USART2: aliased USART_Registers with Volatile, Import, Address => Address_Map.USART2;
USART3: aliased USART_Registers with Volatile, Import, Address => Address_Map.USART3;
UART4: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART4;
UART5: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART5;
USART6: aliased USART_Registers with Volatile, Import, Address => Address_Map.USART6;
UART7: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART7;
UART8: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART8;
UART9: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART9;
UART10: aliased USART_Registers with Volatile, Import, Address => Address_Map.UART10;
function Baud_Rate (
Speed: Positive;
OVER8: Boolean;

498
library/source/f4/stm32-usb_otg-device.ads Normal file
View File

@ -0,0 +1,498 @@
-- OTG USB Device mode
package STM32.USB_OTG.Device is
-- Registers renamed
-- Orig. register Register name here
--
-- DIEPCTLx DIEP (x).CTL
-- DIEPINTx DIEP (x).INT
-- DIEPTSIZx DIEP (x).TSIZ
-- DIEPDMAx DIEP (x).DMA
-- DTXFSTSx DIEP (x).TXFSTS
-- DOEPCTLx DOEP (x).CTL
-- DOEPINTx DOEP (x).INT
-- DOEPTSIZx DOEP (x).TSIZ
--
-- Fields renamed
-- Register Orig. field Field name here
--
-- DAINT IEPINT IEP (array)
-- DAINT OEPINT OEP (array)
-- DAINTMSK IEPM IEP (array)
-- DAINTMSK OEPM OEP (array)
-- DEACHINT IEP1INT IEP (1)
-- DEACHINT OEP1INT OEP (1)
-- DEACHINTMSK IEP1INTM IEP (1)
-- DEACHINTMSK OEP1INTM OEP (1)
-- DIEPMSK * corresponding fields in DIEPINT
-- DIEPEACKMSKx * corresponding fields in DIEPINT
-- DOEPMSK * corresponding fields in DOEPINT
-- DOEPEACHMSKx * corresponding fields in DOEPINT
-- DAINTMSK IEPM IEP
-- DAINTMSK OEPM OEP
-- DIEPEMPMSK INEPTXFEM IEP
type Device_Address is range 0 .. 127;
-- DCFG
type Device_Speed is (
High_Speed,
Full_Speed_using_HS,
Full_Speed_using_FS)
with Size => 2;
for Device_Speed use (
High_Speed => 2#00#,
Full_Speed_using_HS => 2#01#,
Full_Speed_using_FS => 2#11#);
type Periodic_Frame_Interval is (
Frame_80_Percent,
Frame_85_Percent,
Frame_90_Percent,
Frame_95_Percent)
with Size => 2;
type Periodic_Schedule_Interval is (
Schedule_25_Percent,
Schedule_50_Percent,
Schedule_75_Percent)
with Size => 2;
for Periodic_Schedule_Interval use (
Schedule_25_Percent => 2#00#,
Schedule_50_Percent => 2#01#,
Schedule_75_Percent => 3#10#);
type Device_Configuration_Register is record
DSPD : Device_Speed := High_Speed; -- Device speed
NZLSOHSK : Boolean := False; -- Nonzero-length status OUT handshake send received OUT packet
Unused_3 : Unused_1_Bit := 0;
DAD : Device_Address := 0; -- Device address
PFIVL : Periodic_Frame_Interval := Frame_80_Percent; -- Periodic (micro)frame interval
Unused_13 : Unused_1_Bit := 0;
XCVRDLY : Boolean := False; -- Transceiver delay enable (HS only)
ERRATIM : Boolean := False; -- Erratic error interrupt mask
Unused_16 : Unused_8_Bits := 16#02#;
PERSCHIVL : Periodic_Schedule_Interval := Schedule_75_Percent; -- Periodic schedule interval (HS only)
Unused_26 : Unused_6_Bits := 0;
end record with Size => 32;
for Device_Configuration_Register use record
DSPD at 0 range 0 .. 1;
NZLSOHSK at 0 range 2 .. 2;
Unused_3 at 0 range 3 .. 3;
DAD at 0 range 4 .. 10;
PFIVL at 0 range 11 .. 12;
Unused_13 at 0 range 13 .. 13;
XCVRDLY at 0 range 14 .. 14;
ERRATIM at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 23;
PERSCHIVL at 0 range 24 .. 25;
Unused_26 at 0 range 26 .. 31;
end record;
-- DCTL
type Test_Mode is (
No_Test,
Test_J,
Test_K,
Test_SE0_NAK,
Test_Packet,
Test_Force_Enable)
with Size => 3;
for Test_Mode use (
No_Test => 2#000#,
Test_J => 2#001#,
Test_K => 2#010#,
Test_SE0_NAK => 2#011#,
Test_Packet => 2#100#,
Test_Force_Enable => 2#101#);
type Device_Control_Register is record
RWUSIG : Boolean := False; -- Remote wakeup signaling
SDIS : Boolean := False; -- Soft disconnect
GINSTS : Boolean := False; -- Global IN NAK status
GONSTS : Boolean := False; -- Global OUT NAK status
TCTL : Test_Mode := No_Test; -- Test control
SGINAK : Boolean := False; -- Set global IN NAK
CGINAK : Boolean := False; -- Clear global IN NAK
SGONAK : Boolean := False; -- Set global OUT NAK
CGONAK : Boolean := False; -- Clear global OUT NAK
POPRGDNE : Boolean := False; -- Power-on programming done
Unused_12 : Unused_6_Bits := 0;
DSBESLRJCT : Boolean := False; -- Deep sleep BESL reject
Unused_19 : Unused_13_Bits := 0;
end record with Size => 32;
for Device_Control_Register use record
RWUSIG at 0 range 0 .. 0;
SDIS at 0 range 1 .. 1;
GINSTS at 0 range 2 .. 2;
GONSTS at 0 range 3 .. 3;
TCTL at 0 range 4 .. 6;
SGINAK at 0 range 7 .. 7;
CGINAK at 0 range 8 .. 8;
SGONAK at 0 range 9 .. 9;
CGONAK at 0 range 10 .. 10;
POPRGDNE at 0 range 11 .. 11;
Unused_12 at 0 range 12 .. 17;
DSBESLRJCT at 0 range 18 .. 18;
Unused_19 at 0 range 19 .. 31;
end record;
-- DSTS
type Device_Status_Register is record
SUSPSTS : Boolean; -- Suspend status
ENUMSPD : Device_Speed; -- Enumerated speed
EERR : Boolean; -- Erratic error
Unused_4 : Unused_4_Bits;
FNSOF : Integer range 0 .. 2**14 - 1; -- Frame number of the received SOF
DEVLNSTS_DM : Integer range 0 .. 1; -- Device line status - D-
DEVLNSTS_DP : Integer range 0 .. 1; -- Device line status - D+
Unused_24 : Unused_8_Bits;
end record with Size => 32;
for Device_Status_Register use record
SUSPSTS at 0 range 0 .. 0;
ENUMSPD at 0 range 1 .. 2;
EERR at 0 range 3 .. 3;
Unused_4 at 0 range 4 .. 7;
FNSOF at 0 range 8 .. 21;
DEVLNSTS_DM at 0 range 22 .. 22;
DEVLNSTS_DP at 0 range 23 .. 23;
Unused_24 at 0 range 24 .. 31;
end record;
-- DIEPMSK, DIEPEACKMSKx, DIEPINTx, DIEPEACHMSK1
type Device_In_Endpoint_Interrupt_Register is record
XFRC : Boolean := False; -- Transfer completed interrupt
EPDISD : Boolean := False; -- Endpoint disabled interrupt
AHBERR : Boolean := False; -- AHB error (HS only)
TOC : Boolean := False; -- Timeout condition (non-isochronous endpoints)
ITTXFE : Boolean := False; -- IN token received when TxFIFO empty
INEPNM : Boolean := False; -- IN token received with EP mismatch
INEPNE : Boolean := False; -- IN endpoint NAK effective
TXFE : Boolean := False; -- Transmit FIFO Empty (Half or completely, see TXFELVL)
TXFIFOUDRN : Boolean := False; -- FIFO underrun
BI : Boolean := False; -- BNA interrupt (?)
Unused_10 : Unused_1_Bit := 0;
PKTDRPSTS : Boolean := False; -- Packet dropped status (not interrupt, not masked)
Unused_12 : Unused_1_Bit := 0;
NAK : Boolean := False; -- NAK interrupt
Unused_14 : Unused_18_Bits := 0;
end record with Size => 32;
for Device_In_Endpoint_Interrupt_Register use record
XFRC at 0 range 0 .. 0;
EPDISD at 0 range 1 .. 1;
AHBERR at 0 range 2 .. 2;
TOC at 0 range 3 .. 3;
ITTXFE at 0 range 4 .. 4;
INEPNM at 0 range 5 .. 5;
INEPNE at 0 range 6 .. 6;
TXFE at 0 range 7 .. 7;
TXFIFOUDRN at 0 range 8 .. 8;
BI at 0 range 9 .. 9;
Unused_10 at 0 range 10 .. 10;
PKTDRPSTS at 0 range 11 .. 11;
Unused_12 at 0 range 12 .. 12;
NAK at 0 range 13 .. 13;
Unused_14 at 0 range 14 .. 31;
end record;
-- DOEPMSK, DOEPINT, DOEPEACHMSK1
type Device_Out_Endpoint_Interrupt_Register is record
XFRC : Boolean := False; -- Transfer completed interrupt
EPDISD : Boolean := False; -- Endpoint disabled interrupt
AHBERR : Boolean := False; -- AHB error (HS only)
STUP : Boolean := False; -- SETUP phase done
OTEPDIS : Boolean := False; -- OUT token received when endpoint disabled
STSPHSRX : Boolean := False; -- Status phase received for control write
B2BSTUP : Boolean := False; -- Back-to-back SETUP packets received (HS only)
Unused_7 : Unused_1_Bit := 0;
OUTPKTERR : Boolean := False; -- OUT packet error mask
BOI : Boolean := False; -- BNA interrupt (?)
Unused_10 : Unused_2_Bits := 0;
BERR : Boolean := False; -- Babble error
NAK : Boolean := False; -- NAK interrupt
NYET : Boolean := False; -- NYET interrupt (HS only)
STPKTRX : Boolean := False; -- Setup packet received (HS only, not maskable?)
Unused_16 : Unused_16_Bits := 0;
end record with Size => 32;
for Device_Out_Endpoint_Interrupt_Register use record
XFRC at 0 range 0 .. 0;
EPDISD at 0 range 1 .. 1;
AHBERR at 0 range 2 .. 2;
STUP at 0 range 3 .. 3;
OTEPDIS at 0 range 4 .. 4;
STSPHSRX at 0 range 5 .. 5;
B2BSTUP at 0 range 6 .. 6;
Unused_7 at 0 range 7 .. 7;
OUTPKTERR at 0 range 8 .. 8;
BOI at 0 range 9 .. 9;
Unused_10 at 0 range 10 .. 11;
BERR at 0 range 12 .. 12;
NAK at 0 range 13 .. 13;
NYET at 0 range 14 .. 14;
STPKTRX at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
-- DAINT, DAINTMSK, DIEPEMPMSK
type Channel_Set is array (Channel_Number) of Boolean with Pack, Default_Component_Value => False;
type Device_Endpoint_Set_Register is record
IEP : Channel_Set; -- IN endpoints
OEP : Channel_Set; -- OUT endpoints
end record with Size => 32;
for Device_Endpoint_Set_Register use record
IEP at 0 range 0 .. 15;
OEP at 0 range 16 .. 31;
end record;
-- note 1: DIEPEMPMSK have only INEPTXFEM renamed to IEP
-- DVBUSDIS, DVBPULSE
type Device_SRP_VBus_Time_Register is new Integer range 0 .. 2**16 - 1;
-- DTHRCTL
type Device_Threshold_Control_Register is record
NONISOTHREN : Boolean := False; -- Nonisochronous IN endpoints th
ISOTHREN : Boolean := False; -- ISO IN endpoint threshold
TXTHRLEN : Integer range 0 .. 2**9 - 1 := 0; -- Transmit threshold length
Unused_11 : Unused_5_Bits := 0;
RXTHREN : Boolean := False; -- Receive threshold enable
RXTHRLEN : Integer range 0 .. 2**9 - 1 := 0; -- Receive threshold length
Unused_26 : Unused_1_Bit := 0;
ARPEN : Boolean := False; -- Arbiter parking enable
Unused_28 : Unused_4_Bits := 0;
end record with Size => 32;
for Device_Threshold_Control_Register use record
NONISOTHREN at 0 range 0 .. 0;
ISOTHREN at 0 range 1 .. 1;
TXTHRLEN at 0 range 2 .. 10;
Unused_11 at 0 range 11 .. 15;
RXTHREN at 0 range 16 .. 16;
RXTHRLEN at 0 range 17 .. 25;
Unused_26 at 0 range 26 .. 26;
ARPEN at 0 range 27 .. 27;
Unused_28 at 0 range 28 .. 31;
end record;
-- DIEPCTLx
subtype Endpoint_0_Maximum_Packet_Size is Packet_Byte_Count range 0 .. 3;
Max_64_Bytes : constant Endpoint_0_Maximum_Packet_Size := 0;
Max_32_Bytes : constant Endpoint_0_Maximum_Packet_Size := 1;
Max_16_Bytes : constant Endpoint_0_Maximum_Packet_Size := 2;
Max_8_Bytes : constant Endpoint_0_Maximum_Packet_Size := 3;
type Endpoint_Type is (
Control_Endpoint,
Isochronous_Endpoint,
Bulk_Endpoint,
Interrupt_Endpoint)
with Size => 2;
type Device_In_Endpoint_Control_Register is record
MPSIZ : Packet_Byte_Count := 0; -- Maximum packet size (Special meaning in EP 0!)
Unused_11 : Unused_4_Bits := 0;
USBAEP : Boolean := False; -- USB active endpoint
EONUM_DPID : Integer range 0 .. 1 := 0; -- Even/odd frame / Endpoint data PID (not in EP 0)
NAKSTS : Boolean := False; -- NAK status
EPTYP : Endpoint_Type := Control_Endpoint; -- Endpoint type (should be Control in EP 0)
Unused_20 : Unused_1_Bit := 0;
STALL : Boolean := False; -- STALL handshake
TXFNUM : Channel_Number := 0; -- TxFIFO number
CNAK : Boolean := False; -- Clear NAK
SNAK : Boolean := False; -- Set NAK
SD0PID_SEVNFRM : Boolean := False; -- Set DATA0 PID / set even frame (not in EP 0)
SODDFRM : Boolean := False; -- Set odd frame (not in EP 0)
EPDIS : Boolean := False; -- Endpoint disable
EPENA : Boolean := False; -- Endpoint enable
end record with Size => 32;
for Device_In_Endpoint_Control_Register use record
MPSIZ at 0 range 0 .. 10;
Unused_11 at 0 range 11 .. 14;
USBAEP at 0 range 15 .. 15;
EONUM_DPID at 0 range 16 .. 16;
NAKSTS at 0 range 17 .. 17;
EPTYP at 0 range 18 .. 19;
Unused_20 at 0 range 20 .. 20;
STALL at 0 range 21 .. 21;
TXFNUM at 0 range 22 .. 25;
CNAK at 0 range 26 .. 26;
SNAK at 0 range 27 .. 27;
SD0PID_SEVNFRM at 0 range 28 .. 28;
SODDFRM at 0 range 29 .. 29;
EPDIS at 0 range 30 .. 30;
EPENA at 0 range 31 .. 31;
end record;
-- DIEPTSIZx
subtype Transfer_Byte_Count is Storage_Count range 0 .. 2**11 - 1;
subtype Endpoint_0_Transfer_Byte_Count is Transfer_Byte_Count range 0 .. 2**7 - 1;
subtype Packet_Count is Integer range 0 .. 2**10 - 1;
subtype Endpoint_0_Packet_Count is Packet_Count range 0 .. 3;
subtype Multi_Count is Integer range 0 .. 3;
type Device_In_Endpoint_Transfer_Size_Register is record
XFRSIZ : Transfer_Byte_Count := 0; -- Transfer size (limited range for EP 0)
PKTCNT : Packet_Count := 0; -- Packet count (limited range for EP 0)
MCNT : Multi_Count := 0; -- Multi count (not in EP 0)
Unused_31 : Unused_1_Bit := 0;
end record with Size => 32;
for Device_In_Endpoint_Transfer_Size_Register use record
XFRSIZ at 0 range 0 .. 18;
PKTCNT at 0 range 19 .. 28;
MCNT at 0 range 29 .. 30;
Unused_31 at 0 range 31 .. 31;
end record;
-- DTXFSTSx
type Device_In_Endpoint_FIFO_Status_Register is record
INEPTFSAV : Integer range 0 .. 2**16 - 1; -- IN endpoint TxFIFO space
Unused_16 : Unused_16_Bits;
end record with Size => 32;
for Device_In_Endpoint_FIFO_Status_Register use record
INEPTFSAV at 0 range 0 .. 15;
Unused_16 at 0 range 16 .. 31;
end record;
--
type Device_In_Endpoint_Registers is record
CTL : Device_In_Endpoint_Control_Register;
INT : Device_In_Endpoint_Interrupt_Register;
TSIZ : Device_In_Endpoint_Transfer_Size_Register;
DMA : Address_Register;
TXFSTS : Device_In_Endpoint_FIFO_Status_Register;
end record with Size => 8 * 32;
for Device_In_Endpoint_Registers use record
CTL at 16#00# range 0 .. 31;
INT at 16#08# range 0 .. 31;
TSIZ at 16#10# range 0 .. 31;
DMA at 16#14# range 0 .. 31;
TXFSTS at 16#18# range 0 .. 31;
end record;
type Device_In_Endpoint_Register_Array is array (0 .. 7) of Device_In_Endpoint_Registers;
-- DOEPCTLx
type Device_Out_Endpoint_Control_Register is record
MPSIZ : Packet_Byte_Count := 0; -- Maximum packet size (Special meaning in EP 0!)
Unused_11 : Unused_4_Bits := 0;
USBAEP : Boolean := False; -- USB active endpoint
EONUM_DPID : Integer range 0 .. 1 := 0; -- Even/odd frame / Endpoint data PID (not in EP 0)
NAKSTS : Boolean := False; -- NAK status
EPTYP : Endpoint_Type := Control_Endpoint; -- Endpoint type (should be Control in EP 0)
SNPM : Boolean := False; -- Snoop mode
STALL : Boolean := False; -- STALL handshake
Unused_22 : Unused_4_Bits := 0;
CNAK : Boolean := False; -- Clear NAK
SNAK : Boolean := False; -- Set NAK
SD0PID_SEVNFRM : Boolean := False; -- Set DATA0 PID / set even frame (not in EP 0)
SD1PID_SODDFRM : Boolean := False; -- Set DATA1 PID / Set odd frame (not in EP 0)
EPDIS : Boolean := False; -- Endpoint disable
EPENA : Boolean := False; -- Endpoint enable
end record with Size => 32;
for Device_Out_Endpoint_Control_Register use record
MPSIZ at 0 range 0 .. 10;
Unused_11 at 0 range 11 .. 14;
USBAEP at 0 range 15 .. 15;
EONUM_DPID at 0 range 16 .. 16;
NAKSTS at 0 range 17 .. 17;
EPTYP at 0 range 18 .. 19;
SNPM at 0 range 20 .. 20;
STALL at 0 range 21 .. 21;
Unused_22 at 0 range 22 .. 25;
CNAK at 0 range 26 .. 26;
SNAK at 0 range 27 .. 27;
SD0PID_SEVNFRM at 0 range 28 .. 28;
SD1PID_SODDFRM at 0 range 29 .. 29;
EPDIS at 0 range 30 .. 30;
EPENA at 0 range 31 .. 31;
end record;
-- DOEPTSIZx
type Device_Out_Endpoint_Transfer_Size_Register is record
XFRSIZ : Transfer_Byte_Count := 0; -- Transfer size (limited range for EP 0)
PKTCNT : Packet_Count := 0; -- Packet count (limited range for EP 0)
RXDPID_STUPCNT : Multi_Count := 0; -- Received data PID (not in EP 0) / SETUP packet count
Unused_31 : Unused_1_Bit := 0;
end record with Size => 32;
for Device_Out_Endpoint_Transfer_Size_Register use record
XFRSIZ at 0 range 0 .. 18;
PKTCNT at 0 range 19 .. 28;
RXDPID_STUPCNT at 0 range 29 .. 30;
Unused_31 at 0 range 31 .. 31;
end record;
--
type Device_Out_Endpoint_Registers is record
CTL : Device_Out_Endpoint_Control_Register;
INT : Device_Out_Endpoint_Interrupt_Register;
TSIZ : Device_Out_Endpoint_Transfer_Size_Register;
end record with Size => 8 * 32;
for Device_Out_Endpoint_Registers use record
CTL at 16#00# range 0 .. 31;
INT at 16#08# range 0 .. 31;
TSIZ at 16#10# range 0 .. 31;
end record;
type Device_Out_Endpoint_Register_Array is array (0 .. 7) of Device_Out_Endpoint_Registers;
--
type DEVICE_Registers is record
DCFG : Device_Configuration_Register;
DCTL : Device_Control_Register;
DSTS : Device_Status_Register;
DIEPMSK : Device_In_Endpoint_Interrupt_Register;
DOEPMSK : Device_Out_Endpoint_Interrupt_Register;
DAINT : Device_Endpoint_Set_Register;
DAINTMSK : Device_Endpoint_Set_Register;
DVBUSDIS : Device_SRP_VBus_Time_Register;
DVBUSPULSE : Device_SRP_VBus_Time_Register;
DTHRCTL : Device_Threshold_Control_Register;
DIEPEMPMSK : Device_Endpoint_Set_Register;
DEACHINT : Device_Endpoint_Set_Register; -- Only channel 1 is there.
DEACHINTMSK : Device_Endpoint_Set_Register; -- Only channel 1 is there.
DIEPEACHMSK1 : Device_In_Endpoint_Interrupt_Register;
DOEPEACHMSK1 : Device_Out_Endpoint_Interrupt_Register;
DIEP : Device_In_Endpoint_Register_Array;
DOEP : Device_In_Endpoint_Register_Array;
end record;
for DEVICE_Registers use record
DCFG at 16#00# range 0 .. 31;
DCTL at 16#04# range 0 .. 31;
DSTS at 16#08# range 0 .. 31;
DIEPMSK at 16#10# range 0 .. 31;
DOEPMSK at 16#14# range 0 .. 31;
DAINT at 16#18# range 0 .. 31;
DAINTMSK at 16#1C# range 0 .. 31;
DVBUSDIS at 16#28# range 0 .. 31;
DVBUSPULSE at 16#2C# range 0 .. 31;
DTHRCTL at 16#30# range 0 .. 31;
DIEPEMPMSK at 16#34# range 0 .. 31;
DEACHINT at 16#38# range 0 .. 31;
DEACHINTMSK at 16#3C# range 0 .. 31;
DIEPEACHMSK1 at 16#44# range 0 .. 31;
DOEPEACHMSK1 at 16#84# range 0 .. 31;
DIEP at 16#100# range 0 .. 8 * 8 * 32 - 1;
DOEP at 16#300# range 0 .. 8 * 8 * 32 - 1;
end record;
end STM32.USB_OTG.Device;

560
library/source/f4/stm32-usb_otg.ads Normal file
View File

@ -0,0 +1,560 @@
with System.Storage_Elements;
use System.Storage_Elements;
-- USB On-the-Go controllers
package STM32.USB_OTG is
-- Both USB_OTG_FS and USB_OTG_HS have the same register structure.
type OTG_Role is (USB_Device, USB_Host) with Size => 1;
type Extended_Channel_Number is range 0 .. 31; -- Channel / Tx FIFO / Endpoint numbers
Non_Periodic_Tx_FIFO : constant Extended_Channel_Number := 2#00000#; -- Non-periodic Tx FIFO in host mode
Periodic_Tx_FIFO : constant Extended_Channel_Number := 2#00001#; -- Periodic Tx FIFO in host mode
All_Tx_FIFOs : constant Extended_Channel_Number := 2#10000#; -- Flush all Tx FIFOs
subtype Channel_Number is Extended_Channel_Number range 0 .. 15;
-- GOTGCTL
type Connector_Status is (
A_Device,
B_Device)
with Size => 1;
type Debounce_Time is (
Long_Debounce,
Short_Debounce)
with Size => 1;
type General_Control_and_Status_Register is record
SRQSCS : Boolean := False; -- Session request success
SRQ : Boolean := False; -- Session request
Unused_2 : Unused_6_Bits := 0;
HNGSCS : Boolean := False; -- Host negotiation success
HNPRQ : Boolean := False; -- HNP request
HSHNPEN : Boolean := False; -- Host set HNP enable
DHNPEN : Boolean := True; -- Device HNP enabled
Unused_12 : Unused_4_Bits := 0;
CIDSTS : Connector_Status := A_Device; -- Connector ID status
DBCT : Debounce_Time := Long_Debounce; -- Long/short debounce time
ASVLD : Boolean := False; -- A-session valid
BSVLD : Boolean := False; -- B-session valid
Unused_20 : Unused_12_Bits;
end record with Size => 32;
for General_Control_and_Status_Register use record
SRQSCS at 0 range 0 .. 0;
SRQ at 0 range 1 .. 1;
Unused_2 at 0 range 2 .. 7;
HNGSCS at 0 range 8 .. 8;
HNPRQ at 0 range 9 .. 9;
HSHNPEN at 0 range 10 .. 10;
DHNPEN at 0 range 11 .. 11;
Unused_12 at 0 range 12 .. 15;
CIDSTS at 0 range 16 .. 16;
DBCT at 0 range 17 .. 17;
ASVLD at 0 range 18 .. 18;
BSVLD at 0 range 19 .. 19;
Unused_20 at 0 range 20 .. 31;
end record;
-- GOTGINT
type General_Interrupt_Register is record
Unused_0 : Unused_2_Bits := 0;
SEDET : Boolean := False; -- Session end detected
Unused_3 : Unused_5_Bits := 0;
SRSSCHG : Boolean := False; -- Session request success status
HNSSCHG : Boolean := False; -- Host negotiation success statu
Unused_10 : Unused_7_Bits := 0;
HNGDET : Boolean := False; -- Host negotiation detected
ADTOCHG : Boolean := False; -- A-device timeout change
DBCDNE : Boolean := False; -- Debounce done
Unused_20 : Unused_12_Bits := 0;
end record with Size => 32;
for General_Interrupt_Register use record
Unused_0 at 0 range 0 .. 1;
SEDET at 0 range 2 .. 2;
Unused_3 at 0 range 3 .. 7;
SRSSCHG at 0 range 8 .. 8;
HNSSCHG at 0 range 9 .. 9;
Unused_10 at 0 range 10 .. 16;
HNGDET at 0 range 17 .. 17;
ADTOCHG at 0 range 18 .. 18;
DBCDNE at 0 range 19 .. 19;
Unused_20 at 0 range 20 .. 31;
end record;
-- GAHBCFG
type Burst_Length is (
Single,
INCR,
INCR4,
INCR8)
with Size => 4;
for Burst_Length use (
Single => 2#0000#,
INCR => 2#0001#,
INCR4 => 2#0011#,
INCR8 => 2#0101#);
type FIFO_Empty_Level is (
Half_Empty,
Completely_Empty)
with Size => 1;
type General_AHB_Configuration_Register is record
GINTMSK : Boolean := False; -- Global interrupt mask (also GINT)
HBSTLEN : Burst_Length := Single; -- Burst length/type (HS only)
DMAEN : Boolean := False; -- DMA enable (HS only)
Unused_6 : Unused_1_Bit := 0;
TXFELVL : FIFO_Empty_Level := Half_Empty; -- Non-periodic TxFIFO empty level
PTXFELVL : FIFO_Empty_Level := Half_Empty; -- Periodic TxFIFO empty
Unused_9 : Unused_23_Bits;
end record with Size => 32;
for General_AHB_Configuration_Register use record
GINTMSK at 0 range 0 .. 0;
HBSTLEN at 0 range 1 .. 4;
DMAEN at 0 range 5 .. 5;
Unused_6 at 0 range 6 .. 6;
TXFELVL at 0 range 7 .. 7;
PTXFELVL at 0 range 8 .. 8;
Unused_9 at 0 range 9 .. 31;
end record;
-- GUSBCFG
type PHY_Select is (
External_ULPI,
Internal)
with Size => 1;
subtype Turnaround_Time is Integer range 0 .. 15;
type DLine_Pulsing is (
UTMI_TxValid,
UTMI_TermSel)
with Size => 1;
type General_USB_Configuration_Register is record
TOCAL : Integer range 0 .. 7 := 0; -- FS timeout calibration
Unused_3 : Unused_3_Bits := 0;
PHYSEL : PHY_Select; -- USB 2.0 high-speed ULPI PHY or
Unused_7 : Unused_1_Bit := 0;
SRPCAP : Boolean := False; -- SRP-capable
HNPCAP : Boolean := False; -- HNP-capable
TRDT : Integer range 0 .. 15 := 5; -- USB turnaround time
Unused_14 : Unused_1_Bit := 0;
PHYLPCS : Boolean := False; -- PHY Low-power clock select
Unused_16 : Unused_1_Bit := 0;
ULPIFSLS : Boolean := False; -- ULPI FS/LS interface select (HS only)
ULPIAR : Boolean := False; -- ULPI Auto-resume (HS only)
ULPICSM : Boolean := False; -- ULPI Clock SuspendM (HS only)
ULPIEVBUSD : Boolean := False; -- ULPI External VBUS Drive (HS only)
ULPIEVBUSI : Boolean := False; -- ULPI external VBUS Comparator (HS only)
TSDPS : DLine_Pulsing := UTMI_TxValid; -- TermSel DLine pulsing selection (HS only)
PCCI : Boolean := False; -- Indicator complement (HS only)
PTCI : Boolean := False; -- Indicator pass through (HS only)
ULPIIPD : Boolean := False; -- ULPI interface protection disable (HS only)
Unused_26 : Unused_3_Bits := 0;
FHMOD : Boolean := False; -- Forced host mode
FDMOD : Boolean := False; -- Forced peripheral device mode
CTXPKT : Boolean := False; -- Corrupt Tx packet (used only for debug purposes!)
end record with Size => 32;
for General_USB_Configuration_Register use record
TOCAL at 0 range 0 .. 2;
Unused_3 at 0 range 3 .. 5;
PHYSEL at 0 range 6 .. 6;
Unused_7 at 0 range 7 .. 7;
SRPCAP at 0 range 8 .. 8;
HNPCAP at 0 range 9 .. 9;
TRDT at 0 range 10 .. 13;
Unused_14 at 0 range 14 .. 14;
PHYLPCS at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 16;
ULPIFSLS at 0 range 17 .. 17;
ULPIAR at 0 range 18 .. 18;
ULPICSM at 0 range 19 .. 19;
ULPIEVBUSD at 0 range 20 .. 20;
ULPIEVBUSI at 0 range 21 .. 21;
TSDPS at 0 range 22 .. 22;
PCCI at 0 range 23 .. 23;
PTCI at 0 range 24 .. 24;
ULPIIPD at 0 range 25 .. 25;
Unused_26 at 0 range 26 .. 28;
FHMOD at 0 range 29 .. 29;
FDMOD at 0 range 30 .. 30;
CTXPKT at 0 range 31 .. 31;
end record;
-- OTG_HS_GRSTCTL
type General_Reset_Register is record
CSRST : Boolean := False; -- Core soft reset
HSRST : Boolean := False; -- HCLK soft reset (may be not available)
FCRST : Boolean := False; -- Host frame counter reset
Unused_3 : Unused_1_Bit := 0;
RXFFLSH : Boolean := False; -- RxFIFO flush
TXFFLSH : Boolean := False; -- TxFIFO flush
TXFNUM : Extended_Channel_Number := 0; -- TxFIFO number that must be flushed
Unused_11 : Unused_19_Bits := 0;
DMAREQ : Boolean := False; -- DMA request signal (HS only, debug)
AHBIDL : Boolean := True; -- AHB master idle
end record with Size => 32;
for General_Reset_Register use record
CSRST at 0 range 0 .. 0;
HSRST at 0 range 1 .. 1;
FCRST at 0 range 2 .. 2;
Unused_3 at 0 range 3 .. 3;
RXFFLSH at 0 range 4 .. 4;
TXFFLSH at 0 range 5 .. 5;
TXFNUM at 0 range 6 .. 10;
Unused_11 at 0 range 11 .. 29;
DMAREQ at 0 range 30 .. 30;
AHBIDL at 0 range 31 .. 31;
end record;
-- GINTSTS, GINTMSK
type General_Core_Interrupt_Register is record
CMOD : OTG_Role := USB_Host; -- Current mode of operation
MMIS : Boolean := False; -- Mode mismatch interrupt
OTGINT : Boolean := False; -- OTG interrupt
SOF : Boolean := False; -- Start of frame
RXFLVL : Boolean := False; -- Rx FIFO non-empty
NPTXFE : Boolean := False; -- Nonperiodic Tx FIFO empty
GINAKEFF : Boolean := False; -- Global IN nonperiodic NAK effective
GONAKEFF : Boolean := False; -- Global OUT NAK effective
Unused_8 : Unused_2_Bits := 0;
ESUSP : Boolean := False; -- Early suspend
USBSUSP : Boolean := False; -- USB suspend
USBRST : Boolean := False; -- USB reset
ENUMDNE : Boolean := False; -- Enumeration done
ISOODRP : Boolean := False; -- Isochronous OUT packet dropped
EOPF : Boolean := False; -- End of periodic frame
Unused_16 : Unused_2_Bits := 0;
IEPINT : Boolean := False; -- IN endpoint interrupt
OEPINT : Boolean := False; -- OUT endpoint interrupt
IISOIXFR : Boolean := False; -- Incomplete isochronous IN transfer
IPXFR_INCOMPISOOUT : Boolean := False; -- Incomplete periodic transfer
DATAFSUSP : Boolean := False; -- Data fetch suspended (HS only)
RSTDET : Boolean := False; -- Reset detected (FS only)
HPRTINT : Boolean := False; -- Host port interrupt
HCINT : Boolean := False; -- Host channels interrupt
PTXFE : Boolean := False; -- Periodic TxFIFO empty
LPMINT : Boolean := False; -- LPM interrupt (HS only?)
CIDSCHG : Boolean := False; -- Connector ID status change
DISCINT : Boolean := False; -- Disconnect detected
SRQINT : Boolean := False; -- Session request/new session detected
WKUPINT : Boolean := False; -- Resume/remote wakeup detected
end record with Size => 32;
for General_Core_Interrupt_Register use record
CMOD at 0 range 0 .. 0;
MMIS at 0 range 1 .. 1;
OTGINT at 0 range 2 .. 2;
SOF at 0 range 3 .. 3;
RXFLVL at 0 range 4 .. 4;
NPTXFE at 0 range 5 .. 5;
GINAKEFF at 0 range 6 .. 6;
GONAKEFF at 0 range 7 .. 7;
Unused_8 at 0 range 8 .. 9;
ESUSP at 0 range 10 .. 10;
USBSUSP at 0 range 11 .. 11;
USBRST at 0 range 12 .. 12;
ENUMDNE at 0 range 13 .. 13;
ISOODRP at 0 range 14 .. 14;
EOPF at 0 range 15 .. 15;
Unused_16 at 0 range 16 .. 17;
IEPINT at 0 range 18 .. 18;
OEPINT at 0 range 19 .. 19;
IISOIXFR at 0 range 20 .. 20;
IPXFR_INCOMPISOOUT at 0 range 21 .. 21;
DATAFSUSP at 0 range 22 .. 22;
RSTDET at 0 range 23 .. 23;
HPRTINT at 0 range 24 .. 24;
HCINT at 0 range 25 .. 25;
PTXFE at 0 range 26 .. 26;
LPMINT at 0 range 27 .. 27;
CIDSCHG at 0 range 28 .. 28;
DISCINT at 0 range 29 .. 29;
SRQINT at 0 range 30 .. 30;
WKUPINT at 0 range 31 .. 31;
end record;
-- GRXSTSR, GRXSTSP
subtype Packet_Byte_Count is Storage_Count range 0 .. 2**11 - 1;
type Data_PID is (DATA0, DATA1, DATA2, MDATA) with Size => 2;
type Packet_Status is (
No_Packet_Status,
Global_Out_NAK,
Data_Packet_Received,
Transfer_Completed,
SETUP_Transaction_Completed,
Data_Toggle_Error,
SETUP_Data_Packet_Received,
Channel_Halted)
with Size => 4;
for Packet_Status use (
No_Packet_Status => 2#0000#,
Global_Out_NAK => 2#0001#,
Data_Packet_Received => 2#0010#,
Transfer_Completed => 2#0011#,
SETUP_Transaction_Completed => 2#0100#,
Data_Toggle_Error => 2#0101#,
SETUP_Data_Packet_Received => 2#0110#,
Channel_Halted => 2#0111#);
type General_Receive_Status_Register is record
CHNUM_EPNUM : Channel_Number; -- Channel / Endpoint number
BCNT : Packet_Byte_Count; -- Byte count
DPID : Data_PID; -- Data PID
PKTSTS : Packet_Status; -- Packet status
FRMNUM : Integer range 0 .. 15; -- Frame number 4 modulo 16 (device only)
Unused_25 : Unused_2_Bits;
STSPHST : Boolean; -- Status phase start (not present on most models?)
Unused_28 : Unused_4_Bits;
end record with Size => 32;
for General_Receive_Status_Register use record
CHNUM_EPNUM at 0 range 0 .. 3;
BCNT at 0 range 4 .. 14;
DPID at 0 range 15 .. 16;
PKTSTS at 0 range 17 .. 20;
FRMNUM at 0 range 21 .. 24;
Unused_25 at 0 range 25 .. 26;
STSPHST at 0 range 27 .. 27;
Unused_28 at 0 range 28 .. 31;
end record;
-- GNPTXFSIZ aka TX0FSIZ, HPTTXFSIZ, DIEPTXFx
type Transmit_FIFO_Size_Register is record
FSA : Integer range 0 .. 2**16 - 1; -- Transmit RAM start
FD : Integer range 0 .. 2**16 - 1; -- TxFIFO depth
end record with Size => 32;
for Transmit_FIFO_Size_Register use record
FSA at 0 range 0 .. 15;
FD at 0 range 16 .. 31;
end record;
type Endpoint_Transmit_FIFO_Size_Registers is array (Channel_Number range 1 .. 7)
of Transmit_FIFO_Size_Register;
-- GNPTXSTS
type Transmit_Info is (
IN_OUT_Token,
Zero_Length_Transmit_Packet,
Channel_Halt_Command)
with Size => 2;
for Transmit_Info use (
IN_OUT_Token => 2#00#,
Zero_Length_Transmit_Packet => 2#01#,
Channel_Halt_Command => 2#11#);
type Non_Periodic_Transmit_Top is record
Term : Boolean;
Info : Transmit_Info; -- I really don't know how to name this field
Channel : Channel_Number;
Frame : Integer range 0 .. 1; -- Frame number modulo 2 (may not be available)
end record with Size => 8;
for Non_Periodic_Transmit_Top use record
Term at 0 range 0 .. 0;
Info at 0 range 1 .. 2;
Channel at 0 range 3 .. 6;
Frame at 0 range 7 .. 7;
end record;
type General_Non_Periodic_Tx_Status_Register is record
NPTXFSAV : Integer range 0 .. 2**16 - 1; -- Nonperiodic TxFIFO space available
NPTQXSAV : Integer range 0 .. 2**8 - 1; -- Nonperiodic transmit request queue space available
NPTXQTOP : Non_Periodic_Transmit_Top; -- Top of the nonperiodic transmit queue TODO:
end record with Size => 32;
for General_Non_Periodic_Tx_Status_Register use record
NPTXFSAV at 0 range 0 .. 15;
NPTQXSAV at 0 range 16 .. 23;
NPTXQTOP at 0 range 24 .. 31;
end record;
-- OTG_HS_GCCFG
type Core_Configuration_Flag is range 0 .. 31;
GCCR_PWRDWN : constant Core_Configuration_Flag := 16; -- Transceiver enable (True = enabled!)
type General_Core_Configuration_Register is array (Core_Configuration_Flag) of Boolean
with Pack, Size => 32;
-- Note: Fields in GCCR are very specific to device.
-- Always consult the manual no what to program. Do not change not defined fields.
-- CID
type Core_ID is new Unsigned_32;
package Cores is
F405 : constant Core_ID := 16#0000_1100#; -- Applies to whole family covered by RM0090
F469_FS : constant Core_ID := 16#0000_2000#; -- Applies to many others
F469_HS : constant Core_ID := 16#0000_2100#; -- Applies to many others
-- Seems like contents of GCCR depends on this value
end Cores;
-- GLPMCFG
type BES_Latency is (
Latency_125_Microseconds,
Latency_150_Microseconds,
Latency_200_Microseconds,
Latency_300_Microseconds,
Latency_400_Microseconds,
Latency_500_Microseconds,
Latency_1_Millisecond,
Latency_2_Milliseconds,
Latency_3_Milliseconds,
Latency_4_Milliseconds,
Latency_5_Milliseconds,
Latency_6_Milliseconds,
Latency_7_Milliseconds,
Latency_8_Milliseconds,
Latency_9_Milliseconds,
Latency_10_Milliseconds)
with Size => 4;
type BESL_Threshold is (
Threshold_75_Microseconds,
Threshold_100_Microseconds,
Threshold_150_Microseconds,
Threshold_250_Microseconds,
Threshold_350_Microseconds,
Threshold_450_Microseconds,
Threshold_950_Microseconds)
with Size => 4;
for BESL_Threshold use (
Threshold_75_Microseconds => 2#0000#,
Threshold_100_Microseconds => 2#0001#,
Threshold_150_Microseconds => 2#0010#,
Threshold_250_Microseconds => 2#0011#,
Threshold_350_Microseconds => 2#0100#,
Threshold_450_Microseconds => 2#0101#,
Threshold_950_Microseconds => 2#0110#);
type LPM_Response is (
LPM_ACK,
LPM_NYET,
LPM_STALL,
LPM_ERROR)
with Size => 2;
type Core_LPM_Configuration_Register is record
LPMEN : Boolean := False; -- LPM support enable
LPMACK : Boolean := False; -- LPM token acknowledge enable
BESL : BES_Latency := Latency_125_Microseconds; -- Best effort_service latency
REMWAKE : Boolean := False; -- bRemoteWake value
L1SSEN : Boolean := False; -- L1 Shallow Sleep enable
BESLTHRS : BESL_Threshold := Threshold_75_Microseconds; -- BESL threshold
L1DSEN : Boolean := False; -- L1 Deep Sleep enable
LPMRST : LPM_Response := LPM_ACK; -- LPM response
SLPSTS : Boolean := False; -- L1 Sleep status
L1RSMOK : Boolean := False; -- L1 Sleep state resume OK
LPMCHIDX : Channel_Number := 0; -- LPM channel index (host mode)
LPMRCNT : Integer range 0 .. 7 := 0; -- LPM retry count
SNDLPM : Boolean := False; -- Send LPM transaction
LPMRCNTSTS : Integer range 0 .. 7 := 0; -- LPM retry count status
ENBESL : Boolean := False; -- Enable BESL
Unused_29 : Unused_3_Bits := 0;
end record with Size => 32;
for Core_LPM_Configuration_Register use record
LPMEN at 0 range 0 .. 0;
LPMACK at 0 range 1 .. 1;
BESL at 0 range 2 .. 5;
REMWAKE at 0 range 6 .. 6;
L1SSEN at 0 range 7 .. 7;
BESLTHRS at 0 range 8 .. 11;
L1DSEN at 0 range 12 .. 12;
LPMRST at 0 range 13 .. 14;
SLPSTS at 0 range 15 .. 15;
L1RSMOK at 0 range 16 .. 16;
LPMCHIDX at 0 range 17 .. 20;
LPMRCNT at 0 range 21 .. 23;
SNDLPM at 0 range 24 .. 24;
LPMRCNTSTS at 0 range 25 .. 27;
ENBESL at 0 range 28 .. 28;
Unused_29 at 0 range 29 .. 31;
end record;
--
type OTG_General_Registers is record
GOTGCTL : General_Control_and_Status_Register;
GOTGINT : General_Interrupt_Register;
GAHBCFG : General_AHB_Configuration_Register;
GUSBCFG : General_USB_Configuration_Register;
GRSTCTL : General_Reset_Register;
GINTSTS : General_Core_Interrupt_Register;
GINTMSK : General_Core_Interrupt_Register;
GRXSTSR : General_Receive_Status_Register;
GRXSTSP : General_Receive_Status_Register;
GRXFSIZ : Integer range 0 .. 2**16 - 1;
TX0FSIZ : Transmit_FIFO_Size_Register; -- also GNPTXFSIZ
GNPTXSTS : General_Non_Periodic_Tx_Status_Register;
GCCFG : General_Core_Configuration_Register;
CID : Core_ID;
GLPMCFG : Core_LPM_Configuration_Register;
HPTXFSIZ : Transmit_FIFO_Size_Register;
DIEPTXF : Endpoint_Transmit_FIFO_Size_Registers;
end record;
for OTG_General_Registers use record
GOTGCTL at 16#00# range 0 .. 31;
GOTGINT at 16#04# range 0 .. 31;
GAHBCFG at 16#08# range 0 .. 31;
GUSBCFG at 16#0C# range 0 .. 31;
GRSTCTL at 16#10# range 0 .. 31;
GINTSTS at 16#14# range 0 .. 31;
GINTMSK at 16#18# range 0 .. 31;
GRXSTSR at 16#1C# range 0 .. 31;
GRXSTSP at 16#20# range 0 .. 31;
GRXFSIZ at 16#24# range 0 .. 31;
TX0FSIZ at 16#28# range 0 .. 31;
GNPTXSTS at 16#2C# range 0 .. 31;
GCCFG at 16#38# range 0 .. 31;
CID at 16#3C# range 0 .. 31;
GLPMCFG at 16#54# range 0 .. 31;
HPTXFSIZ at 16#100# range 0 .. 31;
DIEPTXF at 16#104# range 0 .. 32 * 7 - 1;
end record;
type Power_and_Clock_Gating_Register is record
STPPCLK : Boolean := False; -- Stop PHY clock
GATEHCLK : Boolean := False; -- Gate HCLK
Unused_2 : Unused_2_Bits := 0;
PHYSUSP : Boolean := False; -- PHY suspended
ENL1GTG : Boolean := False; -- Enable sleep clock gating
PHYSLEEP : Boolean := False; -- PHY in sleep mode
SUSP : Boolean := False; -- Deep sleep
Unused_8 : Unused_24_Bits := 16#200B_80#;
end record with Size => 32;
for Power_and_Clock_Gating_Register use record
STPPCLK at 0 range 0 .. 0;
GATEHCLK at 0 range 1 .. 1;
Unused_2 at 0 range 2 .. 3;
PHYSUSP at 0 range 4 .. 4;
ENL1GTG at 0 range 5 .. 5;
PHYSLEEP at 0 range 6 .. 6;
SUSP at 0 range 7 .. 7;
Unused_8 at 0 range 8 .. 31;
end record;
type OTG_PWRCLK_Registers is record
PCGCR : Power_and_Clock_Gating_Register;
end record;
for OTG_PWRCLK_Registers use record
PCGCR at 16#00# range 0 .. 31;
end record;
end STM32.USB_OTG;

10
library/source/f4/stm32-wwdg.ads → library/source/f4/stm32-window_watchdog.ads
View File

@ -1,4 +1,8 @@
package STM32.WWDG with Pure is
with STM32.Address_Map;
-- Window watchdog
package STM32.Window_Watchdog is
-- CR
@ -67,4 +71,6 @@ package STM32.WWDG with Pure is
SR at 16#08# range 0 .. 31;
end record;
end STM32.WWDG;
WWDG : WWDG_Registers with Volatile, Import, Address => Address_Map.WWDG;
end STM32.Window_Watchdog;

14
library/source/stm32.ads
View File

@ -11,12 +11,26 @@ package STM32 is
type Unused_2_Bits is mod 2**2 with Size => 2;
type Unused_3_Bits is mod 2**3 with Size => 3;
type Unused_4_Bits is mod 2**4 with Size => 4;
type Unused_5_Bits is mod 2**5 with Size => 5;
type Unused_6_Bits is mod 2**6 with Size => 6;
type Unused_7_Bits is mod 2**7 with Size => 7;
type Unused_8_Bits is mod 2**8 with Size => 8;
type Unused_9_Bits is mod 2**9 with Size => 9;
type Unused_10_Bits is mod 2**10 with Size => 10;
type Unused_12_Bits is mod 2**12 with Size => 12;
type Unused_13_Bits is mod 2**13 with Size => 13;
type Unused_16_Bits is mod 2**16 with Size => 16;
type Unused_17_Bits is mod 2**17 with Size => 17;
type Unused_18_Bits is mod 2**18 with Size => 18;
type Unused_19_Bits is mod 2**19 with Size => 19;
type Unused_20_Bits is mod 2**20 with Size => 20;
type Unused_22_Bits is mod 2**22 with Size => 22;
type Unused_23_Bits is mod 2**23 with Size => 23;
type Unused_24_Bits is mod 2**24 with Size => 24;
type Unused_25_Bits is mod 2**25 with Size => 25;
type Unused_28_Bits is mod 2**28 with Size => 28;
type Unused_29_Bits is mod 2**29 with Size => 29;
type Unused_30_Bits is mod 2**30 with Size => 30;
type Logarithmic is (
Value_1, Value_2, Value_4, Value_8,

14
todo-modules-f4
View File

@ -1,6 +1,6 @@
* ADC
* ADC_Common
AES
* AES
* CAN
* CRC
* CRYP
@ -28,8 +28,8 @@ HDMI_CEC
* I2C
I2S2ext
I2S3ext
IWDG
LPTIM
* IWDG
* LPTIM
* LTDC
MPU
NVIC
@ -46,17 +46,17 @@ OTG_HS_PWRCLK
QUADSPI
* RCC
* RNG
RTC
* RTC
SAI
SCB
SCB_ACTRL
SDIO
* SDIO
SDMMC
SPDIF_RX
* SPI
STK
* SYSCFG
TIM
UART
* TIM
* UART
* USART
* WWDG

10
tools/Makefile
View File

@ -1,13 +1,13 @@
#!/bin/make
SVD_DIR = imported_data/STM32F4_svd_V1.2
SVD_DIR = imported_data
OUTPUT_DIR = output
TXT_OUTPUT_DIR = $(OUTPUT_DIR)/txt
ADS_OUTPUT_DIR = $(OUTPUT_DIR)/ads
FILES = $(wildcard $(SVD_DIR)/*.svd)
FILES = $(wildcard $(SVD_DIR)/*.svd $(SVD_DIR)/*/*.svd)
all: ads txt
@ -16,9 +16,11 @@ ads: $(FILES:$(SVD_DIR)/%.svd=$(ADS_OUTPUT_DIR)/%.ads)
txt: $(FILES:$(SVD_DIR)/%.svd=$(TXT_OUTPUT_DIR)/%.txt)
$(ADS_OUTPUT_DIR)/%.ads:$(SVD_DIR)/%.svd
xsltproc -o $(ADS_OUTPUT_DIR)/ xslt/svd.xsl $< > $@
mkdir -p $(dir $@)
xsltproc -o $(dir $@)/ xslt/svd.xsl $< > $@
$(TXT_OUTPUT_DIR)/%.txt:$(SVD_DIR)/%.svd
xsltproc -o $(TXT_OUTPUT_DIR)/ xslt/svd-txt.xsl $< > $@
mkdir -p $(dir $@)
xsltproc -o $(dir $@)/ xslt/svd-txt.xsl $< > $@
.PHONY: all ads txt

23
tools/compare_regs.awk
View File

@ -11,6 +11,12 @@ FNR == 1 {
fn = FILENAME;
sub("^\\./", "", fn);
sub("^STM32", "", fn);
sub(".txt$", "", fn);
sub("_GLOBAL", "g", fn);
sub("_HOST", "h", fn);
sub("_DEVICE", "d", fn);
sub("_HS", "h", fn);
sub("_FS", "f", fn);
FILE[nfiles] = fn;
}
@ -91,7 +97,7 @@ END {
printf("f %-"fc"."fc"s", "---");
for(g = 1; g <= ngroups; g = g + 1) {
f = FILEG[g, n];
printf(delim "%-"column"."column"s", FILE[f]);
printf(delim "%-"column"."column"s", substr(FILE[f],length(FILE[f])-column+1));
}
printf("\n");
}
@ -125,11 +131,22 @@ END {
if(equal == 0) {
for(b = 0; b < max_size; b = b + 1) {
printf(" % "fc"."fc"s", b);
split ("", FIC);
FIC[""] = "";
ficnt = 0;
for(g = 1; g <= ngroups; g = g + 1) {
f = FILEG[g, 1];
printf(delim "%-"column"."column"s", FIELDNAME[f, address, b]);
fin = FIELDNAME[f, address, b];
if(!(fin in FIC)) {
FIC[fin] = sprintf("%c[%dm", 27, 97 - ficnt);
ficnt = ficnt + 1;
if(ficnt > 7) {
ficnt = 0;
}
}
printf(delim "%s%-"column"."column"s", FIC[fin], fin);
}
printf("\n");
printf("%c[0m\n", 27); # reset color
}
}
}

3
tools/svd.sh
View File

@ -1,3 +0,0 @@
#!/bin/sh
xsltproc xslt/svd.xsl imported_data/STM32F4_svd_V1.2/STM32F429.svd

2
tools/xslt/svd.xsl
View File

@ -10,7 +10,7 @@
<xsl:variable name="uoffset" select="$predOffset + $predWidth"/>
<xsl:variable name="uend" select="$curOffset - 1"/>
<xsl:if test="$uoffset &lt; $curOffset">
<xsl:text> </xsl:text>Unused_<xsl:value-of select="$uoffset"/> : Integer range 0 .. 2**<xsl:value-of select="$curOffset - $uoffset"/> - 1;
<xsl:text> </xsl:text>Unused_<xsl:value-of select="$uoffset"/> : Unused_<xsl:value-of select="$curOffset - $uoffset"/>_Bits;
</xsl:if>
</xsl:template>