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Made UART initialization close to HAL, but with no success

This commit is contained in:
Vovanium 2019-07-18 18:49:05 +03:00
parent 4252d3273d
commit e083374732
1 changed files with 58 additions and 22 deletions
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80
examples/uart/source/uart_429disco.adb
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@ -10,20 +10,20 @@ procedure UART_429Disco is
UART_TX_Bit: constant Port_Bit_Number := 9;
UART_RX_Bit: constant Port_Bit_Number := 10;
APB2_Frequency : constant := 42_000_000; -- Set by board support
Baud_Rate : constant := 19_200;
--Ratio : constant := (APB2_Frequency + Baud_Rate / 2) / Baud_Rate;
Ratio : constant := 128;
APB2_Frequency : constant := 90_000_000; -- Set by board support
Baud_Rate : constant := 115_200;
Ratio : constant := (APB2_Frequency + Baud_Rate / 2) / Baud_Rate;
--Ratio : constant := 128;
Period: constant Time_Span := Milliseconds(100);
Period: constant Time_Span := Milliseconds(10);
Now: Time := Clock;
begin
-- clock test
RCC.CFGR.HPRE := AHB_Prescaler_1;
RCC.CFGR.PPRE2 := APB_Prescaler_2;
--RCC.CFGR.HPRE := AHB_Prescaler_1;
--RCC.CFGR.PPRE2 := APB_Prescaler_2;
RCC.AHB1ENR.GPIOC := True;
@ -47,8 +47,6 @@ begin
--
UART_Port.OTYPER(UART_TX_Bit) := Push_Pull_Type;
UART_Port.OSPEEDR(UART_TX_Bit) := Very_High_Speed;
UART_Port.PUPDR(UART_TX_Bit) := Pull_Down;
@ -61,30 +59,68 @@ begin
UART_Port.AFR(UART_RX_Bit) := Alternate_Functions.USART1;
UART_Port.MODER(UART_RX_Bit) := Alternate_Mode;
-- UART initialisation (close to ST's HAL)
USART1.CR1.UE := False;
declare
CR1: Control_Register_1 := USART1.CR1;
begin
CR1.M := Word_8_Bits;
CR1.PCE := False;
CR1.PS := Even_Parity;
CR1.TE := True;
CR1.RE := True;
CR1.OVER8 := False;
USART1.CR1 := CR1;
end;
declare
CR3: Control_Register_3 := USART1.CR3;
begin
CR3.CTSE := False;
CR3.RTSE := False;
USART1.CR3 := CR3;
end;
USART1.BRR.DIV_Mantissa := 1; -- Ratio / 16;
USART1.BRR.DIV_Fraction := 0; -- Ratio mod 16;
declare
BRR: STM32.F429Z.Modules.USART.Baud_Rate_Register := USART1.BRR;
begin
--USART1.BRR := (DIV_Mantissa: Ratio / 16, DIV_Fraction: Ratio mod 16, others => 0);
BRR.DIV_Mantissa := Ratio / 16;
BRR.DIV_Fraction := Ratio mod 16;
USART1.GTPR.PSC := 1;
USART1.BRR := BRR;
end;
USART1.CR2.STOP := Stop_1_Bit;
USART1.CR1.M := Word_8_Bits;
USART1.CR1.PCE := False;
USART1.CR1.TE := True;
USART1.CR1.RE := True;
USART1.CR1.OVER8 := True;
USART1.CR3.CTSE := False;
USART1.CR3.RTSE := False;
declare
CR2: Control_Register_2 := USART1.CR2;
begin
CR2.LINEN := False;
CR2.CLKEN := False;
CR2.STOP := Stop_1_Bit;
USART1.CR2 := CR2;
end;
declare
CR3: Control_Register_3 := USART1.CR3;
begin
CR3.SCEN := False;
CR3.HDSEL := False;
CR3.IREN := False;
USART1.CR3 := CR3;
end;
--USART1.GTPR.PSC := 1;
USART1.CR1.UE := True;
loop
USART1.DR := 16#55#; --Character'Pos('!');
USART1.DR := 16#40#; --Character'Pos('!');
Now := Now + Period;
delay until Now;
end loop;