>< DMA > Direct_Memory_Access, HASH > Hash_Processor, IWDG > Independent_Watchdog, WWDG > Window_Watchdog, RNG > Random_Number_Generator

This commit is contained in:
Vovanium 2024-01-19 19:23:06 +03:00
parent 60a84e01dc
commit e6260cd3af
6 changed files with 10 additions and 23 deletions

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@ -1,4 +1,4 @@
package STM32.DMA with Pure is
package STM32.Direct_Memory_Access with Pure is
-- LISR, HISR, LIFCR, HIFCR
-- This Register definition is a bit weird,
@ -221,4 +221,4 @@ package STM32.DMA with Pure is
IFCR at 16#08# range 0 .. 63;
S at 16#10# range 0 .. DMA_Streams * DMA_Stream_Registers_Size - 1;
end record;
end STM32.DMA;
end STM32.Direct_Memory_Access;

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@ -1,12 +0,0 @@
with System.Storage_Elements;
with STM32.Address_Map;
with STM32.HASH;
package STM32.F429.HASH is
package Base renames STM32.HASH;
HASH_HW : Base.HASH_Registers with Volatile, Import,
Address => System.Storage_Elements.To_Address (STM32.Address_Map.HASH);
end STM32.F429.HASH;

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@ -1,4 +1,4 @@
package STM32.HASH with Pure is
package STM32.Hash_Processor with Pure is
-- CR
@ -752,5 +752,4 @@ package STM32.HASH with Pure is
HASH_HR at 16#0310# range 0 .. 32 * 8 - 1;
end record;
end STM32.HASH;
end STM32.Hash_Processor;

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@ -1,4 +1,4 @@
package STM32.IWDG with Pure is
package STM32.Independent_Watchdog with Pure is
-- KR
@ -94,4 +94,4 @@ package STM32.IWDG with Pure is
end record;
end STM32.IWDG;
end STM32.Independent_Watchdog;

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@ -1,4 +1,4 @@
package STM32.RNG with Pure is
package STM32.Random_Number_Generator with Pure is
-- CR
@ -52,5 +52,5 @@ package STM32.RNG with Pure is
end record;
end STM32.RNG;
end STM32.Random_Number_Generator;

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@ -1,4 +1,4 @@
package STM32.WWDG with Pure is
package STM32.Window_Watchdog with Pure is
-- CR
@ -67,4 +67,4 @@ package STM32.WWDG with Pure is
SR at 16#08# range 0 .. 31;
end record;
end STM32.WWDG;
end STM32.Window_Watchdog;