248 lines
7.7 KiB
Ada
248 lines
7.7 KiB
Ada
with Interfaces;
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use Interfaces;
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package STM32.F4.USART is
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pragma Pure;
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-- NOTE: USARTs ans UARTs are on APB
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-- Registers should be written as a whole
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type Status_Register is record
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PE: Boolean; -- Psrity error
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FE: Boolean; -- Framing error
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NF: Boolean; -- Noise detection flag
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ORE: Boolean; -- Overrun error
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IDLE: Boolean; -- IDLE line detected
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RXNE: Boolean; -- Read data register not empty
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TC: Boolean; -- Transmission complete
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TXE: Boolean; -- Transmit data register empty
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LBD: Boolean; -- LIN break detection flag
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CTS: Boolean; -- CTS flag
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Reserved: Integer range 0 .. 2**22 - 1;
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end record with Size => 32;
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for Status_Register use record
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PE at 0 range 0 .. 0;
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FE at 0 range 1 .. 1;
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NF at 0 range 2 .. 2;
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ORE at 0 range 3 .. 3;
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IDLE at 0 range 4 .. 4;
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RXNE at 0 range 5 .. 5;
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TC at 0 range 6 .. 6;
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TXE at 0 range 7 .. 7;
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LBD at 0 range 8 .. 8;
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CTS at 0 range 9 .. 9;
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Reserved at 0 range 10 .. 31;
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end record;
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type Baud_Rate_Register is record
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DIV_Fraction: Integer range 0 .. 2**4 - 1; -- Fraction of USARTDIV
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DIV_Mantissa: Integer range 0 .. 2**12 - 1; -- Mantissa of USARTDIV
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Reserved: Integer range 0 .. 2**16 - 1;
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end record with Size => 32;
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for Baud_Rate_Register use record
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DIV_Fraction at 0 range 0 .. 3;
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DIV_Mantissa at 0 range 4 .. 15;
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Reserved at 0 range 16 .. 31;
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end record;
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-- Parity selection bit field
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type Parity is (
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Even_Parity, -- Parity bit is cleared when even number of data bits is set, set otherwise
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Odd_Parity -- Parity bit is set when even number of data bits is set, cleared otherwise
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);
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for Parity use (
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Even_Parity => 2#0#,
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Odd_Parity => 2#1#
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);
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-- Wakeup method field
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type Wakeup_Method is (
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Idle_Line, -- Wakeup on IDLE line detect
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Address_Mark -- Wakeup on address mark detect
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);
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for Wakeup_Method use (
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Idle_Line => 2#0#,
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Address_Mark => 2#1#
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);
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-- Data word length
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type Word_Length is (
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Word_8_Bits, -- Data word (with parity bit if enabled) consists of 8 bits
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Word_9_Bits -- Data word (with parity bit if enabled) consists of 9 bits
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);
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for Word_Length use (
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Word_8_Bits => 2#0#,
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Word_9_Bits => 2#1#
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);
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type Control_Register_1 is record
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SBK: Boolean; -- Send break
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RWU: Boolean; -- Receiver wakeup
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RE: Boolean; -- Receiver enable
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TE: Boolean; -- Trnsmitter enable
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IDLEIE: Boolean; -- IDLE interrupt enable
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RXNEIE: Boolean; -- RXNE interrupt enable
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TCIE: Boolean; -- Transmission complete interrupt enable
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TXEIE: Boolean; -- TXE interrupt enable
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PEIE: Boolean; -- PE interrupt enable
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PS: Parity; -- Parity selection
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PCE: Boolean; -- Parity control enable
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WAKE: Wakeup_Method; -- Wakeup method
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M: Word_Length; -- Word length
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UE: Boolean; -- USART enable
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Reserved_14: Integer range 0 .. 2**1 - 1;
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OVER8: Boolean; -- Oversampling mode
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Reserved: Integer range 0 .. 2**16 - 1;
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end record with Size => 32;
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for Control_Register_1 use record
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SBK at 0 range 0 .. 0;
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RWU at 0 range 1 .. 1;
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RE at 0 range 2 .. 2;
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TE at 0 range 3 .. 3;
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IDLEIE at 0 range 4 .. 4;
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RXNEIE at 0 range 5 .. 5;
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TCIE at 0 range 6 .. 6;
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TXEIE at 0 range 7 .. 7;
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PEIE at 0 range 8 .. 8;
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PS at 0 range 9 .. 9;
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PCE at 0 range 10 .. 10;
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WAKE at 0 range 11 .. 11;
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M at 0 range 12 .. 12;
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UE at 0 range 13 .. 13;
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Reserved_14 at 0 range 14 .. 14;
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OVER8 at 0 range 15 .. 15;
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Reserved at 0 range 16 .. 31;
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end record;
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-- Line break detection length
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type Lin_Break_Detection_Length is (
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Lin_10_Bit_Break_Detection, -- 10 bits break is detected
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Lin_11_Bit_Break_Detection -- 11 bits break is detected
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);
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for Lin_Break_Detection_Length use (
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LIN_10_Bit_Break_Detection => 2#0#,
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LIN_11_Bit_Break_Detection => 2#1#
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);
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type Clock_Phase is (
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First_Edge_Capture, -- Data captured on first clock edge
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Second_Edge_Capture -- Deta set on first clock edge, captured on second edge
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);
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for Clock_Phase use (
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First_Edge_Capture => 2#0#,
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Second_Edge_Capture => 2#1#
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);
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type Clock_Polarity is (
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Positive_Pulse, -- Steady low value on CK outside transmission window
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Negative_Pulse -- Steady high value on CK outside transmission window
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);
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for Clock_Polarity use (
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Positive_Pulse => 2#0#,
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Negative_Pulse => 2#1#
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);
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-- Number of stop bits
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type Stop_Bit_Count is(
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Stop_1_Bit, -- 1 stop bit
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Stop_0_5_Bits, -- 0.5 stop bits
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Stop_2_Bits, -- 2 stop bits
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Stop_1_5_Bits -- 1.5 stop bits
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);
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for Stop_Bit_Count use (
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Stop_1_Bit => 2#00#,
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Stop_0_5_Bits => 2#01#,
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Stop_2_Bits => 2#10#,
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Stop_1_5_Bits => 2#11#
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);
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type Control_Register_2 is record
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ADD: Integer range 0 .. 2**4 - 1; -- Address of the USART node
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Reserved_4: Integer range 0 .. 1;
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LBDL: LIN_Break_Detection_Length; -- LIN break detection length selection
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LBDIE: Boolean; -- LIN break detection interrupt enable
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Reserved_7: Integer range 0 .. 1;
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LBCL: Boolean; -- Last bit clock pulse output (this bit is not available for UART4 and UART5)
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CPHA: Clock_Phase; -- Clock phase
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CPOL: Clock_Polarity; -- Clock polarity
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CLKEN: Boolean; -- Clock enable
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STOP: Stop_Bit_Count; -- STOP bits
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LINEN: Boolean; -- LIN mode enable
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Reserved: Integer range 0 .. 2**17 - 1;
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end record with Size => 32;
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for Control_Register_2 use record
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ADD at 0 range 0 .. 3;
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Reserved_4 at 0 range 4 .. 4;
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LBDL at 0 range 5 .. 5;
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LBDIE at 0 range 6 .. 6;
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Reserved_7 at 0 range 7 .. 7;
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LBCL at 0 range 8 .. 8;
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CPHA at 0 range 9 .. 9;
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CPOL at 0 range 10 .. 10;
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CLKEN at 0 range 11 .. 11;
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STOP at 0 range 12 .. 13;
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LINEN at 0 range 14 .. 14;
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Reserved at 0 range 15 .. 31;
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end record;
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type Control_Register_3 is record
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EIE: Boolean; -- Error interrupt enable
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IREN: Boolean; -- IrDA mode enable
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IRLP: Boolean; -- IrDA low power
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HDSEL: Boolean; -- Half duplex selection
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NACK: Boolean; -- Smartcard NACK enable
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SCEN: Boolean; -- Smartcard mode enable
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DMAR: Boolean; -- DMA enable receiver
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DMAT: Boolean; -- DMA enable transmitter
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RTSE: Boolean; -- RTS enable
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CTSE: Boolean; -- CTS enable
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CTSIE: Boolean; -- CTS interrupt enable
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ONEBIT: Boolean; -- One bit sampling enable
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Reserved: Integer range 0 .. 2 ** 20 - 1;
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end record with Size => 32;
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for Control_Register_3 use record
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EIE at 0 range 0 .. 0;
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IREN at 0 range 1 .. 1;
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IRLP at 0 range 2 .. 2;
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HDSEL at 0 range 3 .. 3;
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NACK at 0 range 4 .. 4;
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SCEN at 0 range 5 .. 5;
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DMAR at 0 range 6 .. 6;
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DMAT at 0 range 7 .. 7;
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RTSE at 0 range 8 .. 8;
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CTSE at 0 range 9 .. 9;
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CTSIE at 0 range 10 .. 10;
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ONEBIT at 0 range 11 .. 11;
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Reserved at 0 range 12 .. 31;
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end record;
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type Guard_Time_and_Prescaler_Register is record
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PSC: Integer range 0 .. 2**8 - 1; -- Prescaler value
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GT: Integer range 0 .. 2**8 - 1; -- Guard time value in baud clocks
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Reserved: Integer range 0 .. 2**16 - 1;
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end record with Size => 32;
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for Guard_Time_and_Prescaler_Register use record
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PSC at 0 range 0 .. 7;
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GT at 0 range 8 .. 15;
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Reserved at 0 range 16 .. 31;
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end record;
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type USART_Registers is record
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SR: Status_Register with Volatile_Full_Access; -- Status register
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DR: Unsigned_32 with Volatile_Full_Access; -- Data register
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BRR: Baud_Rate_Register with Volatile_Full_Access; -- Baud rate register
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CR1: Control_Register_1 with Volatile_Full_Access; -- Control register 1
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CR2: Control_Register_2 with Volatile_Full_Access; -- Control register 2
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CR3: Control_Register_3 with Volatile_Full_Access; -- Control register 3
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GTPR: Guard_Time_and_Prescaler_Register with Volatile_Full_Access; -- Guard time and prescaler register
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end record with Volatile;
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for USART_Registers use record
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SR at 16#00# range 0 .. 31;
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DR at 16#04# range 0 .. 31;
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BRR at 16#08# range 0 .. 31;
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CR1 at 16#0C# range 0 .. 31;
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CR2 at 16#10# range 0 .. 31;
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CR3 at 16#14# range 0 .. 31;
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GTPR at 16#18# range 0 .. 31;
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end record;
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end STM32.F4.USART;
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