307 lines
7.4 KiB
Ada
307 lines
7.4 KiB
Ada
with Interfaces;
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package STM32.SPI is
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pragma Pure;
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type Clock_Phase is (
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Late_Clock, -- First clock transition is the first data capture edge
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Early_Clock -- Second clock transition is the first data capture edge
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) with Size => 1;
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for Clock_Phase use (
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Late_Clock => 0,
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Early_Clock => 1
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);
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type Clock_Polarity is (
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Positive_Clock, -- CK to 0 when idle, first transition is rising
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Negative_Clock -- CK to 1 when idle, first transition is falling
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) with Size => 1;
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for Clock_Polarity use (
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Positive_Clock => 0,
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Negative_Clock => 1
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);
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type Master_Selection is (
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Slave,
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Master
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) with Size => 1;
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for Master_Selection use (
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Slave => 0,
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Master => 1
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);
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type Baud_Rate is (
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PCLK_DIV_2,
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PCLK_DIV_4,
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PCLK_DIV_8,
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PCLK_DIV_16,
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PCLK_DIV_32,
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PCLK_DIV_64,
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PCLK_DIV_128,
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PCLK_DIV_256
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) with Size => 3;
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for Baud_Rate use (
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PCLK_DIV_2 => 2#000#,
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PCLK_DIV_4 => 2#001#,
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PCLK_DIV_8 => 2#010#,
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PCLK_DIV_16 => 2#011#,
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PCLK_DIV_32 => 2#100#,
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PCLK_DIV_64 => 2#101#,
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PCLK_DIV_128 => 2#110#,
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PCLK_DIV_256 => 2#111#
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);
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type Data_Frame_Format is (
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Frame_8_Bit,
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Frame_16_Bit
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) with Size => 1;
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for Data_Frame_Format use (
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Frame_8_bit => 0,
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Frame_16_bit => 1
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);
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type Bidirectional_Mode is (
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Unidirectional,
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Bidirectional
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) with Size => 1;
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for Bidirectional_Mode use (
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Unidirectional => 0,
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Bidirectional => 1
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);
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type Control_Register_1 is record
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CPHA : Clock_Phase;
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CPOL : Clock_Polarity;
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MSTR : Master_Selection;
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BR : Baud_Rate;
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SPE : Boolean;
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LSBFIRST : Boolean;
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SSI : Boolean;
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SSM : Boolean;
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RXONLY : Boolean;
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DFF : Data_Frame_Format;
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CRCNEXT : Boolean;
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CRCEN : Boolean;
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BIDIOE : Boolean;
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BIDIMODE : Bidirectional_Mode;
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end record with Size => 16;
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for Control_Register_1 use record
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CPHA at 0 range 0 .. 0;
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CPOL at 0 range 1 .. 1;
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MSTR at 0 range 2 .. 2;
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BR at 0 range 3 .. 5;
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SPE at 0 range 6 .. 6;
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LSBFIRST at 0 range 7 .. 7;
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SSI at 0 range 8 .. 8;
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SSM at 0 range 9 .. 9;
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RXONLY at 0 range 10 .. 10;
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DFF at 0 range 11 .. 11;
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CRCNEXT at 0 range 12 .. 12;
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CRCEN at 0 range 13 .. 13;
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BIDIOE at 0 range 14 .. 14;
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BIDIMODE at 0 range 15 .. 15;
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end record;
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--
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type Frame_Format is (
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Motorola_Mode,
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TI_Mode
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) with Size => 1;
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for Frame_Format use (
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Motorola_Mode => 0,
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TI_Mode => 1
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);
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type Control_Register_2 is record
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RXDMAEN : Boolean;
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TXDMAEN : Boolean;
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SSOE : Boolean;
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Reserved_3 : Integer range 0 .. 1;
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FRF : Frame_Format;
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ERRIE : Boolean;
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RXNEIE : Boolean;
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TXEIE : Boolean;
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Reserved_8 : Integer range 0 .. 2**8 - 1;
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end record with Size => 16;
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for Control_Register_2 use record
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RXDMAEN at 0 range 0 .. 0;
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TXDMAEN at 0 range 1 .. 1;
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SSOE at 0 range 2 .. 2;
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Reserved_3 at 0 range 3 .. 3;
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FRF at 0 range 4 .. 4;
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ERRIE at 0 range 5 .. 5;
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RXNEIE at 0 range 6 .. 6;
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TXEIE at 0 range 7 .. 7;
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Reserved_8 at 0 range 8 .. 15;
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end record;
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--
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type Channel_Side is (
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Channel_Left,
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Channel_Right
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) with Size => 1;
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for Channel_Side use (
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Channel_Left => 0,
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Channel_Right => 1
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);
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type Status_Register is record
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RXNE : Boolean;
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TXE : Boolean;
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CHSIDE : Channel_Side;
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UDR : Boolean;
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CRCERR : Boolean;
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MODF : Boolean;
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OVR : Boolean;
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BSY : Boolean;
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FRE : Boolean;
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Reserved : Integer range 0 .. 2**7 - 1;
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end record with Size => 16;
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for Status_Register use record
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RXNE at 0 range 0 .. 0;
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TXE at 0 range 1 .. 1;
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CHSIDE at 0 range 2 .. 2;
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UDR at 0 range 3 .. 3;
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CRCERR at 0 range 4 .. 4;
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MODF at 0 range 5 .. 5;
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OVR at 0 range 6 .. 6;
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BSY at 0 range 7 .. 7;
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FRE at 0 range 8 .. 8;
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Reserved at 0 range 9 .. 15;
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end record;
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--
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type Channel_Length is (
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Channel_16_Bit,
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Channel_32_Bit
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) with Size => 1;
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for Channel_Length use (
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Channel_16_Bit => 0,
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Channel_32_Bit => 1
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);
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type Data_Length is (
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Data_16_Bit,
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Data_24_Bit,
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Data_32_Bit
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) with Size => 2;
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for Data_Length use (
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Data_16_Bit => 2#00#,
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Data_24_Bit => 2#01#,
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Data_32_Bit => 2#10#
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);
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type I2S_Standard is (
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Philips_Standard,
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MSB_Justified_Standard,
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LSB_Justified_Standard,
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PCM_Standard
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) with Size => 2;
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for I2S_Standard use (
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Philips_Standard => 2#00#,
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MSB_Justified_Standard => 2#01#,
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LSB_Justified_Standard => 2#10#,
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PCM_Standard => 2#11#
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);
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type PCM_Frame_Synchronization is (
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Short_Frame,
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Long_Frame
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) with Size => 1;
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for PCM_Frame_Synchronization use (
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Short_Frame => 0,
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Long_Frame => 1
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);
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type I2S_Configuration_Mode is (
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Slave_Transmit,
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Slave_Receive,
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Master_Transmit,
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Master_Receive
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) with Size => 22;
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for I2S_Configuration_Mode use (
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Slave_Transmit => 2#00#,
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Slave_Receive => 2#01#,
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Master_Transmit => 2#10#,
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Master_Receive => 2#11#
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);
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type I2S_Configuration_Register is record
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CHLEN : Channel_Length;
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DATLEN : Data_Length;
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CKPOL : Clock_Polarity;
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I2SSTD : I2S_Standard;
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Reserved_6 : Integer range 0 .. 1;
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PCMSYNC : PCM_Frame_Synchronization;
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I2SCFG : I2S_Configuration_Mode;
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I2SE : Boolean;
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I2SMOD : Boolean;
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Reserved_12 : Integer range 0 .. 2**4 - 1;
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end record with Size => 16;
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for I2S_Configuration_Register use record
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CHLEN at 0 range 0 .. 0;
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DATLEN at 0 range 1 .. 2;
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CKPOL at 0 range 3 .. 3;
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I2SSTD at 0 range 4 .. 5;
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Reserved_6 at 0 range 6 .. 6;
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PCMSYNC at 0 range 7 .. 7;
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I2SCFG at 0 range 8 .. 9;
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I2SE at 0 range 10 .. 10;
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I2SMOD at 0 range 11 .. 11;
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Reserved_12 at 0 range 12 .. 15;
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end record;
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--
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type I2S_Prescaler_Register is record
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I2SDIV : Integer range 2 .. 2**8 - 1;
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ODD : Boolean;
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MCKOE : Boolean;
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Reserved : Integer range 0 .. 2**6 - 1;
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end record with Size => 16;
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for I2S_Prescaler_Register use record
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I2SDIV at 0 range 0 .. 7;
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ODD at 0 range 8 .. 8;
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MCKOE at 0 range 9 .. 9;
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Reserved at 0 range 10 .. 15;
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end record;
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--
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type SPI_Registers is record
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CR1 : Control_Register_1;
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pragma Volatile_Full_Access (CR1);
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CR2 : Control_Register_2;
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pragma Volatile_Full_Access (CR2);
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SR : Status_Register;
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pragma Volatile_Full_Access (SR);
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DR : Interfaces.Unsigned_16;
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pragma Volatile_Full_Access (DR);
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CRCPR : Interfaces.Unsigned_16;
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pragma Volatile_Full_Access (CRCPR);
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RXCRCR : Interfaces.Unsigned_16;
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pragma Volatile_Full_Access (RXCRCR);
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TXCRCR : Interfaces.Unsigned_16;
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pragma Volatile_Full_Access (TXCRCR);
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I2SCFGR : I2S_Configuration_Register;
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pragma Volatile_Full_Access (I2SCFGR);
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I2SPR : I2S_Prescaler_Register;
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pragma Volatile_Full_Access (I2SPR);
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end record with Volatile;
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for SPI_Registers use record
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CR1 at 16#00# range 0 .. 15;
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CR2 at 16#04# range 0 .. 15;
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SR at 16#08# range 0 .. 15;
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DR at 16#0C# range 0 .. 15;
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CRCPR at 16#10# range 0 .. 15;
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RXCRCR at 16#14# range 0 .. 15;
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TXCRCR at 16#18# range 0 .. 15;
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I2SCFGR at 16#1C# range 0 .. 15;
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I2SPR at 16#20# range 0 .. 15;
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end record;
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end STM32.SPI;
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