117 lines
3.9 KiB
Diff
117 lines
3.9 KiB
Diff
diff -u -r light-stm32f4/gnat/s-bbbopa.ads light-stm32f401/gnat/s-bbbopa.ads
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--- light-stm32f4/gnat/s-bbbopa.ads 2022-09-29 14:17:39.819434400 +0300
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+++ light-stm32f401/gnat/s-bbbopa.ads 2024-03-12 17:11:52.584980267 +0300
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@@ -42,16 +42,14 @@
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-- Hardware clock --
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--------------------
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- Main_Clock_Frequency : constant := 168_000_000;
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- -- Optimal frequency of the system clock. Note that the STM32F411 can go
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- -- up to 200 MHz, but all other STM32F40x and STM32F41x MCUs can only do
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- -- 168 MHz.
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+ Main_Clock_Frequency : constant := 84_000_000;
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+ -- The STM32F401 unlike others can go up to 84 MHz only.
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- HSE_Clock_Frequency : constant := 8_000_000;
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- -- Frequency of High Speed External clock.
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+ HSE_Clock_Frequency : constant := 25_000_000;
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+ -- Frequency of High Speed External clock (As in "black pill").
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FLASH_Latency : constant := 5;
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- PLLP_Value : constant := 2;
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+ PLLP_Value : constant := 4;
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PLLQ_Value : constant := 7;
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end System.BB.Board_Parameters;
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diff -u -r light-stm32f4/gnat/start-rom.S light-stm32f401/gnat/start-rom.S
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--- light-stm32f4/gnat/start-rom.S 2022-09-29 14:17:39.819434400 +0300
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+++ light-stm32f401/gnat/start-rom.S 2024-03-12 18:21:55.981719375 +0300
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@@ -61,18 +61,6 @@
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subs r1,r1,#1
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bne 0b
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1:
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- /* Copy .ccmdata */
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- movw r0,#:lower16:__ccmdata_start
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- movt r0,#:upper16:__ccmdata_start
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- movw r1,#:lower16:__ccmdata_words
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- movw r2,#:lower16:__ccmdata_load
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- movt r2,#:upper16:__ccmdata_load
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- cbz r1,1f
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-0: ldr r4,[r2],#4
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- str r4,[r0],#4
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- subs r1,r1,#1
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- bne 0b
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-1:
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/* Clear .bss */
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movw r0,#:lower16:__bss_start
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movt r0,#:upper16:__bss_start
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diff -u -r light-stm32f4/ld/common-RAM.ld light-stm32f401/ld/common-RAM.ld
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--- light-stm32f4/ld/common-RAM.ld 2022-09-29 14:17:39.819434400 +0300
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+++ light-stm32f401/ld/common-RAM.ld 2024-03-12 18:20:57.248385024 +0300
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@@ -87,20 +87,6 @@
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__data_end = .;
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} > sram_da
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- .ccmdata :
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- {
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- __ccmdata_start = .;
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- *(.ccmdata .ccmdata.*)
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-
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- /* Ensure that the end of the data section is always word aligned.
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- Initial values are stored in 4-bytes blocks so we must guarantee
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- that these blocks do not fall out the section (otherwise they are
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- truncated and the initial data for the last block are lost). */
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-
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- . = ALIGN(0x4);
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- __ccmdata_end = .;
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- } > ccm_da
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-
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.bss (NOLOAD): {
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. = ALIGN(0x8);
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__bss_start = .;
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diff -u -r light-stm32f4/ld/common-ROM.ld light-stm32f401/ld/common-ROM.ld
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--- light-stm32f4/ld/common-ROM.ld 2022-09-29 14:17:39.819434400 +0300
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+++ light-stm32f401/ld/common-ROM.ld 2024-03-12 18:20:07.011717499 +0300
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@@ -90,22 +90,6 @@
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} > sram_da
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__data_words = (__data_end - __data_start) >> 2;
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- __ccmdata_load = __rom_end + (__data_words << 2);
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- .ccmdata : AT (__ccmdata_load)
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- {
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- __ccmdata_start = .;
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- *(.ccmdata .ccmdata.*)
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-
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- /* Ensure that the end of the data section is always word aligned.
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- Initial values are stored in 4-bytes blocks so we must guarantee
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- that these blocks do not fall out the section (otherwise they are
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- truncated and the initial data for the last block are lost). */
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-
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- . = ALIGN(0x4);
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- __ccmdata_end = .;
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- } > ccm_da
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- __ccmdata_words = (__ccmdata_end - __ccmdata_start) >> 2;
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-
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.bss (NOLOAD): {
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. = ALIGN(0x8);
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__bss_start = .;
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diff -u -r light-stm32f4/ld/memory-map.ld light-stm32f401/ld/memory-map.ld
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--- light-stm32f4/ld/memory-map.ld 2022-09-29 14:17:39.823434400 +0300
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+++ light-stm32f401/ld/memory-map.ld 2024-03-12 18:28:51.885059907 +0300
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@@ -36,13 +36,11 @@
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MEMORY
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{
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- flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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- sram12 (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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- ccm (rw) : ORIGIN = 0x10000000, LENGTH = 64K
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+ flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
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+ sram12 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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}
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REGION_ALIAS("sram_tx", sram12)
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REGION_ALIAS("sram_ro", sram12)
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REGION_ALIAS("sram_bs", sram12)
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REGION_ALIAS("sram_da", sram12)
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-REGION_ALIAS("ccm_da", ccm)
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