314 lines
7.7 KiB
Ada
314 lines
7.7 KiB
Ada
with Interfaces;
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package STM32.Registers.FSMC is
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pragma Pure;
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type Memory_Type is (
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SRAM,
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PSRAM,
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NOR_Flash
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);
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type Memory_Databus_Width is (
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Databus_8_bit,
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Databus_16_bit
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);
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for Memory_Databus_Width use (
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Databus_8_bit => 2#00#,
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Databus_16_bit => 2#01#
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);
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type CRAM_Page_Size is (
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CRAM_No_Burst_Split,
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CRAM_Page_128_Bytes,
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CRAM_Page_256_Bytes,
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CRAM_Page_512_Bytes,
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CRAM_Page_1024_Bytes
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);
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for CRAM_Page_Size use (
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CRAM_No_Burst_Split => 2#000#,
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CRAM_Page_128_Bytes => 2#001#,
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CRAM_Page_256_Bytes => 2#010#,
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CRAM_Page_512_Bytes => 2#011#,
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CRAM_Page_1024_Bytes => 2#100#
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);
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type FSMC_BCR is record
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MBKEN: Boolean;
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MUXEN: Boolean;
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MTYP: Memory_Type;
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MWID: Memory_Databus_Width;
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FACCEN: Boolean;
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Reserved_7: Integer range 0 .. 2**1 - 1;
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BURSTEN: Boolean;
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WAITPOL: Boolean;
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WRAPMOD: Boolean;
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WAITCFG: Boolean;
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WREN: Boolean;
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WAITEN: Boolean;
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EXTMOD: Boolean;
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ASYNCWAIT: Boolean;
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CPSIZE: CRAM_Page_Size;
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CBURSTRW: Boolean;
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Reserved_20: Integer range 0 .. 2**12 - 1;
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end record with Size => 32;
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for FSMC_BCR use record
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MBKEN at 0 range 0 .. 0;
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MUXEN at 0 range 1 .. 1;
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MTYP at 0 range 2 .. 3;
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MWID at 0 range 4 .. 5;
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FACCEN at 0 range 6 .. 6;
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Reserved_7 at 0 range 7 .. 7;
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BURSTEN at 0 range 8 .. 8;
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WAITPOL at 0 range 9 .. 9;
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WRAPMOD at 0 range 10 .. 10;
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WAITCFG at 0 range 11 .. 11;
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WREN at 0 range 12 .. 12;
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WAITEN at 0 range 13 .. 13;
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EXTMOD at 0 range 14 .. 14;
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ASYNCWAIT at 0 range 15 .. 15;
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CPSIZE at 0 range 16 .. 18;
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CBURSTRW at 0 range 19 .. 19;
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Reserved_20 at 0 range 20 .. 31;
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end record;
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type FSMC_Access_Mode is (
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Access_Mode_A,
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Access_Mode_B,
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Access_Mode_C,
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Access_Mode_D
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);
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for FSMC_Access_Mode use (
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Access_Mode_A => 0,
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Access_Mode_B => 1,
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Access_Mode_C => 2,
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Access_Mode_D => 3
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);
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type FSMC_BTR is record
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ADDSET: Integer range 0 .. 2**4 - 1; -- Address setup duration
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ADDHLD: Integer range 1 .. 2**4 - 1; -- Address hold phase duration
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DATAST: Integer range 1 .. 2**8 - 1; -- Data phase duration
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BUSTURN: Integer range 0 .. 2**4 - 1; -- Bus turnaround delay
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CLKDIV: Integer range 0 .. 2**4 - 1; -- Clock divide ratio (offset by 1)
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DATLAT: Integer range 0 .. 2**4 - 1; -- Data latenct (offset by 2)
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ACCMOD: FSMC_Access_Mode;
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Reserved_30: Integer range 0 .. 2**2 - 1;
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end record with Size => 32;
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for FSMC_BTR use record
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ADDSET at 0 range 0 .. 3;
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ADDHLD at 0 range 4 .. 7;
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DATAST at 0 range 8 .. 15;
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BUSTURN at 0 range 16 .. 19;
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CLKDIV at 0 range 20 .. 23;
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DATLAT at 0 range 24 .. 27;
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ACCMOD at 0 range 28 .. 29;
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Reserved_30 at 0 range 30 .. 31;
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end record;
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type FSMC_BWTR is record
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ADDSET: Integer range 0 .. 2**4 - 1;
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ADDHLD: Integer range 0 .. 2**4 - 1;
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DATAST: Integer range 0 .. 2**8 - 1;
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BUSTURN: Integer range 0 .. 2**4 - 1;
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Reserved_20: Integer range 0 .. 2**8 - 1;
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ACCMOD: Integer range 0 .. 2**2 - 1;
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Reserved_30: Integer range 0 .. 2**2 - 1;
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end record with Size => 32;
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for FSMC_BWTR use record
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ADDSET at 0 range 0 .. 3;
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ADDHLD at 0 range 4 .. 7;
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DATAST at 0 range 8 .. 15;
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BUSTURN at 0 range 16 .. 19;
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Reserved_20 at 0 range 20 .. 27;
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ACCMOD at 0 range 28 .. 29;
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Reserved_30 at 0 range 30 .. 31;
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end record;
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type P_Memory_Type is (
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PC_Card,
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NAND_Flash
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);
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for P_Memory_Type use (
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PC_Card => 0,
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NAND_Flash => 1
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);
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type ECC_Page_Size is (
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ECC_Page_256_Bytes,
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ECC_Page_512_Bytes,
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ECC_Page_1024_Bytes,
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ECC_Page_2048_Bytes,
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ECC_Page_4096_Bytes,
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ECC_Page_8192_Bytes
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);
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for ECC_Page_Size use (
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ECC_Page_256_Bytes => 2#000#,
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ECC_Page_512_Bytes => 2#001#,
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ECC_Page_1024_Bytes => 2#010#,
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ECC_Page_2048_Bytes => 2#011#,
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ECC_Page_4096_Bytes => 2#100#,
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ECC_Page_8192_Bytes => 2#101#
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);
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-- PC Card / NAND flash control registers
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type FSMC_PCR is record
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Reserved_0: Integer range 0 .. 1;
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PWAITEN: Boolean;
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PBKEN: Boolean;
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PTYP: P_Memory_Type;
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PWID: Memory_Databus_Width;
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ECCEN: Boolean; -- ECC computation enable
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Reserved_7: Integer range 0 .. 2**2 - 1;
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TCLR: Integer range 0 .. 2**4 - 1; -- CLE-RE delay (offset by 1)
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TAR: Integer range 0 .. 2**4 - 1; -- ALE-RE delay (offset by 1)
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ECCPS: ECC_Page_Size;
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Reserved_20: Integer range 0 .. 2**12 - 1;
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end record with Size => 32;
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for FSMC_PCR use record
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Reserved_0 at 0 range 0 .. 0;
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PWAITEN at 0 range 1 .. 1;
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PBKEN at 0 range 2 .. 2;
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PTYP at 0 range 3 .. 3;
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PWID at 0 range 4 .. 5;
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ECCEN at 0 range 6 .. 6;
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Reserved_7 at 0 range 7 .. 8;
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TCLR at 0 range 9 .. 12;
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TAR at 0 range 13 .. 16;
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ECCPS at 0 range 17 .. 19;
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Reserved_20 at 0 range 20 .. 31;
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end record;
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type FSMC_SR is record
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IRS: Boolean;
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ILS: Boolean;
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IFS: Boolean;
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IREN: Boolean;
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ILEN: Boolean;
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IFEN: Boolean;
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FEMPT: Boolean;
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Reserved_7: Integer range 0 .. 2**25 - 1;
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end record with Size => 32;
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for FSMC_SR use record
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IRS at 0 range 0 .. 0;
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ILS at 0 range 1 .. 1;
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IFS at 0 range 2 .. 2;
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IREN at 0 range 3 .. 3;
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ILEN at 0 range 4 .. 4;
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IFEN at 0 range 5 .. 5;
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FEMPT at 0 range 6 .. 6;
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Reserved_7 at 0 range 7 .. 31;
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end record;
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type FSMC_PMEM is record
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MEMSET: Integer range 0 .. 2**8 - 1;
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MEMWAIT: Integer range 0 .. 2**8 - 1;
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MEMHOLD: Integer range 0 .. 2**8 - 1;
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MEMHIZ: Integer range 0 .. 2**8 - 1;
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end record with Size => 32;
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for FSMC_PMEM use record
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MEMSET at 0 range 0 .. 7;
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MEMWAIT at 0 range 8 .. 15;
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MEMHOLD at 0 range 16 .. 23;
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MEMHIZ at 0 range 24 .. 31;
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end record;
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type FSMC_PATT is record
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ATTSET: Integer range 0 .. 2**8 - 1;
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ATTWAIT: Integer range 0 .. 2**8 - 1;
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ATTHOLD: Integer range 0 .. 2**8 - 1;
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ATTHIZ: Integer range 0 .. 2**8 - 1;
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end record with Size => 32;
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for FSMC_PATT use record
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ATTSET at 0 range 0 .. 7;
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ATTWAIT at 0 range 8 .. 15;
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ATTHOLD at 0 range 16 .. 23;
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ATTHIZ at 0 range 24 .. 31;
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end record;
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type FSMC_PIO is record
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IOSET: Integer range 0 .. 2**8 - 1;
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IOWAIT: Integer range 0 .. 2**8 - 1;
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IOHOLD: Integer range 0 .. 2**8 - 1;
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IOHIZ: Integer range 0 .. 2**8 - 1;
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end record with Size => 32;
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for FSMC_PIO use record
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IOSET at 0 range 0 .. 7;
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IOWAIT at 0 range 8 .. 15;
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IOHOLD at 0 range 16 .. 23;
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IOHIZ at 0 range 24 .. 31;
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end record;
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type FSMC_Registers is record
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BCR1: FSMC_BCR;
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BCR2: FSMC_BCR;
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BCR3: FSMC_BCR;
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BCR4: FSMC_BCR;
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BTR1: FSMC_BTR;
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BTR2: FSMC_BTR;
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BTR3: FSMC_BTR;
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BTR4: FSMC_BTR;
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BWTR1: FSMC_BWTR;
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BWTR2: FSMC_BWTR;
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BWTR3: FSMC_BWTR;
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BWTR4: FSMC_BWTR;
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PCR2: FSMC_PCR;
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PCR3: FSMC_PCR;
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PCR4: FSMC_PCR;
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SR2: FSMC_SR;
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SR3: FSMC_SR;
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SR4: FSMC_SR;
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PMEM2: FSMC_PMEM;
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PMEM3: FSMC_PMEM;
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PMEM4: FSMC_PMEM;
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PATT2: FSMC_PATT;
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PATT3: FSMC_PATT;
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PATT4: FSMC_PATT;
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PIO4: FSMC_PIO;
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ECCR2: Interfaces.Unsigned_32;
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ECCR3: Interfaces.Unsigned_32;
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end record with Volatile;
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for FSMC_Registers use record
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BCR1 at 16#0000# range 0 .. 31;
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BCR2 at 16#0008# range 0 .. 31;
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BCR3 at 16#0010# range 0 .. 31;
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BCR4 at 16#0018# range 0 .. 31;
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BTR1 at 16#0004# range 0 .. 31;
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BTR2 at 16#000C# range 0 .. 31;
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BTR3 at 16#0014# range 0 .. 31;
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BTR4 at 16#001C# range 0 .. 31;
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BWTR1 at 16#0104# range 0 .. 31;
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BWTR2 at 16#010C# range 0 .. 31;
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BWTR3 at 16#0114# range 0 .. 31;
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BWTR4 at 16#011C# range 0 .. 31;
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PCR2 at 16#0060# range 0 .. 31;
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PCR3 at 16#0080# range 0 .. 31;
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PCR4 at 16#00A0# range 0 .. 31;
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SR2 at 16#0064# range 0 .. 31;
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SR3 at 16#0084# range 0 .. 31;
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SR4 at 16#00A4# range 0 .. 31;
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PMEM2 at 16#0068# range 0 .. 31;
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PMEM3 at 16#0088# range 0 .. 31;
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PMEM4 at 16#00A8# range 0 .. 31;
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PATT2 at 16#006C# range 0 .. 31;
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PATT3 at 16#008C# range 0 .. 31;
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PATT4 at 16#00AC# range 0 .. 31;
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PIO4 at 16#00B0# range 0 .. 31;
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ECCR2 at 16#0074# range 0 .. 31;
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ECCR3 at 16#0094# range 0 .. 31;
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end record;
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end STM32.Registers.FSMC;
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