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* gnu/packages/rust.scm (rust-source): Add "patches" argument. (rust-bootstrapped-package): Add "patches" argument. (rust-1.19)[arguments]<#:phases>[patch-tests]: Modify. [arguments]<#:phases>[patch-aarch64-test]: New phase. [arguments]<#:phases>[use-readelf-for-tests]: New phase. [arguments]<#:phases>[remove-unsupported-tests]: New phase. (rust-1.23): Disable "run-pass/out-of-stack.rs" test. (rust-1.24)[arguments]<#:phases>[patch-aarch64-test]: Replace. (rust-1.25)[inputs]: Switch to LLVM 6.0. (rust-1.25)[arguments]<#:phases>[enable-codegen-tests]: New variable. (rust): New variable. * gnu/packages/patches/rust-coresimd-doctest.patch: New file.
21 lines
973 B
Diff
21 lines
973 B
Diff
Doctest coresimd::x86::__m256 failed on processors withouth "avx" feature.
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Backported patch with changes from https://github.com/rust-lang-nursery/stdsimd/issues/481
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--- rustc-1.26.2-src-orig/src/stdsimd/coresimd/x86/mod.rs 1970-01-01 05:00:00.000000000 +0500
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+++ rustc-1.26.2-src/src/stdsimd/coresimd/x86/mod.rs 2018-06-22 00:01:55.142026720 +0500
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@@ -293,13 +293,13 @@
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/// use std::arch::x86_64::*;
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///
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/// # fn main() {
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- /// # #[target_feature(enable = "sse")]
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+ /// # #[target_feature(enable = "avx")]
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/// # unsafe fn foo() {
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/// let eight_zeros = _mm256_setzero_ps();
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/// let eight_ones = _mm256_set1_ps(1.0);
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/// let eight_floats = _mm256_set_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
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/// # }
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- /// # if is_x86_feature_detected!("sse") { unsafe { foo() } }
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+ /// # if is_x86_feature_detected!("avx") { unsafe { foo() } }
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/// # }
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/// ```
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pub struct __m256(f32, f32, f32, f32, f32, f32, f32, f32);
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