85 lines
2.5 KiB
Diff
85 lines
2.5 KiB
Diff
PR libgcc/60790
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x86: Do not assume ELF constructors run before IFUNC resolvers.
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* config/x86/host-config.h (libat_feat1_ecx, libat_feat1_edx):
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Remove declarations.
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(__libat_feat1, __libat_feat1_init): Declare.
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(FEAT1_REGISTER): Define.
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(load_feat1): New function.
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(IFUNC_COND_1): Adjust.
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* config/x86/init.c (libat_feat1_ecx, libat_feat1_edx)
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(init_cpuid): Remove definitions.
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(__libat_feat1): New variable.
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(__libat_feat1_init): New function.
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--- libatomic/config/x86/host-config.h (revision 264990)
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+++ libatomic/config/x86/host-config.h (working copy)
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@@ -25,13 +25,39 @@
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#if HAVE_IFUNC
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#include <cpuid.h>
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-extern unsigned int libat_feat1_ecx HIDDEN;
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-extern unsigned int libat_feat1_edx HIDDEN;
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+#ifdef __x86_64__
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+# define FEAT1_REGISTER ecx
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+#else
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+# define FEAT1_REGISTER edx
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+#endif
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+/* Value of the CPUID feature register FEAT1_REGISTER for the cmpxchg
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+ bit for IFUNC_COND1 below. */
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+extern unsigned int __libat_feat1 HIDDEN;
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+
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+/* Initialize libat_feat1 and return its value. */
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+unsigned int __libat_feat1_init (void) HIDDEN;
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+
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+/* Return the value of the relevant feature register for the relevant
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+ cmpxchg bit, or 0 if there is no CPUID support. */
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+static inline unsigned int
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+__attribute__ ((const))
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+load_feat1 (void)
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+{
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+ /* See the store in __libat_feat1_init. */
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+ unsigned int feat1 = __atomic_load_n (&__libat_feat1, __ATOMIC_RELAXED);
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+ if (feat1 == 0)
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+ /* Assume that initialization has not happened yet. This may get
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+ called repeatedly if the CPU does not have any feature bits at
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+ all. */
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+ feat1 = __libat_feat1_init ();
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+ return feat1;
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+}
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+
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#ifdef __x86_64__
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-# define IFUNC_COND_1 (libat_feat1_ecx & bit_CMPXCHG16B)
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+# define IFUNC_COND_1 (load_feat1 () & bit_CMPXCHG16B)
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#else
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-# define IFUNC_COND_1 (libat_feat1_edx & bit_CMPXCHG8B)
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+# define IFUNC_COND_1 (load_feat1 () & bit_CMPXCHG8B)
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#endif
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#ifdef __x86_64__
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--- libatomic/config/x86/init.c (revision 264990)
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+++ libatomic/config/x86/init.c (working copy)
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@@ -26,13 +26,17 @@
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#if HAVE_IFUNC
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-unsigned int libat_feat1_ecx, libat_feat1_edx;
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+unsigned int __libat_feat1;
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-static void __attribute__((constructor))
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-init_cpuid (void)
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+unsigned int
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+__libat_feat1_init (void)
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{
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- unsigned int eax, ebx;
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- __get_cpuid (1, &eax, &ebx, &libat_feat1_ecx, &libat_feat1_edx);
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+ unsigned int eax, ebx, ecx, edx;
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+ FEAT1_REGISTER = 0;
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+ __get_cpuid (1, &eax, &ebx, &ecx, &edx);
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+ /* See the load in load_feat1. */
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+ __atomic_store_n (&__libat_feat1, FEAT1_REGISTER, __ATOMIC_RELAXED);
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+ return FEAT1_REGISTER;
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}
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#endif /* HAVE_IFUNC */
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