151 lines
5.0 KiB
Diff
151 lines
5.0 KiB
Diff
From 03f41ac508d2c47fdfef08f0fd27ab154f7dcfd8 Mon Sep 17 00:00:00 2001
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From: David Sterba <dsterba@suse.com>
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Date: Tue, 12 Sep 2023 23:32:38 +0200
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Subject: [PATCH] btrfs-progs: detect PCLMUL CPU support for accelerated crc32c
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The accelerated crc32c needs to check for two CPU features, the crc32c
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instructions is in SSE 4.2 and 'pclmulqdq' is a separate. There's still
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old hardware used that does not have the PCLMUL instructions. Detect it
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and make it the condition.
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The pclmul is not supported on old compilers so also add a
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configure-time detection and leave the SSE 4.2 only implementation as
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the accelerated one if possible.
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Issue: #676
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Signed-off-by: David Sterba <dsterba@suse.com>
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---
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common/cpu-utils.c | 5 +++++
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common/cpu-utils.h | 1 +
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config/ax_gcc_builtin.m4 | 1 +
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configure.ac | 1 +
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crypto/crc32c.c | 9 +++------
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crypto/hash-speedtest.c | 2 +-
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crypto/hash-vectest.c | 2 +-
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7 files changed, 13 insertions(+), 8 deletions(-)
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diff --git a/common/cpu-utils.c b/common/cpu-utils.c
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index 3527a3cb01..568e3af55a 100644
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--- a/common/cpu-utils.c
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+++ b/common/cpu-utils.c
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@@ -54,6 +54,7 @@ void cpu_print_flags(void) {
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FLAG(SSE2);
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FLAG(SSSE3);
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FLAG(SSE41);
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+ FLAG(PCLMUL);
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FLAG(SSE42);
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FLAG(SHA);
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FLAG(AVX);
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@@ -76,6 +77,10 @@ void cpu_detect_flags(void)
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__cpu_flags |= CPU_FLAG_SSSE3;
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if (__builtin_cpu_supports("sse4.1"))
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__cpu_flags |= CPU_FLAG_SSE41;
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+#if HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL
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+ if (__builtin_cpu_supports("pclmul"))
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+ __cpu_flags |= CPU_FLAG_PCLMUL;
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+#endif
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if (__builtin_cpu_supports("sse4.2"))
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__cpu_flags |= CPU_FLAG_SSE42;
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if (__builtin_cpu_supports("avx"))
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diff --git a/common/cpu-utils.h b/common/cpu-utils.h
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index e4a8641b05..014788f422 100644
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--- a/common/cpu-utils.h
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+++ b/common/cpu-utils.h
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@@ -33,6 +33,7 @@ enum cpu_feature {
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ENUM_CPU_BIT(CPU_FLAG_SSE2),
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ENUM_CPU_BIT(CPU_FLAG_SSSE3),
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ENUM_CPU_BIT(CPU_FLAG_SSE41),
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+ ENUM_CPU_BIT(CPU_FLAG_PCLMUL),
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ENUM_CPU_BIT(CPU_FLAG_SSE42),
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ENUM_CPU_BIT(CPU_FLAG_SHA),
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ENUM_CPU_BIT(CPU_FLAG_AVX),
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diff --git a/config/ax_gcc_builtin.m4 b/config/ax_gcc_builtin.m4
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index c89f89ec3d..224e824c1d 100644
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--- a/config/ax_gcc_builtin.m4
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+++ b/config/ax_gcc_builtin.m4
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@@ -124,6 +124,7 @@ AC_DEFUN([AX_GCC_BUILTIN], [
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[__builtin_cpu_init], [$1()],
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[__builtin_cpu_is], [$1("intel")],
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[__builtin_cpu_supports], [$1("sse")],
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+ [__builtin_cpu_supports__pclmul], [__builtin_cpu_supports("pclmul")],
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[__builtin_ctz], [$1(0)],
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[__builtin_ctzl], [$1(0)],
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[__builtin_ctzll], [$1(0)],
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diff --git a/configure.ac b/configure.ac
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index 1ef5f83cfe..1850048bbb 100644
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--- a/configure.ac
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+++ b/configure.ac
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@@ -86,6 +86,7 @@ AC_SUBST([HAVE_GLIBC])
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AX_GCC_BUILTIN([__builtin_add_overflow])
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AX_GCC_BUILTIN([__builtin_sub_overflow])
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AX_GCC_BUILTIN([__builtin_mul_overflow])
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+AX_GCC_BUILTIN([__builtin_cpu_supports__pclmul])
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AC_CHECK_HEADERS([linux/perf_event.h])
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AC_CHECK_HEADERS([linux/hw_breakpoint.h])
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diff --git a/crypto/crc32c.c b/crypto/crc32c.c
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index 23cbb1a63d..0d540ef658 100644
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--- a/crypto/crc32c.c
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+++ b/crypto/crc32c.c
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@@ -25,7 +25,7 @@ static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t
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return crc_pcl(data, len, crc);
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}
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-#else
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+#endif
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/*
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* Based on a posting to lkml by Austin Zhang <austin.zhang@intel.com>
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@@ -86,8 +86,6 @@ static uint32_t crc32c_intel(uint32_t crc, unsigned char const *data, uint32_t l
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return crc;
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}
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-#endif
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-
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void crc32c_init_accel(void)
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{
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/*
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@@ -96,14 +94,13 @@ void crc32c_init_accel(void)
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*/
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if (0) {
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#ifdef __GLIBC__
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- } else if (cpu_has_feature(CPU_FLAG_SSE42)) {
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+ } else if (cpu_has_feature(CPU_FLAG_PCLMUL)) {
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/* printf("CRC32C: pcl\n"); */
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crc_function = crc32c_pcl;
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-#else
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+#endif
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} else if (cpu_has_feature(CPU_FLAG_SSE42)) {
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/* printf("CRC32c: intel\n"); */
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crc_function = crc32c_intel;
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-#endif
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} else {
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/* printf("CRC32c: fallback\n"); */
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crc_function = __crc32c_le;
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diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
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index 2b02f6ae7f..88f9c9b17b 100644
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--- a/crypto/hash-speedtest.c
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+++ b/crypto/hash-speedtest.c
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@@ -190,7 +190,7 @@ int main(int argc, char **argv) {
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{ .name = "CRC32C-ref", .digest = hash_crc32c, .digest_size = 4,
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.cpu_flag = CPU_FLAG_NONE },
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{ .name = "CRC32C-NI", .digest = hash_crc32c, .digest_size = 4,
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- .cpu_flag = CPU_FLAG_SSE42 },
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+ .cpu_flag = CPU_FLAG_PCLMUL },
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{ .name = "XXHASH", .digest = hash_xxhash, .digest_size = 8 },
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{ .name = "SHA256-ref", .digest = hash_sha256, .digest_size = 32,
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.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
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diff --git a/crypto/hash-vectest.c b/crypto/hash-vectest.c
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index 2a00c02981..07a830fb59 100644
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--- a/crypto/hash-vectest.c
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+++ b/crypto/hash-vectest.c
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@@ -442,7 +442,7 @@ static const struct hash_testspec test_spec[] = {
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.digest_size = 4,
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.testvec = crc32c_tv,
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.count = ARRAY_SIZE(crc32c_tv),
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- .cpu_flag = CPU_FLAG_SSE42,
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+ .cpu_flag = CPU_FLAG_PCLMUL,
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.hash = hash_crc32c
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}, {
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.name = "XXHASH",
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