92 lines
4.4 KiB
Diff
92 lines
4.4 KiB
Diff
From e7c9a6cae09d99388d8384ca7c0fb5b24b353975 Mon Sep 17 00:00:00 2001
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From: Nikita Popov <npopov@redhat.com>
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Date: Mon, 17 Jan 2022 15:48:01 +0100
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Subject: [PATCH] [SDAG] Don't move DBG_VALUE instructions after insertion
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point during scheduling (PR53243)
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EmitSchedule() shouldn't be touching instructions after the provided
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insertion point. The change introduced in D83561 performs a scan to
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the end of the block, and thus may move unrelated instructions. In
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particular, this ends up moving instructions that have been produced
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by FastISel and will later be deleted. Moving them means that more
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instructions than intended are removed.
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Fix this by stopping the iteration when the insertion point is
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reached.
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Fixes https://github.com/llvm/llvm-project/issues/53243.
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Differential Revision: https://reviews.llvm.org/D117489
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---
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.../SelectionDAG/ScheduleDAGSDNodes.cpp | 7 ++--
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.../CodeGen/X86/pr53243-tail-call-fastisel.ll | 39 +++++++++++++++++++
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2 files changed, 43 insertions(+), 3 deletions(-)
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create mode 100644 llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
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diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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index bec240d6c4d4..403f34573899 100644
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--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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@@ -1057,12 +1057,13 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
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"first terminator cannot be a debug value");
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for (MachineInstr &MI : make_early_inc_range(
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make_range(std::next(FirstTerm), InsertBB->end()))) {
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+ // Only scan up to insertion point.
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+ if (&MI == InsertPos)
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+ break;
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+
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if (!MI.isDebugValue())
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continue;
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- if (&MI == InsertPos)
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- InsertPos = std::prev(InsertPos->getIterator());
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-
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// The DBG_VALUE was referencing a value produced by a terminator. By
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// moving the DBG_VALUE, the referenced value also needs invalidating.
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MI.getOperand(0).ChangeToRegister(0, false);
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diff --git a/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
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new file mode 100644
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index 000000000000..333eff8fb008
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--- /dev/null
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+++ b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
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@@ -0,0 +1,39 @@
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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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+; RUN: llc -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s
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+
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+define void @test() {
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+; CHECK-LABEL: test:
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+; CHECK: # %bb.0:
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+; CHECK-NEXT: jmp set_state@PLT # TAILCALL
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+ tail call void @set_state()
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+ call void @llvm.dbg.value(metadata i64 0, metadata !10, metadata !DIExpression()), !dbg !16
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+ ret void
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+}
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+
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+declare void @set_state()
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+
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+; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
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+declare void @llvm.dbg.value(metadata, metadata, metadata) #0
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+
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+attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }
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+
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+!llvm.module.flags = !{!0}
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+!llvm.dbg.cu = !{!1}
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+
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+!0 = !{i32 2, !"Debug Info Version", i32 3}
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+!1 = distinct !DICompileUnit(language: DW_LANG_Rust, file: !2, producer: "clang LLVM (rustc version 1.60.0-nightly (ec4bcaac4 2022-01-15))", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !3)
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+!2 = !DIFile(filename: "src/lib.rs/@/bug.63e521cd-cgu.0", directory: "/tmp/rust-bug")
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+!3 = !{!4}
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+!4 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Option", file: !5, baseType: !6, size: 8, align: 8, flags: DIFlagEnumClass, elements: !7)
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+!5 = !DIFile(filename: "<unknown>", directory: "")
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+!6 = !DIBasicType(name: "u8", size: 8, encoding: DW_ATE_unsigned)
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+!7 = !{!8, !9}
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+!8 = !DIEnumerator(name: "None", value: 0)
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+!9 = !DIEnumerator(name: "Some", value: 1)
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+!10 = !DILocalVariable(name: "msg", arg: 2, scope: !11, file: !12, line: 689, type: !6)
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+!11 = distinct !DISubprogram(name: "expect<()>", linkageName: "_ZN4core6option15Option$LT$T$GT$6expect17h9a574c18f194c213E", scope: !4, file: !12, line: 689, type: !13, scopeLine: 689, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !1, templateParams: !15, retainedNodes: !15)
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+!12 = !DIFile(filename: "/rustc/ec4bcaac450279b029f3480b8b8f1b82ab36a5eb/library/core/src/option.rs", directory: "", checksumkind: CSK_MD5, checksum: "4120c8557937a0772190a676ec193800")
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+!13 = !DISubroutineType(types: !14)
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+!14 = !{null, !4}
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+!15 = !{}
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+!16 = !DILocation(line: 0, scope: !11)
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