freebsd-ports/cad/Makefile

# $FreeBSD$
#
    SUBDIR += ziarc

    SUBDIR += astk-client
    SUBDIR += astk-serveur
    SUBDIR += atlc
    SUBDIR += calculix
    SUBDIR += cascade
    SUBDIR += chipmunk
    SUBDIR += chipvault
    SUBDIR += cider
    SUBDIR += electric
    SUBDIR += felt
    SUBDIR += geda
    SUBDIR += geda-symbols
    SUBDIR += geda-symcheck
    SUBDIR += geda-utils
    SUBDIR += gerbv
    SUBDIR += gmsh
    SUBDIR += gnetlist
    SUBDIR += gnucap
    SUBDIR += gschem
    SUBDIR += gtkwave
    SUBDIR += gwave
    SUBDIR += irsim
    SUBDIR += iverilog
    SUBDIR += kaskade
    SUBDIR += leocad
    SUBDIR += libgeda
    SUBDIR += linux-eagle
    SUBDIR += magic
    SUBDIR += mars
    SUBDIR += metis-edf
    SUBDIR += ngspice_rework
    SUBDIR += oregano
    SUBDIR += pcb
    SUBDIR += pdnmesh
    SUBDIR += qcad
    SUBDIR += qfsm
    SUBDIR += qmls
    SUBDIR += sceptre
    SUBDIR += slffea
    SUBDIR += spice
    SUBDIR += tkgate
    SUBDIR += tochnog
    SUBDIR += transcalc
    SUBDIR += varkon
    SUBDIR += vipec
    SUBDIR += xcircuit

.include <bsd.port.subdir.mk>
Change Id->FreeBSD. 1999-08-25 06:58:03 +02:00			`# $FreeBSD$`
New cad group 1995-01-13 12:10:43 +01:00			`#`
add ziarc 20020729 ZiaRC is a Resistor Calculator 2003-02-09 18:11:07 +01:00			`SUBDIR += ziarc`
Clean up subdir Makefiles. They now all look like this: ===== # Id line # # RESTRICTED: restricted_port_1 (comment1) # RESTRICTED: restricted_port_2 (comment2) # # BROKEN: broken_port_3 (comment3) # BROKEN: broken_port_4 (comment4) # BROKEN: broken_port_5 (comment5) # SUBDIR= good_port_1 good_port_2 ... ===== Basically, the idea is to make it easy to find restricted or broken ports by doing a "grep". 1995-05-14 05:30:07 +02:00
Add astk-client , graphical interface for Code_Aster (client side). PR: 54765 Submitted by: thierry@pompo.net 2003-07-23 13:25:42 +02:00			`SUBDIR += astk-client`
Add astk-serveur 1.0.14, graphical interface for Code_Aster (server side). PR: 54764 Submitted by: thierry@pompo.net 2003-07-23 13:20:26 +02:00			`SUBDIR += astk-serveur`
New port atlc version 4.0.1: A tool to calculate the impedance of transmission lines Submitted by: blackend 2002-11-13 21:21:29 +01:00			`SUBDIR += atlc`
A Three-Dimensional Structural Finite Element Program Submitted by : Pedro F. Giffuni <giffunip@yahoo.com> Almost writeen by: maho 2003-05-05 15:06:37 +02:00			`SUBDIR += calculix`
New port cascade version 1.4: A simple tool to analyze noise and distortion of a RF system Submitted by: blackend 2002-11-13 20:12:13 +01:00			`SUBDIR += cascade`
Add chipmunk, convert to new format along the way. 1995-08-25 12:06:06 +02:00			`SUBDIR += chipmunk`
add chipvault 200211 A project organizer for VHDL and Verilog RTL hardware designs 2003-01-29 04:45:13 +01:00			`SUBDIR += chipvault`
cider version 1b1 A mixed-level circuit and device simulator (includes SPICE3). PR: 15462 Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org> 1999-12-25 16:40:48 +01:00			`SUBDIR += cider`
Activate Electric. PR: ports/18380 Submitted by: Mario Sergio Fujikawa Ferreira <lioux@linf.unb.br> 2000-07-30 09:14:47 +02:00			`SUBDIR += electric`
Add felt. 1997-01-15 08:49:06 +01:00			`SUBDIR += felt`
Activate geda. 1998-12-06 15:13:23 +01:00			`SUBDIR += geda`
geda-symbols is the basic component of geda package. Submitted byu.schwander@technologist.com 2001-04-07 02:17:32 +02:00			`SUBDIR += geda-symbols`
add geda-symcheck gEDA symbol checking utility PR: 43563 Submitted by: bruno <bruno@mail.tinkerbox.org> 2002-10-10 20:35:25 +02:00			`SUBDIR += geda-symcheck`
add geda-utils gEDA utilities PR: 43563 Submitted by: bruno <bruno@mail.tinkerbox.org> 2002-10-10 20:38:37 +02:00			`SUBDIR += geda-utils`
add gerbv 0.0.9 A Free Gerber Viewer 2002-07-15 22:00:33 +02:00			`SUBDIR += gerbv`
Add gmsh 1.45.1, an automatic 3D finite element mesh generator. PR: 52201 Submitted by: Pedro Giffuni <giffunip@yahoo.com> 2003-07-23 16:21:51 +02:00			`SUBDIR += gmsh`
gEDA electronic schematic capture tools Submitted by: bruno.schwander@technologist.com 2001-04-07 02:19:08 +02:00			`SUBDIR += gnetlist`
add gnucap 0.30 The Gnu Circuit Analysis Package 2002-02-07 08:07:48 +01:00			`SUBDIR += gnucap`
gEDA electronic schematic capture tools Submitted by: bruno.schwander@technologist.com 2001-04-07 02:20:37 +02:00			`SUBDIR += gschem`
add gtkwave 2.0.0p1 Electronic Waveform Viewer 2002-05-12 17:14:08 +02:00			`SUBDIR += gtkwave`
new port: cad/gwave Gwave is a waveform viewer. Its purpose is for viewing analog data, such as the output from Spice-like simulations. PR: ports/39364 Submitted by: Duncan Barclay <dmlb@dmlb.org> 2003-01-19 01:35:38 +01:00			`SUBDIR += gwave`
Add chipmunk, convert to new format along the way. 1995-08-25 12:06:06 +02:00			`SUBDIR += irsim`
add iverilog, a Verilog simulation and synthesis tool 2001-02-13 12:02:15 +01:00			`SUBDIR += iverilog`
Activate kaskade. 1997-11-17 11:53:52 +01:00			`SUBDIR += kaskade`
Add leocad 0.73, a CAD program that uses bricks similar to those found in many toys. PR: 35231 Submitted by: David Yeske <dyeske@yahoo.com> 2002-03-03 01:40:21 +01:00			`SUBDIR += leocad`
libgeda is a a base library common to all the gEDA tools Submitted by: bruno.schwander@technologist.com 2001-04-07 02:09:57 +02:00			`SUBDIR += libgeda`
Add linux-eagle , an easy to use, yet powerful tool for designing printed circuit boards. 2001-12-26 17:12:17 +01:00			`SUBDIR += linux-eagle`
Add chipmunk, convert to new format along the way. 1995-08-25 12:06:06 +02:00			`SUBDIR += magic`
Turn on mars and lprps 1996-11-25 02:24:47 +01:00			`SUBDIR += mars`
Add metis-edf 3, meshes partionning tool used by Code_Aster. PR: 53909 Submitted by: thierry@pompo.net 2003-07-23 10:37:16 +02:00			`SUBDIR += metis-edf`
Initial import of ngspice_rework Ngspice_rework is a circuit simulator derived from spice3f5. PR: 34589 Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org> 2002-02-09 11:03:42 +01:00			`SUBDIR += ngspice_rework`
Add oregano, schematic capture and simulation of electrical circuits. PR: ports/25202 Submitted by: Anders Andersson <anders@codefactory.se> 2001-03-07 12:00:31 +01:00			`SUBDIR += oregano`
Add chipmunk, convert to new format along the way. 1995-08-25 12:06:06 +02:00			`SUBDIR += pcb`
add pdnmesh A finite element program PR: 30115 Submitted by: Sarod Yatawatta <sarod@cs.pdn.ac.lk> 2001-10-14 19:54:31 +02:00			`SUBDIR += pdnmesh`
New port QCad, a 2D-CAD program. Uses Qt-2. 1999-12-22 11:40:56 +01:00			`SUBDIR += qcad`
add qfsm 0.30 A graphical tool for designing finite state machines 2002-04-11 20:27:36 +02:00			`SUBDIR += qfsm`
add qmls Quine-McCluskey Logic Simplifier 2001-12-10 06:18:39 +01:00			`SUBDIR += qmls`
SCEPTRE (System for Circuit Evaluation and Prediction of Transient Radiation Effects) is a general purpose circuit analysis program which provides all three major analyses, AC, DC, and transient analysis, on either linear or nonlinear networks. It employs a free-form input language and state variable methods to simulate problems of interest to electrical engineers. Requested-by: "Pedro F. Giffuni" <pfg1+@pitt.edu> 2001-02-11 07:58:11 +01:00			`SUBDIR += sceptre`
add slffea 1.25 San Le's Free Finite Element Analysis 2002-02-09 08:30:11 +01:00			`SUBDIR += slffea`
Sort entries. In particular, "large", "medium", "small" sort in this order, dispite their meanings. (Sometimes we're too smart for computers. :) Found by: sorting ports/INDEX by "sort -t '\|' +1 -2" (Note: the whole "x11" category appears at the end with the above sort command, but I'll leave that the way it is for now -- "ls" shows it before other x11-* entries.) 1998-12-07 03:22:12 +01:00			`SUBDIR += spice`
Activate the tkgate port. 1999-06-06 19:12:34 +02:00			`SUBDIR += tkgate`
Add new port cad/tochnog tochnog is a free finite element program with many features which is distributed under GPL. TOCHNOG accepts free format input. Boundary conditions can be imposed at geometrical entities, as well as nodes and elements. PR: 52088 Submitted by: Pedro F. Giffuni <giffunip@yahoo.com> 2003-07-13 07:29:48 +02:00			`SUBDIR += tochnog`
add transcalc 0.13 A analysis and synthesis tool for RF and microwave transmission lines 2002-09-06 11:40:18 +02:00			`SUBDIR += transcalc`
NEW port CAD/varkon A free CAD system and high level development tool for Engineering. It's a very interesting port for some branches of engineering. PR: ports/52202 Submitted by: Pedro F. Giffuni <giffunip@yahoo.com> 2003-05-21 01:03:37 +02:00			`SUBDIR += varkon`
add vipec ViPEC is a powerful tool for the analysis of high frequency, linear electrical networks 2001-04-03 07:30:51 +02:00			`SUBDIR += vipec`
Activate xcircuit. 1998-05-18 06:21:53 +02:00			`SUBDIR += xcircuit`
New cad group 1995-01-13 12:10:43 +01:00
			`.include <bsd.port.subdir.mk>`