12 lines
717 B
Text
12 lines
717 B
Text
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ABC is a growing software system for synthesis and verification of binary
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sequential logic circuits appearing in synchronous hardware designs. ABC
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combines scalable logic optimization based on And-Inverter Graphs (AIGs),
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optimal-delay DAG-based technology mapping for look-up tables and standard
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cells, and innovative algorithms for sequential synthesis and verification.
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ABC provides an experimental implementation of these algorithms and a
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programming environment for building similar applications. Future development
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will focus on improving the algorithms and making most of the packages
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stand-alone. This will allow the user to customize ABC for their needs as if
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it were a tool-box rather than a complete tool.
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