17 lines
800 B
Text
17 lines
800 B
Text
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The RISC-V Supervisor Binary Interface (SBI) is the recommended interface
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between:
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1. A platform-specific firmware running in M-mode and a bootloader, a
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hypervisor or a general-purpose OS executing in S-mode or HS-mode.
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2. A hypervisor running in HS-mode and a bootloader or a general-purpose OS
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executing in VS-mode.
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The RISC-V SBI specification is maintained as an independent project by the
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RISC-V Foundation at https://github.com/riscv/riscv-sbi-doc.
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The goal of the OpenSBI project is to provide an open-source reference
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implementation of the RISC-V SBI specifications for platform-specific firmwares
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executing in M-mode (case 1 mentioned above). An OpenSBI implementation can be
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easily extended by RISC-V platform and system-on-chip vendors to fit a
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particular hardware configuration.
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