6 lines
252 B
Text
6 lines
252 B
Text
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The goals of the FreeHDL project are to develop a VHDL simulator that has
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a graphical waveform viewer and a source level debugger. It also aims at
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VHDL-93 compliancy. The project is at a very early development stage.
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WWW: http://www.freehdl.seul.org/
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