kpriv/freebsd-ports
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Upgrade to GCC 4.5.1.

Browse source 
Completely reorganize the patches for this port.

Patches for new devices are now synchronized with the Atmel AVR tools.
The main difference is the naming scheme, as FreeBSD patches start
with "patch-", while the Atmel AVR Tools patches end up in ".patch".
This commit is contained in:
Joerg Wunsch 2011-12-17 09:56:31 +00:00
parent dc332fc48b
commit 0c19ecdca8
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=287533
34 changed files with 7069 additions and 3086 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
devel/avr-gcc/Makefile
View file

@ -6,8 +6,7 @@
#
PORTNAME= gcc
PORTVERSION= 4.3.4
PORTREVISION= 2
PORTVERSION= 4.5.1
CATEGORIES= devel
MASTER_SITES= ${MASTER_SITE_GCC}
MASTER_SITES+= http://people.freebsd.org/~joerg/:local
@ -24,7 +23,8 @@ COMMENT= FSF GCC 4.x for Atmel AVR 8-bit RISC cross-development
BUILD_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils
LIB_DEPENDS= mpfr.4:${PORTSDIR}/math/mpfr \
gmp.10:${PORTSDIR}/math/gmp
gmp.10:${PORTSDIR}/math/gmp \
mpc.2:${PORTSDIR}/math/mpc
RUN_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils

8
devel/avr-gcc/distinfo
View file

@ -1,4 +1,4 @@
SHA256 (gcc-core-4.3.4.tar.bz2) = 3189838f5047be4ff54711c84db17c76ecfcc79bf4f4d110bf7323eeb90568fa
SIZE (gcc-core-4.3.4.tar.bz2) = 24329359
SHA256 (gcc-g++-4.3.4.tar.bz2) = f8d27b4d2c8fa492a1f8b7af46a39192c28dda1e863ae28a80b7fec4caf41735
SIZE (gcc-g++-4.3.4.tar.bz2) = 5623014
SHA256 (gcc-core-4.5.1.tar.bz2) = b57b37a83840b134572b042f170d7a9429863ba0308b56b403b35de6f0e0526a
SIZE (gcc-core-4.5.1.tar.bz2) = 27974462
SHA256 (gcc-g++-4.5.1.tar.bz2) = a5349ea8d531aa0a248484f426513e5d05b12915e5412d332c278f65d272ce48
SIZE (gcc-g++-4.5.1.tar.bz2) = 6473733

9
devel/avr-gcc/files/patch-libiberty-Makefile.in → devel/avr-gcc/files/patch-200-gcc-4.5.1-libiberty-Makefile.in
View file

@ -1,7 +1,7 @@
diff -ur ../gcc-4.3.4.orig/libiberty/Makefile.in ./libiberty/Makefile.in
--- ../gcc-4.3.4.orig/libiberty/Makefile.in 2007-07-25 08:26:45.000000000 +0200
+++ ./libiberty/Makefile.in 2009-10-02 15:20:13.000000000 +0200
@@ -344,7 +344,8 @@
diff -Naurp libiberty/Makefile.in libiberty/Makefile.in
--- libiberty/Makefile.in 2010-03-02 00:09:56.000000000 -0600
+++ libiberty/Makefile.in 2011-01-18 17:27:57.000000000 -0600
@@ -321,7 +321,8 @@ libiberty.html : $(srcdir)/libiberty.tex
@MAINT@ echo stamp > stamp-functions
INSTALL_DEST = @INSTALL_DEST@
@ -11,4 +11,3 @@ diff -ur ../gcc-4.3.4.orig/libiberty/Makefile.in ./libiberty/Makefile.in
# This is tricky. Even though CC in the Makefile contains
# multilib-specific flags, it's overridden by FLAGS_TO_PASS from the
Only in ./libiberty: Makefile.in.orig

2755
devel/avr-gcc/files/patch-300-gcc-4.5.1-fixedpoint-3-4-2010 Normal file
View file

File diff suppressed because it is too large Load diff

810
devel/avr-gcc/files/patch-301-gcc-4.5.1-xmega-v14 Normal file
View file

@ -0,0 +1,810 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 12:51:39.000000000 -0600
@@ -52,6 +52,7 @@
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
+static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
static int avr_OS_main_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
@@ -122,6 +123,7 @@ static const struct attribute_spec avr_a
{ "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
{ "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
@@ -314,6 +316,21 @@ signal_function_p (tree func)
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a nmi function as specified
+ by the "nmi" attribute. */
+
+static int
+nmi_function_p (tree func)
+{
+ tree a;
+
+ if (TREE_CODE (func) != FUNCTION_DECL)
+ return 0;
+
+ a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func));
+ return a != NULL_TREE;
+}
+
/* Return nonzero if FUNC is a OS_task function. */
static int
@@ -543,6 +560,7 @@ expand_prologue (void)
cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
cfun->machine->is_signal = signal_function_p (current_function_decl);
+ cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
cfun->machine->stack_usage = 0;
@@ -583,18 +601,49 @@ expand_prologue (void)
/* Push SREG. */
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
cfun->machine->stack_usage++;
+ /* Push RAMPD, RAMPX, RAMPY. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Push RAMPD. */
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ /* Push RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ /* Push RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
+
/* Push RAMPZ. */
if(AVR_HAVE_RAMPZ
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -607,6 +656,41 @@ expand_prologue (void)
/* Prevent any attempt to delete the setting of ZERO_REG! */
emit_use (zero_reg_rtx);
+
+
+ /*
+ Clear RAMP? registers if used for data access in the interrupt/signal
+ context. Do this after the zero register has been explictly cleared.
+ */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Set RAMPD to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ /* Set RAMPX to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ /* Set RAMPY to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if(AVR_HAVE_RAMPZ
+ && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
+ {
+ /* Set RAMPZ to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
+
}
if (minimize && (frame_pointer_needed
|| (AVR_2_BYTE_PC && live_seq > 6)
@@ -698,16 +782,16 @@ expand_prologue (void)
insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
}
- else if (TARGET_NO_INTERRUPTS
- || cfun->machine->is_signal
- || cfun->machine->is_OS_main)
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
+ || (!AVR_XMEGA && cfun->machine->is_signal)
+ || (!AVR_XMEGA && cfun->machine->is_OS_main))
{
insn =
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
RTX_FRAME_RELATED_P (insn) = 1;
}
- else if (cfun->machine->is_interrupt)
+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
{
insn = emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
frame_pointer_rtx));
@@ -878,13 +962,13 @@ expand_epilogue (void)
{
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
- else if (TARGET_NO_INTERRUPTS
- || cfun->machine->is_signal)
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
+ || (!AVR_XMEGA && cfun->machine->is_signal))
{
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
}
- else if (cfun->machine->is_interrupt)
+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
{
emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
frame_pointer_rtx));
@@ -937,14 +1021,39 @@ expand_epilogue (void)
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(RAMPZ_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_RAMPZ_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Pop RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPD. */
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
tmp_reg_rtx);
}
/* Restore SREG using tmp reg as scratch. */
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(SREG_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_SREG_ADDR)),
tmp_reg_rtx);
/* Restore tmp REG. */
@@ -1722,9 +1831,17 @@ output_movhi (rtx insn, rtx operands[],
return *l = 1, AS2 (out,__SP_L__,%A1);
/* Use simple load of stack pointer if no interrupts are
used. */
- else if (TARGET_NO_INTERRUPTS)
+ else if (!AVR_XMEGA && TARGET_NO_INTERRUPTS)
return *l = 2, (AS2 (out,__SP_H__,%B1) CR_TAB
AS2 (out,__SP_L__,%A1));
+ if(AVR_XMEGA)
+ {
+ *l = 2;
+ return (AS2 (out,__SP_L__,%A1) CR_TAB
+ AS2 (out,__SP_H__,%B1));
+ }
+ else
+ {
*l = 5;
return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
"cli" CR_TAB
@@ -1732,6 +1849,7 @@ output_movhi (rtx insn, rtx operands[],
AS2 (out,__SREG__,__tmp_reg__) CR_TAB
AS2 (out,__SP_L__,%A1));
}
+ }
else if (test_hard_reg_class (STACK_REG, src))
{
*l = 2;
@@ -1865,7 +1983,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (in,%0,__SREG__);
@@ -1873,7 +1991,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
- return AS2 (in,%0,%m1-0x20);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (in,%0,%m1-%2);
}
*l = 2;
return AS2 (lds,%0,%m1);
@@ -2061,8 +2180,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
- return (AS2 (in,%A0,%m1-0x20) CR_TAB
- AS2 (in,%B0,%m1+1-0x20));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return (AS2 (in,%A0,%m1-%2) CR_TAB
+ AS2 (in,%B0,%m1+1-%2));
}
*l = 4;
return (AS2 (lds,%A0,%m1) CR_TAB
@@ -2561,7 +2681,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (out,__SREG__,%1);
@@ -2569,7 +2689,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
- return AS2 (out,%m0-0x20,%1);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (out,%m0-%2,%1);
}
*l = 2;
return AS2 (sts,%m0,%1);
@@ -2648,9 +2769,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
- return (AS2 (out,%m0+1-0x20,%B1) CR_TAB
- AS2 (out,%m0-0x20,%A1));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ if (AVR_XMEGA)
+ return (AS2 (out,%A0-%2,%A1) CR_TAB
+ AS2 (out,%B0-%2,%B1));
+ else
+ return (AS2 (out,%m0+1-%2,%B1) CR_TAB
+ AS2 (out,%m0-%2,%A1));
}
+ if (AVR_XMEGA)
+ return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
+ AS2 (sts,%B0,%B1));
+ else
return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
AS2 (sts,%m0,%A1));
}
@@ -2667,11 +2797,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__));
else
+ {
+ if (!AVR_XMEGA)
return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__) CR_TAB
AS2 (sbiw,r26,1) CR_TAB
AS2 (st,X,r26));
+ else
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (st,X,r26) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
else
{
@@ -2679,14 +2818,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
return *l=2, (AS2 (st,X+,%A1) CR_TAB
AS2 (st,X,%B1));
else
+ {
+ if (!AVR_XMEGA)
return *l=3, (AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,%B1) CR_TAB
AS2 (st,-X,%A1));
+ else
+ return *l=3, (AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
}
else
+ {
+ if (!AVR_XMEGA)
return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
AS2 (st,%0,%A1));
+ else
+ return *l=2, (AS2 (st,%0,%A1) CR_TAB
+ AS2 (std,%0+1,%B1));
+ }
}
else if (GET_CODE (base) == PLUS)
{
@@ -2697,6 +2849,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (reg_base != REG_Y)
fatal_insn ("incorrect insn:",insn);
+ if (!AVR_XMEGA)
+ {
if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
AS2 (std,Y+63,%B1) CR_TAB
@@ -2710,11 +2864,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (subi,r28,lo8(%o0)) CR_TAB
AS2 (sbci,r29,hi8(%o0)));
}
+ else
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
+ }
if (reg_base == REG_X)
{
/* (X + d) = R */
if (reg_src == REG_X)
{
+ if (!AVR_XMEGA)
+ {
*l = 7;
return (AS2 (mov,__tmp_reg__,r26) CR_TAB
AS2 (mov,__zero_reg__,r27) CR_TAB
@@ -2724,21 +2896,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS1 (clr,__zero_reg__) CR_TAB
AS2 (sbiw,r26,%o0));
}
+ else
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,__tmp_reg__) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+ if (!AVR_XMEGA)
+ {
*l = 4;
return (AS2 (adiw,r26,%o0+1) CR_TAB
AS2 (st,X,%B1) CR_TAB
AS2 (st,-X,%A1) CR_TAB
AS2 (sbiw,r26,%o0));
}
+ else
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+
+ if (!AVR_XMEGA)
return *l=2, (AS2 (std,%B0,%B1) CR_TAB
AS2 (std,%A0,%A1));
+ else
+ return *l=2, (AS2 (std,%A0,%A1) CR_TAB
+ AS2 (std,%B0,%B1));
}
else if (GET_CODE (base) == PRE_DEC) /* (--R) */
+ {
+ if (mem_volatile_p && AVR_XMEGA)
+ return *l = 4, (AS2 (sbiw,%r0,2) CR_TAB
+ AS2 (st,%p0+,%A1) CR_TAB
+ AS2 (st,%p0,%B1) CR_TAB
+ AS2 (sbiw,%r0,1));
+ else
return *l=2, (AS2 (st,%0,%B1) CR_TAB
AS2 (st,%0,%A1));
+ }
else if (GET_CODE (base) == POST_INC) /* (R++) */
{
- if (mem_volatile_p)
+ if (mem_volatile_p && !AVR_XMEGA)
{
if (REGNO (XEXP (base, 0)) == REG_X)
{
@@ -4874,6 +5082,16 @@ avr_asm_declare_function_name (FILE *fil
}
}
+ else if (cfun->machine->is_nmi)
+ {
+ if (strncmp (name, "__vector", strlen ("__vector")) != 0)
+ {
+ warning_at (DECL_SOURCE_LOCATION (decl), 0,
+ "%qs appears to be a misspelled nmi handler",
+ name);
+ }
+ }
+
ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
ASM_OUTPUT_LABEL (file, name);
}
@@ -5174,7 +5392,8 @@ avr_file_start (void)
/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
fputs ("__SREG__ = 0x3f\n"
"__SP_H__ = 0x3e\n"
- "__SP_L__ = 0x3d\n", asm_out_file);
+ "__SP_L__ = 0x3d\n"
+ "__CCP__ = 0x34\n", asm_out_file);
fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
@@ -6273,16 +6492,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
if (GET_CODE (operands[1]) == CONST_INT)
{
- if (INTVAL (operands[1]) < 0x40)
+ operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */
+ if (low_io_address_operand (operands[1], VOIDmode))
{
if (comp == EQ)
- output_asm_insn (AS2 (sbis,%m1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbis,%1-%4,%2), operands);
else
- output_asm_insn (AS2 (sbic,%m1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbic,%1-%4,%2), operands);
}
else
{
- output_asm_insn (AS2 (in,__tmp_reg__,%m1-0x20), operands);
+ output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands);
if (comp == EQ)
output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
else
diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
--- gcc/config/avr/avr-c.c 2009-12-24 14:32:38.000000000 -0600
+++ gcc/config/avr/avr-c.c 2011-01-19 12:51:39.000000000 -0600
@@ -81,5 +81,18 @@ avr_cpu_cpp_builtins (struct cpp_reader
if (TARGET_NO_INTERRUPTS)
cpp_define (pfile, "__NO_INTERRUPTS__");
+
+ if (avr_current_arch->xmega)
+ {
+ cpp_define (pfile, "__AVR_XMEGA__");
+ cpp_define (pfile, "__AVR_HAVE_SPMX__");
+ }
+ if (avr_current_arch->have_rampx_y_d)
+ {
+ cpp_define (pfile, "__AVR_HAVE_RAMPX__");
+ cpp_define (pfile, "__AVR_HAVE_RAMPY__");
+ cpp_define (pfile, "__AVR_HAVE_RAMPD__");
+ }
+
}
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2009-07-17 13:49:03.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-01-19 12:51:39.000000000 -0600
@@ -36,7 +36,14 @@ const struct base_arch_s avr_arch_types[
{ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" }
+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
};
/* List of all known AVR MCU types - if updated, it has to be kept
@@ -189,6 +196,39 @@ const struct mcu_type_s avr_mcu_types[]
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
+ /* Enhanced, == 256K. */
+ /* Xmega, <= 8K FLASH. */
+ /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
+ { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
+ { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
+ { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
+ { "atxmega16x1", ARCH_AVRXMEGA2, "__AVR_ATxmega16X1__", 0, 0x2000, "x16x1" },
+ { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
+ { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
+ { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
+ /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */
+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
+ { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
+ { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
+ { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
+ /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
+ { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
+ { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" },
+ { "atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0x2000, "x64a1u" },
+ /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
+ { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
+ { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
+ { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
+ { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
+ { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
+ { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
+ { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
+ { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
+ /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
+ { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
+ { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
+ { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2010-01-11 17:12:14.000000000 -0600
+++ gcc/config/avr/avr.h 2011-01-19 12:51:39.000000000 -0600
@@ -45,11 +45,11 @@ struct base_arch_s {
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
- /* Reserved for xmega architecture. */
- int reserved;
+ /* Core is in Xmega family. */
+ int xmega;
- /* Reserved for xmega architecture. */
- int reserved2;
+ /* Core have RAMPX, RAMPY and RAMPD registers. */
+ int have_rampx_y_d;
/* Default start of data section address for architecture. */
int default_data_section_start;
@@ -75,7 +75,14 @@ enum avr_arch
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
- ARCH_AVR6
+ ARCH_AVR6,
+ ARCH_AVRXMEGA1,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA3,
+ ARCH_AVRXMEGA4,
+ ARCH_AVRXMEGA5,
+ ARCH_AVRXMEGA6,
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {
@@ -118,10 +125,18 @@ extern GTY(()) section *progmem_section;
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
#define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
+#define AVR_XMEGA (avr_current_arch->xmega)
+#define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d)
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
+#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
+#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
+#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
+#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B)
+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
#define OVERRIDE_OPTIONS avr_override_options ()
@@ -842,6 +857,10 @@ struct GTY(()) machine_function
as specified by the "signal" attribute. */
int is_signal;
+ /* 'true' - if current function is a signal function
+ as specified by the "nmi" attribute. */
+ int is_nmi;
+
/* 'true' - if current function is a 'task' function
as specified by the "OS_task" attribute. */
int is_OS_task;
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/avr.md 2011-01-19 12:51:39.000000000 -0600
@@ -49,9 +49,6 @@
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
- (SREG_ADDR 0x5F)
- (RAMPZ_ADDR 0x5B)
-
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
@@ -2962,7 +2959,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
- return AS2 (cbi,%m0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (cbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
@@ -2974,7 +2972,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
- return AS2 (sbi,%m0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (sbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
--- gcc/config/avr/libgcc.S 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/libgcc.S 2011-01-19 12:51:39.000000000 -0600
@@ -637,11 +637,19 @@ __prologue_saves__:
in r29,__SP_H__
sub r28,r26
sbc r29,r27
+
+/* Restore stack pointer. */
+#if defined (__AVR_XMEGA__)
+ out __SP_L__,r28
+ out __SP_H__,r29
+#else
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#endif
+
#if defined (__AVR_HAVE_EIJMP_EICALL__)
eijmp
#else
@@ -679,11 +687,18 @@ __epilogue_restores__:
ldd r27,Y+1
add r28,r30
adc r29,__zero_reg__
+
+/* Restore stack pointer. */
+#if defined(__AVR_XMEGA__)
+ out __SP_L__,r28
+ out __SP_H__,r29
+#else
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#endif
mov_l r28, r26
mov_h r29, r27
ret
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2009-12-24 13:53:57.000000000 -0600
+++ gcc/config/avr/predicates.md 2011-01-19 12:51:39.000000000 -0600
@@ -45,17 +45,23 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return true if OP is a valid address of I/O space.
(define_predicate "io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))
;; Return 1 if OP is the zero constant for MODE.
(define_predicate "const0_operand"
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/t-avr 2011-01-19 12:51:39.000000000 -0600
@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -223,7 +223,26 @@ MULTILIB_MATCHES = \
mmcu?avr51=mmcu?m3000s \
mmcu?avr51=mmcu?m3001b \
mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
+ mmcu?avr6=mmcu?atmega2561 \
+ mmcu?avrxmega2=mmcu?atxmega16a4 \
+ mmcu?avrxmega2=mmcu?atxmega16d4 \
+ mmcu?avrxmega2=mmcu?atxmega16x1 \
+ mmcu?avrxmega2=mmcu?atxmega32d4 \
+ mmcu?avrxmega2=mmcu?atxmega32a4 \
+ mmcu?avrxmega2=mmcu?atxmega32x1 \
+ mmcu?avrxmega4=mmcu?atxmega64a3 \
+ mmcu?avrxmega4=mmcu?atxmega64d3 \
+ mmcu?avrxmega5=mmcu?atxmega64a1 \
+ mmcu?avrxmega5=mmcu?atxmega64a1u \
+ mmcu?avrxmega6=mmcu?atxmega128a3 \
+ mmcu?avrxmega6=mmcu?atxmega128d3 \
+ mmcu?avrxmega6=mmcu?atxmega192a3 \
+ mmcu?avrxmega6=mmcu?atxmega192d3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3b \
+ mmcu?avrxmega6=mmcu?atxmega256d3 \
+ mmcu?avrxmega7=mmcu?atxmega128a1 \
+ mmcu?avrxmega7=mmcu?atxmega128a1u
MULTILIB_EXCEPTIONS =

2132
devel/avr-gcc/files/patch-302-gcc-4.5.1-avrtiny10 Normal file
View file

File diff suppressed because it is too large Load diff

52
devel/avr-gcc/files/patch-303-gcc-4.5.1-osmain Normal file
View file

@ -0,0 +1,52 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-19 13:45:00.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 13:45:47.000000000 -0600
@@ -784,7 +784,8 @@ expand_prologue (void)
}
else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
|| (!AVR_XMEGA && cfun->machine->is_signal)
- || (!AVR_XMEGA && cfun->machine->is_OS_main))
+ || (!AVR_XMEGA && cfun->machine->is_OS_main)
+ || (AVR_XMEGA && cfun->machine->is_nmi))
{
insn =
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
@@ -963,7 +964,8 @@ expand_epilogue (void)
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
- || (!AVR_XMEGA && cfun->machine->is_signal))
+ || (!AVR_XMEGA && cfun->machine->is_signal)
+ || (AVR_XMEGA && cfun->machine->is_nmi))
{
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
diff -Naurp gcc/function.c gcc/function.c
--- gcc/function.c 2010-02-26 09:58:57.000000000 -0600
+++ gcc/function.c 2011-01-19 13:45:48.000000000 -0600
@@ -4980,6 +4980,14 @@ contains (const_rtx insn, htab_t hash)
}
int
+prologue_contains (const_rtx insn)
+{
+ if (contains (insn, prologue_insn_hash))
+ return 1;
+ return 0;
+}
+
+int
prologue_epilogue_contains (const_rtx insn)
{
if (contains (insn, prologue_insn_hash))
diff -Naurp gcc/rtl.h gcc/rtl.h
--- gcc/rtl.h 2010-03-16 05:50:42.000000000 -0500
+++ gcc/rtl.h 2011-01-19 13:45:48.000000000 -0600
@@ -2296,6 +2296,7 @@ extern void print_inline_rtx (FILE *, co
/* In function.c */
extern void reposition_prologue_and_epilogue_notes (void);
+extern int prologue_contains (const_rtx);
extern int prologue_epilogue_contains (const_rtx);
extern int sibcall_epilogue_contains (const_rtx);
extern void mark_temp_addr_taken (rtx);

638
devel/avr-gcc/files/patch-builtins → devel/avr-gcc/files/patch-304-gcc-4.5.1-builtins-v6
View file

@ -1,305 +1,6 @@
--- ./gcc/config/avr/predicates.md.orig 2007-08-02 12:49:31.000000000 +0200
+++ ./gcc/config/avr/predicates.md 2010-03-05 15:25:53.000000000 +0100
@@ -27,6 +27,11 @@
(and (match_code "reg")
(match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
+;; Registers from r16 to 24.
+(define_predicate "a_register_operand"
+ (and (match_code "reg")
+ (match_test "REGNO (op) >= 16 && REGNO (op) <= 24")))
+
(define_predicate "even_register_operand"
(and (match_code "reg")
(and (match_test "REGNO (op) <= 31")
--- ./gcc/config/avr/avr.md.orig 2010-03-05 15:20:25.000000000 +0100
+++ ./gcc/config/avr/avr.md 2010-03-05 15:25:53.000000000 +0100
@@ -52,12 +52,26 @@
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
- (UNSPEC_SEI 2)
- (UNSPEC_CLI 3)
- (UNSPEC_SWAP 4)
-
+ (UNSPEC_SWAP 2)
+ (UNSPEC_FMUL 3)
+ (UNSPEC_FMULS 4)
+ (UNSPEC_FMULSU 5)
+
(UNSPECV_PROLOGUE_SAVES 0)
- (UNSPECV_EPILOGUE_RESTORES 1)])
+ (UNSPECV_EPILOGUE_RESTORES 1)
+ (UNSPECV_SEI 2)
+ (UNSPECV_CLI 3)
+ (UNSPECV_NOP 4)
+ (UNSPECV_NOP2 5)
+ (UNSPECV_SLEEP 6)
+ (UNSPECV_WDR 7)
+
+ (UNSPECV_DELAY_CYCLES 100)
+ (UNSPECV_DELAY_CYCLES_1 101)
+ (UNSPECV_DELAY_CYCLES_2 102)
+ (UNSPECV_DELAY_CYCLES_3 103)
+ (UNSPECV_DELAY_CYCLES_4 104)])
+
(include "predicates.md")
(include "constraints.md")
@@ -2541,13 +2555,6 @@
(const_int 1))
(const_int 3)])])
-(define_insn "nop"
- [(const_int 0)]
- ""
- "nop"
- [(set_attr "cc" "none")
- (set_attr "length" "1")])
-
; indirect jump
(define_insn "indirect_jump"
[(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
@@ -2925,7 +2932,7 @@
;; Enable Interrupts
(define_insn "enable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_SEI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
""
"sei"
[(set_attr "length" "1")
@@ -2934,7 +2941,7 @@
;; Disable Interrupts
(define_insn "disable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_CLI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
""
"cli"
[(set_attr "length" "1")
@@ -3034,3 +3041,219 @@
expand_epilogue ();
DONE;
}")
+
+;;delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay
+;; delay_cycles
+
+(define_expand "delay_cycles"
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "i")]
+ UNSPECV_DELAY_CYCLES)]
+ ""
+ "
+ rtx loop_reg;
+ unsigned int cycles = INTVAL (operands[0]);
+ if (IN_RANGE(cycles, 83886082, 0xFFFFFFFF))
+ {
+ unsigned int loop_count = ((cycles - 9) / 6) + 1;
+ unsigned int cycles_used = (((loop_count - 1) * 6) + 9);
+ emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 262145, 83886081))
+ {
+ unsigned int loop_count = ((cycles - 7) / 5) + 1;
+ if (loop_count > 0xFFFFFF)
+ loop_count = 0xFFFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 5) + 7);
+ emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 768, 262144))
+ {
+ unsigned int loop_count = ((cycles - 5) / 4) + 1;
+ if (loop_count > 0xFFFF)
+ loop_count = 0xFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 4) + 5);
+ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 6, 767))
+ {
+ unsigned int loop_count = (cycles/ 3);
+ if (loop_count > 255)
+ loop_count = 255;
+ unsigned int cycles_used = (loop_count * 3);
+ emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode)));
+ cycles -= cycles_used;
+ }
+ while (cycles >= 2)
+ {
+ emit_insn (gen_nop2 ());
+ cycles -= 2;
+ }
+ if (cycles == 1)
+ {
+ emit_insn (gen_nop ());
+ cycles--;
+ }
+ DONE;
+ ")
+
+(define_insn "delay_cycles_1"
+[(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_1)
+ (match_operand:QI 0 "immediate_operand" "")
+ (clobber (match_scratch:QI 1 "=&d"))]
+ ""
+ " ldi %1,lo8(%0)
+ 1:dec %1
+ brne 1b"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_2)
+ (match_operand:HI 0 "immediate_operand" "")
+ (clobber (match_scratch:HI 1 "=&w"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ 1:sbiw %A1,1
+ brne 1b"
+ [(set_attr "length" "4")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_3"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_3)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ brne 1b"
+ [(set_attr "length" "7")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_4"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_4)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ ldi %D1,hhi8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ sbci %D1,0
+ brne 1b"
+ [(set_attr "length" "9")
+ (set_attr "cc" "clobber")])
+
+;; CPU instructions
+
+;; NOP
+(define_insn "nop"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP)]
+ ""
+ "nop"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; NOP2
+(define_insn "nop2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP2)]
+ ""
+ "rjmp ."
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; SEI, Enable Interrupts
+;(define_insn "sei"
+; [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
+; ""
+; "sei"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; CLI, Disable Interrupts
+;(define_insn "cli"
+; [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
+; ""
+; "cli"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; SLEEP
+(define_insn "sleep"
+ [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)]
+ ""
+ "sleep"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; WDR
+(define_insn "wdr"
+ [(unspec_volatile [(const_int 0)] UNSPECV_WDR)]
+ ""
+ "wdr"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; SWAP
+(define_insn "swap"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
+ UNSPEC_SWAP))]
+ ""
+ "swap %0"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; FMUL
+(define_insn "fmul"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMUL))]
+ "AVR_HAVE_MUL"
+ "fmul %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULS
+(define_insn "fmuls"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULS))]
+ "AVR_HAVE_MUL"
+ "fmuls %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULSU
+(define_insn "fmulsu"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULSU))]
+ "AVR_HAVE_MUL"
+ "fmulsu %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
--- ./gcc/config/avr/avr.c.orig 2010-03-05 15:24:52.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-05 15:25:53.000000000 +0100
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-19 13:48:07.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 13:49:37.000000000 -0600
@@ -30,6 +30,7 @@
#include "insn-config.h"
#include "conditions.h"
@ -318,31 +19,31 @@
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
@@ -87,6 +90,9 @@
static int avr_address_cost (rtx);
@@ -87,6 +90,8 @@ static bool avr_rtx_costs (rtx, int, int
static int avr_address_cost (rtx, bool);
static bool avr_return_in_memory (const_tree, const_tree);
static struct machine_function * avr_init_machine_status (void);
+static void avr_init_builtins (void);
+static rtx avr_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
+
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
@@ -340,6 +346,12 @@
#undef TARGET_STRICT_ARGUMENT_NAMING
#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
static rtx avr_builtin_setjmp_frame_value (void);
static bool avr_hard_regno_scratch_ok (unsigned int);
static unsigned int avr_case_values_threshold (void);
@@ -197,6 +202,13 @@ static const struct attribute_spec avr_a
#undef TARGET_SCALAR_MODE_SUPPORTED_P
#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
+#undef TARGET_INIT_BUILTINS
+#define TARGET_INIT_BUILTINS avr_init_builtins
+
+
+#undef TARGET_EXPAND_BUILTIN
+#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+
struct gcc_target targetm = TARGET_INITIALIZER;
void
@@ -6079,4 +6091,237 @@
return false;
+
/* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
static bool
avr_scalar_mode_supported_p (enum machine_mode mode)
@@ -7286,4 +7298,237 @@ unsigned int avr_case_values_threshold (
return (!AVR_HAVE_JMP_CALL || TARGET_CALL_PROLOGUES) ? 8 : 17;
}
+/* Codes for all the AVR builtins. */
@ -579,3 +280,306 @@
+}
+
#include "gt-avr.h"
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-01-19 13:45:00.000000000 -0600
+++ gcc/config/avr/avr.md 2011-01-19 13:49:37.000000000 -0600
@@ -51,14 +51,29 @@
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
- (UNSPEC_SEI 2)
- (UNSPEC_CLI 3)
+ (UNSPEC_SWAP 2)
+ (UNSPEC_FMUL 3)
+ (UNSPEC_FMULS 4)
+ (UNSPEC_FMULSU 5)
+
(UNSPECV_PROLOGUE_SAVES 0)
(UNSPECV_EPILOGUE_RESTORES 1)
(UNSPECV_WRITE_SP_IRQ_ON 2)
(UNSPECV_WRITE_SP_IRQ_OFF 3)
- (UNSPECV_GOTO_RECEIVER 4)])
+ (UNSPECV_GOTO_RECEIVER 4)
+ (UNSPECV_SEI 5)
+ (UNSPECV_CLI 6)
+ (UNSPECV_NOP 7)
+ (UNSPECV_NOP2 8)
+ (UNSPECV_SLEEP 9)
+ (UNSPECV_WDR 10)
+
+ (UNSPECV_DELAY_CYCLES 100)
+ (UNSPECV_DELAY_CYCLES_1 101)
+ (UNSPECV_DELAY_CYCLES_2 102)
+ (UNSPECV_DELAY_CYCLES_3 103)
+ (UNSPECV_DELAY_CYCLES_4 104)])
(include "predicates.md")
(include "constraints.md")
@@ -2813,13 +2828,6 @@
(const_int 1))
(const_int 3)])])
-(define_insn "nop"
- [(const_int 0)]
- ""
- "nop"
- [(set_attr "cc" "none")
- (set_attr "length" "1")])
-
; indirect jump
(define_expand "indirect_jump"
@@ -3221,7 +3229,7 @@
;; Enable Interrupts
(define_insn "enable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_SEI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
""
"sei"
[(set_attr "length" "1")
@@ -3230,7 +3238,7 @@
;; Disable Interrupts
(define_insn "disable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_CLI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
""
"cli"
[(set_attr "length" "1")
@@ -3330,3 +3338,219 @@
expand_epilogue ();
DONE;
}")
+
+;;delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay
+;; delay_cycles
+
+(define_expand "delay_cycles"
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "i")]
+ UNSPECV_DELAY_CYCLES)]
+ ""
+ "
+ rtx loop_reg;
+ unsigned int cycles = INTVAL (operands[0]);
+ if (IN_RANGE(cycles, 83886082, 0xFFFFFFFF))
+ {
+ unsigned int loop_count = ((cycles - 9) / 6) + 1;
+ unsigned int cycles_used = (((loop_count - 1) * 6) + 9);
+ emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 262145, 83886081))
+ {
+ unsigned int loop_count = ((cycles - 7) / 5) + 1;
+ if (loop_count > 0xFFFFFF)
+ loop_count = 0xFFFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 5) + 7);
+ emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 768, 262144))
+ {
+ unsigned int loop_count = ((cycles - 5) / 4) + 1;
+ if (loop_count > 0xFFFF)
+ loop_count = 0xFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 4) + 5);
+ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 6, 767))
+ {
+ unsigned int loop_count = (cycles/ 3);
+ if (loop_count > 255)
+ loop_count = 255;
+ unsigned int cycles_used = (loop_count * 3);
+ emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode)));
+ cycles -= cycles_used;
+ }
+ while (cycles >= 2)
+ {
+ emit_insn (gen_nop2 ());
+ cycles -= 2;
+ }
+ if (cycles == 1)
+ {
+ emit_insn (gen_nop ());
+ cycles--;
+ }
+ DONE;
+ ")
+
+(define_insn "delay_cycles_1"
+[(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_1)
+ (match_operand:QI 0 "immediate_operand" "")
+ (clobber (match_scratch:QI 1 "=&d"))]
+ ""
+ " ldi %1,lo8(%0)
+ 1:dec %1
+ brne 1b"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_2)
+ (match_operand:HI 0 "immediate_operand" "")
+ (clobber (match_scratch:HI 1 "=&w"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ 1:sbiw %A1,1
+ brne 1b"
+ [(set_attr "length" "4")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_3"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_3)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ brne 1b"
+ [(set_attr "length" "7")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_4"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_4)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ ldi %D1,hhi8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ sbci %D1,0
+ brne 1b"
+ [(set_attr "length" "9")
+ (set_attr "cc" "clobber")])
+
+;; CPU instructions
+
+;; NOP
+(define_insn "nop"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP)]
+ ""
+ "nop"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; NOP2
+(define_insn "nop2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP2)]
+ ""
+ "rjmp ."
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; SEI, Enable Interrupts
+;(define_insn "sei"
+; [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
+; ""
+; "sei"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; CLI, Disable Interrupts
+;(define_insn "cli"
+; [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
+; ""
+; "cli"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; SLEEP
+(define_insn "sleep"
+ [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)]
+ ""
+ "sleep"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; WDR
+(define_insn "wdr"
+ [(unspec_volatile [(const_int 0)] UNSPECV_WDR)]
+ ""
+ "wdr"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; SWAP
+(define_insn "swap"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
+ UNSPEC_SWAP))]
+ ""
+ "swap %0"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; FMUL
+(define_insn "fmul"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMUL))]
+ "AVR_HAVE_MUL"
+ "fmul %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULS
+(define_insn "fmuls"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULS))]
+ "AVR_HAVE_MUL"
+ "fmuls %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULSU
+(define_insn "fmulsu"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULSU))]
+ "AVR_HAVE_MUL"
+ "fmulsu %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2011-01-19 13:03:59.000000000 -0600
+++ gcc/config/avr/predicates.md 2011-01-19 13:49:37.000000000 -0600
@@ -27,6 +27,11 @@
(and (match_code "reg")
(match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
+;; Registers from r16 to 24.
+(define_predicate "a_register_operand"
+ (and (match_code "reg")
+ (match_test "REGNO (op) >= 16 && REGNO (op) <= 24")))
+
(define_predicate "even_register_operand"
(and (match_code "reg")
(and (match_test "REGNO (op) <= 31")

49
devel/avr-gcc/files/patch-305-gcc-4.5.1-avrtiny10-non-fixedpoint Normal file
View file

@ -0,0 +1,49 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-02-07 16:17:20.000000000 -0600
+++ gcc/config/avr/avr.c 2011-02-07 16:12:53.000000000 -0600
@@ -202,6 +202,9 @@ static const struct attribute_spec avr_a
#undef TARGET_SCALAR_MODE_SUPPORTED_P
#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
+#undef TARGET_FIXED_POINT_SUPPORTED_P
+#define TARGET_FIXED_POINT_SUPPORTED_P avr_fixed_point_supported_p
+
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS avr_init_builtins
@@ -219,6 +222,17 @@ static const struct attribute_spec avr_a
return default_scalar_mode_supported_p (mode);
}
+ /* Implement TARGET_FIXED_POINT_SUPPORTED_P. */
+ static bool
+ avr_fixed_point_supported_p ()
+ {
+ if (AVR_TINY)
+ return false;
+
+ return default_fixed_point_supported_p ();
+ }
+
+
struct gcc_target targetm = TARGET_INITIALIZER;
void
diff -Naurp gcc/config/fixed-bit.c gcc/config/fixed-bit.c
--- gcc/config/fixed-bit.c 2009-04-09 10:00:19.000000000 -0500
+++ gcc/config/fixed-bit.c 2011-02-07 16:12:53.000000000 -0600
@@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTI
Floating-point: SF, DF
Ex: If we define FROM_QQ and TO_SI, the conversion from QQ to SI is
generated. */
-
+#if !defined (__AVR_TINY__)
#include "tconfig.h"
#include "tsystem.h"
#include "coretypes.h"
@@ -1213,4 +1213,4 @@ SATFRACT (FROM_FLOAT_C_TYPE a)
return c;
}
#endif /* defined(SATFRACT) && FROM_TYPE == 3 && TO_TYPE == 4 */
-
+#endif /* __AVR_TINY__ */

49
devel/avr-gcc/files/patch-306-gcc-4.5.1-option-list-devices Normal file
View file

@ -0,0 +1,49 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-02-11 14:56:08.000000000 -0600
+++ gcc/config/avr/avr.c 2011-02-11 14:54:05.000000000 -0600
@@ -211,6 +211,8 @@ static const struct attribute_spec avr_a
#undef TARGET_EXPAND_BUILTIN
#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+#undef TARGET_HELP
+#define TARGET_HELP avr_target_help
/* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
static bool
@@ -232,7 +234,24 @@ static const struct attribute_spec avr_a
return default_fixed_point_supported_p ();
}
-
+/* Implement TARGET_HELP. */
+void
+avr_target_help (void)
+{
+ if (avr_list_supported_parts)
+ {
+ const struct mcu_type_s *list_part;
+ fprintf (stdout, "List of parts supported by avr-gcc:\n");
+ for (list_part = &avr_mcu_types[0]; (list_part + 1)->name; list_part++)
+ {
+ if (!list_part->macro)
+ list_part++;
+ fprintf (stdout, "%-20s%s\n", list_part->name, list_part->macro);
+ }
+ fprintf (stdout, "\n");
+ }
+}
+
struct gcc_target targetm = TARGET_INITIALIZER;
void
diff -Naurp gcc/config/avr/avr.opt gcc/config/avr/avr.opt
--- gcc/config/avr/avr.opt 2009-10-08 13:28:48.000000000 -0500
+++ gcc/config/avr/avr.opt 2011-02-11 14:53:20.000000000 -0600
@@ -58,3 +58,7 @@ Relax branches
mpmem-wrap-around
Target Report
Make the linker relaxation machine assume that a program counter wrap-around occures.
+
+mlist-devices
+Target RejectNegative Var(avr_list_supported_parts)
+Print the list of parts supported while printing --target-help

328
devel/avr-gcc/files/patch-400-gcc-4.5.1-new-devices Normal file
View file

@ -0,0 +1,328 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-02-07 14:19:27.000000000 -0600
+++ gcc/config/avr/avr-devices.c 2011-02-07 14:21:41.000000000 -0600
@@ -75,15 +75,23 @@ const struct mcu_type_s avr_mcu_types[]
{ "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" },
{ "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0x0060, "tn13a" },
{ "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" },
+ { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" },
{ "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" },
+ { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" },
+ { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 0, 0x0060, "tn4313" },
{ "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" },
+ { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" },
{ "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" },
+ { "attiny84a", ARCH_AVR25, "__AVR_ATtiny84A__", 0, 0x0060, "tn84a" },
{ "attiny25", ARCH_AVR25, "__AVR_ATtiny25__", 1, 0x0060, "tn25" },
{ "attiny45", ARCH_AVR25, "__AVR_ATtiny45__", 0, 0x0060, "tn45" },
{ "attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0x0060, "tn85" },
{ "attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0x0060, "tn261" },
+ { "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__", 1, 0x0060, "tn261a" },
{ "attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0x0060, "tn461" },
+ { "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__", 0, 0x0060, "tn461a" },
{ "attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0x0060, "tn861" },
+ { "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__", 0, 0x0060, "tn861a" },
{ "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__", 0, 0x0060, "tn43u" },
{ "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" },
{ "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
@@ -105,21 +113,19 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
{ "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
{ "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
- { "attiny327", ARCH_AVR35, "__AVR_ATtiny327__", 0, 0x0100, "tn327" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
+ { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
+ { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
{ "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0x0100, "m88p" },
+ { "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__", 0, 0x0100, "m88pa" },
{ "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__", 0, 0x0060, "m8515" },
{ "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__", 0, 0x0060, "m8535" },
- { "atmega8c1", ARCH_AVR4, "__AVR_ATmega8C1__", 0, 0x0100, "m8c1" },
- { "atmega8m1", ARCH_AVR4, "__AVR_ATmega8M1__", 0, 0x0100, "m8m1" },
{ "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__", 0, 0x0100, "m8hva" },
- { "atmega4hvd", ARCH_AVR4, "__AVR_ATmega4HVD__", 0, 0x0100, "m4hvd" },
- { "atmega8hvd", ARCH_AVR4, "__AVR_ATmega8HVD__", 0, 0x0100, "m8hvd" },
{ "at90pwm1", ARCH_AVR4, "__AVR_AT90PWM1__", 0, 0x0100, "90pwm1" },
{ "at90pwm2", ARCH_AVR4, "__AVR_AT90PWM2__", 0, 0x0100, "90pwm2" },
{ "at90pwm2b", ARCH_AVR4, "__AVR_AT90PWM2B__", 0, 0x0100, "90pwm2b" },
@@ -128,41 +134,78 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
/* Enhanced, > 8K, <= 64K. */
{ "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
+ { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
{ "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
+ { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
{ "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
{ "atmega162", ARCH_AVR5, "__AVR_ATmega162__", 0, 0x0100, "m162" },
{ "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
+ { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0060, "m164a" },
{ "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
{ "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
+ { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
{ "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
{ "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
+ { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
{ "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
{ "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
+ { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
{ "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
+ { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
+ { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
+ { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
+ { "atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 1, 0x0100, "m16hvbrevb" },
+ { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
+ { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
{ "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
{ "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
+ { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0060, "m324a" },
{ "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
+ { "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__", 0, 0x0100, "m324pa" },
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
+ { "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
+ { "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
+ { "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
+ { "atmega329a", ARCH_AVR5, "__AVR_ATmega329A__", 0, 0x0100, "m329a" },
{ "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__", 0, 0x0100, "m329p" },
+ { "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__", 0, 0x0100, "m329pa" },
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
+ { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
+ { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
{ "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
{ "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
{ "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
{ "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
+ { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
{ "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__", 0, 0x0100, "m644p" },
+ { "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__", 0, 0x0100, "m644pa" },
+ { "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__", 0, 0x0100, "m645a" },
+ { "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__", 0, 0x0100, "m645p" },
{ "atmega645", ARCH_AVR5, "__AVR_ATmega645__", 0, 0x0100, "m645" },
{ "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__", 0, 0x0100, "m6450" },
+ { "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__", 0, 0x0100, "m6450a" },
+ { "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__", 0, 0x0100, "m6450p" },
{ "atmega649", ARCH_AVR5, "__AVR_ATmega649__", 0, 0x0100, "m649" },
+ { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
+ { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
{ "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
- { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
- { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m23hvb" },
+ { "atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__", 0, 0x0100, "m6490a" },
+ { "atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__", 0, 0x0100, "m6490p" },
+ { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
+ { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
+ { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
+ { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
+ { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
{ "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
{ "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
{ "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
@@ -180,6 +223,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__", 0, 0x0100, "usb646" },
{ "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__", 0, 0x0100, "usb647" },
{ "at94k", ARCH_AVR5, "__AVR_AT94K__", 0, 0x0060, "at94k" },
+ { "m3000", ARCH_AVR5, "__AVR_M3000__", 0, 0x1000, "m3000" },
/* Enhanced, == 128K. */
{ "avr51", ARCH_AVR51, NULL, 0, 0x0100, "m128" },
{ "atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0x0100, "m128" },
@@ -190,9 +234,6 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0x0100, "can128" },
{ "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0x0100, "usb1286" },
{ "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0x0100, "usb1286" },
- { "m3000f", ARCH_AVR51, "__AVR_M3000F__", 0, 0x1000, "m3000f" },
- { "m3000s", ARCH_AVR51, "__AVR_M3000S__", 0, 0x1000, "m3000f" },
- { "m3001b", ARCH_AVR51, "__AVR_M3001B__", 0, 0x1000, "m3000f" },
/* 3-Byte PC. */
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
@@ -220,11 +261,13 @@ const struct mcu_type_s avr_mcu_types[]
/* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
{ "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
{ "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
+ { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
{ "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
{ "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
{ "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
{ "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
{ "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
+ { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
{ "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
/* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
{ "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-02-07 14:19:27.000000000 -0600
+++ gcc/config/avr/t-avr 2011-02-07 14:23:58.000000000 -0600
@@ -116,16 +116,28 @@ MULTILIB_MATCHES = \
mmcu?avr25=mmcu?attiny13 \
mmcu?avr25=mmcu?attiny13a \
mmcu?avr25=mmcu?attiny2313 \
+ mmcu?avr25=mmcu?attiny2313a \
mmcu?avr25=mmcu?attiny24 \
+ mmcu?avr25=mmcu?attiny24a \
mmcu?avr25=mmcu?attiny44 \
+ mmcu?avr25=mmcu?attiny44a \
+ mmcu?avr25=mmcu?attiny45 \
mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny84a \
mmcu?avr25=mmcu?attiny25 \
mmcu?avr25=mmcu?attiny45 \
mmcu?avr25=mmcu?attiny85 \
mmcu?avr25=mmcu?attiny261 \
+ mmcu?avr25=mmcu?attiny261a \
+ mmcu?avr25=mmcu?attiny4313 \
mmcu?avr25=mmcu?attiny461 \
+ mmcu?avr25=mmcu?attiny461a \
mmcu?avr25=mmcu?attiny861 \
mmcu?avr25=mmcu?attiny43u \
+ mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny85 \
+ mmcu?avr25=mmcu?attiny861 \
+ mmcu?avr25=mmcu?attiny861a \
mmcu?avr25=mmcu?attiny87 \
mmcu?avr25=mmcu?attiny48 \
mmcu?avr25=mmcu?attiny88 \
@@ -140,65 +152,90 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?atmega16u2 \
mmcu?avr35=mmcu?atmega32u2 \
mmcu?avr35=mmcu?attiny167 \
- mmcu?avr35=mmcu?attiny327 \
mmcu?avr4=mmcu?atmega48 \
+ mmcu?avr4=mmcu?atmega48a \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
mmcu?avr4=mmcu?atmega8515 \
mmcu?avr4=mmcu?atmega8535 \
mmcu?avr4=mmcu?atmega88 \
+ mmcu?avr4=mmcu?atmega88a \
mmcu?avr4=mmcu?atmega88p \
+ mmcu?avr4=mmcu?atmega88pa \
mmcu?avr4=mmcu?atmega8hva \
- mmcu?avr4=mmcu?atmega4hvd \
- mmcu?avr4=mmcu?atmega8hvd \
- mmcu?avr4=mmcu?atmega8c1 \
- mmcu?avr4=mmcu?atmega8m1 \
mmcu?avr4=mmcu?at90pwm1 \
mmcu?avr4=mmcu?at90pwm2 \
mmcu?avr4=mmcu?at90pwm2b \
mmcu?avr4=mmcu?at90pwm3 \
mmcu?avr4=mmcu?at90pwm3b \
mmcu?avr4=mmcu?at90pwm81 \
+ mmcu?avr5=mmcu?at90pwm161 \
mmcu?avr5=mmcu?atmega16 \
+ mmcu?avr5=mmcu?atmega16a \
mmcu?avr5=mmcu?atmega161 \
mmcu?avr5=mmcu?atmega162 \
mmcu?avr5=mmcu?atmega163 \
+ mmcu?avr5=mmcu?atmega164a \
mmcu?avr5=mmcu?atmega164p \
mmcu?avr5=mmcu?atmega165 \
+ mmcu?avr5=mmcu?atmega165a \
mmcu?avr5=mmcu?atmega165p \
mmcu?avr5=mmcu?atmega168 \
+ mmcu?avr5=mmcu?atmega168a \
mmcu?avr5=mmcu?atmega168p \
mmcu?avr5=mmcu?atmega169 \
+ mmcu?avr5=mmcu?atmega169a \
mmcu?avr5=mmcu?atmega169p \
+ mmcu?avr5=mmcu?atmega169pa \
mmcu?avr5=mmcu?atmega32 \
mmcu?avr5=mmcu?atmega323 \
+ mmcu?avr5=mmcu?atmega324a \
mmcu?avr5=mmcu?atmega324p \
+ mmcu?avr5=mmcu?atmega324pa \
mmcu?avr5=mmcu?atmega325 \
+ mmcu?avr5=mmcu?atmega325a \
mmcu?avr5=mmcu?atmega325p \
mmcu?avr5=mmcu?atmega3250 \
+ mmcu?avr5=mmcu?atmega3250a \
mmcu?avr5=mmcu?atmega3250p \
+ mmcu?avr5=mmcu?atmega328 \
mmcu?avr5=mmcu?atmega328p \
mmcu?avr5=mmcu?atmega329 \
+ mmcu?avr5=mmcu?atmega329a \
mmcu?avr5=mmcu?atmega329p \
+ mmcu?avr5=mmcu?atmega329pa \
mmcu?avr5=mmcu?atmega3290 \
+ mmcu?avr5=mmcu?atmega3290a \
mmcu?avr5=mmcu?atmega3290p \
mmcu?avr5=mmcu?atmega406 \
mmcu?avr5=mmcu?atmega64 \
mmcu?avr5=mmcu?atmega640 \
mmcu?avr5=mmcu?atmega644 \
+ mmcu?avr5=mmcu?atmega644a \
mmcu?avr5=mmcu?atmega644p \
+ mmcu?avr5=mmcu?atmega644pa \
mmcu?avr5=mmcu?atmega645 \
+ mmcu?avr5=mmcu?atmega645a \
+ mmcu?avr5=mmcu?atmega645p \
mmcu?avr5=mmcu?atmega6450 \
+ mmcu?avr5=mmcu?atmega6450a \
+ mmcu?avr5=mmcu?atmega6450p \
mmcu?avr5=mmcu?atmega649 \
+ mmcu?avr5=mmcu?atmega649a \
+ mmcu?avr5=mmcu?atmega649p \
mmcu?avr5=mmcu?atmega6490 \
+ mmcu?avr5=mmcu?atmega6490a \
+ mmcu?avr5=mmcu?atmega6490p \
mmcu?avr5=mmcu?atmega16hva \
+ mmcu?avr5=mmcu?atmega16hva2 \
mmcu?avr5=mmcu?atmega16hvb \
+ mmcu?avr5=mmcu?atmega16hvbrevb \
mmcu?avr5=mmcu?atmega32hvb \
+ mmcu?avr5=mmcu?atmega32hvbrevb \
mmcu?avr5=mmcu?at90can32 \
mmcu?avr5=mmcu?at90can64 \
mmcu?avr5=mmcu?at90pwm216 \
mmcu?avr5=mmcu?at90pwm316 \
- mmcu?avr5=mmcu?atmega16c1 \
mmcu?avr5=mmcu?atmega32c1 \
mmcu?avr5=mmcu?atmega64c1 \
mmcu?avr5=mmcu?atmega16m1 \
@@ -207,6 +244,7 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega16u4 \
mmcu?avr5=mmcu?atmega32u4 \
mmcu?avr5=mmcu?atmega32u6 \
+ mmcu?avr5=mmcu?atmega64hve \
mmcu?avr5=mmcu?at90scr100 \
mmcu?avr5=mmcu?at90usb646 \
mmcu?avr5=mmcu?at90usb647 \
@@ -219,9 +257,7 @@ MULTILIB_MATCHES = \
mmcu?avr51=mmcu?at90can128 \
mmcu?avr51=mmcu?at90usb1286 \
mmcu?avr51=mmcu?at90usb1287 \
- mmcu?avr51=mmcu?m3000f \
- mmcu?avr51=mmcu?m3000s \
- mmcu?avr51=mmcu?m3001b \
+ mmcu?avr51=mmcu?m3000 \
mmcu?avr6=mmcu?atmega2560 \
mmcu?avr6=mmcu?atmega2561 \
mmcu?avrxmega2=mmcu?atxmega16a4 \
@@ -235,11 +271,13 @@ MULTILIB_MATCHES = \
mmcu?avrxmega5=mmcu?atxmega64a1 \
mmcu?avrxmega5=mmcu?atxmega64a1u \
mmcu?avrxmega6=mmcu?atxmega128a3 \
+ mmcu?avrxmega6=mmcu?atxmega128b1 \
mmcu?avrxmega6=mmcu?atxmega128d3 \
mmcu?avrxmega6=mmcu?atxmega192a3 \
mmcu?avrxmega6=mmcu?atxmega192d3 \
mmcu?avrxmega6=mmcu?atxmega256a3 \
mmcu?avrxmega6=mmcu?atxmega256a3b \
+ mmcu?avrxmega6=mmcu?atxmega256a3bu \
mmcu?avrxmega6=mmcu?atxmega256d3 \
mmcu?avrxmega7=mmcu?atxmega128a1 \
mmcu?avrxmega7=mmcu?atxmega128a1u \

46
devel/avr-gcc/files/patch-401-gcc-4.5.1-atmega32_5_50_90_pa Normal file
View file

@ -0,0 +1,46 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-02-17 12:04:53.000000000 -0600
+++ gcc/config/avr/avr-devices.c 2011-02-16 15:14:00.000000000 -0600
@@ -166,9 +166,11 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
{ "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
+ { "atmega325pa", ARCH_AVR5, "__AVR_ATmega325PA__", 0, 0x0100, "m325pa" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
{ "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
+ { "atmega3250pa", ARCH_AVR5, "__AVR_ATmega3250PA__", 0, 0x0100, "m3250pa" },
{ "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
@@ -178,6 +180,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
{ "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
+ { "atmega3290pa", ARCH_AVR5, "__AVR_ATmega3290PA__", 0, 0x0100, "m3290pa" },
{ "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
{ "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
{ "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-02-17 12:04:53.000000000 -0600
+++ gcc/config/avr/t-avr 2011-02-16 15:15:18.000000000 -0600
@@ -195,9 +195,11 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega325 \
mmcu?avr5=mmcu?atmega325a \
mmcu?avr5=mmcu?atmega325p \
+ mmcu?avr5=mmcu?atmega325pa \
mmcu?avr5=mmcu?atmega3250 \
mmcu?avr5=mmcu?atmega3250a \
mmcu?avr5=mmcu?atmega3250p \
+ mmcu?avr5=mmcu?atmega3250pa \
mmcu?avr5=mmcu?atmega328 \
mmcu?avr5=mmcu?atmega328p \
mmcu?avr5=mmcu?atmega329 \
@@ -207,6 +209,7 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega3290 \
mmcu?avr5=mmcu?atmega3290a \
mmcu?avr5=mmcu?atmega3290p \
+ mmcu?avr5=mmcu?atmega3290pa \
mmcu?avr5=mmcu?atmega406 \
mmcu?avr5=mmcu?atmega64 \
mmcu?avr5=mmcu?atmega640 \

22
devel/avr-gcc/files/patch-402-gcc-4.5.1-attiny1634 Normal file
View file

@ -0,0 +1,22 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-05-13 17:35:31.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-05-13 17:43:10.000000000 -0500
@@ -113,6 +113,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
{ "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
{ "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
+ { "attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0x0100, "tn1634" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-05-13 17:35:31.000000000 -0500
+++ gcc/config/avr/t-avr 2011-05-13 17:37:41.000000000 -0500
@@ -152,6 +152,7 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?atmega16u2 \
mmcu?avr35=mmcu?atmega32u2 \
mmcu?avr35=mmcu?attiny167 \
+ mmcu?avr35=mmcu?attiny1634 \
mmcu?avr4=mmcu?atmega48 \
mmcu?avr4=mmcu?atmega48a \
mmcu?avr4=mmcu?atmega48p \

22
devel/avr-gcc/files/patch-403-gcc-4.5.1-atmega48pa Normal file
View file

@ -0,0 +1,22 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-06-20 12:23:54.000000000 +0530
+++ gcc/config/avr/avr-devices.c 2011-06-20 12:11:26.000000000 +0530
@@ -119,6 +119,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
{ "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
+ { "atmega48pa", ARCH_AVR4, "__AVR_ATmega48PA__", 0, 0x0100, "m48pa" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
{ "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-06-20 12:23:54.000000000 +0530
+++ gcc/config/avr/t-avr 2011-06-20 12:11:26.000000000 +0530
@@ -155,6 +155,7 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?attiny1634 \
mmcu?avr4=mmcu?atmega48 \
mmcu?avr4=mmcu?atmega48a \
+ mmcu?avr4=mmcu?atmega48pa \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
mmcu?avr4=mmcu?atmega8515 \

14
devel/avr-gcc/files/patch-500-gcc-4.5.1-bug13473 Normal file
View file

@ -0,0 +1,14 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr.c 2011-06-09 15:33:10.000000000 -0500
@@ -3350,8 +3350,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (out,%m0-%2,%A1));
}
if (AVR_XMEGA)
- return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
- AS2 (sts,%B0,%B1));
+ return *l = 4, (AS2 (sts,%m0,%A1) CR_TAB
+ AS2 (sts,%m0+1,%B1));
else
return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
AS2 (sts,%m0,%A1));

17
devel/avr-gcc/files/patch-501-gcc-4.5.1-bug13579 Normal file
View file

@ -0,0 +1,17 @@
--- gcc/ipa-pure-const.c 2010-04-02 14:54:46.000000000 -0500
+++ gcc/ipa-pure-const.c 2011-02-24 16:10:26.000000000 -0600
@@ -416,6 +416,14 @@ check_stmt (gimple_stmt_iterator *gsip,
print_gimple_stmt (dump_file, stmt, 0, 0);
}
+ if (gimple_has_volatile_ops (stmt))
+ {
+ local->pure_const_state = IPA_NEITHER;
+ if (dump_file)
+ fprintf (dump_file, " Volatile stmt is not const/pure\n");
+ }
+
+
/* Look for loads and stores. */
walk_stmt_load_store_ops (stmt, local, check_load, check_store);

58
devel/avr-gcc/files/patch-bug18145 → devel/avr-gcc/files/patch-502-gcc-4.5.1-bug-18145-v4
View file

@ -1,6 +1,7 @@
--- ./gcc/config/avr/avr.c.orig 2010-03-05 15:10:10.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-05 15:20:53.000000000 +0100
@@ -72,6 +72,12 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-06-09 15:41:06.000000000 -0500
+++ gcc/config/avr/avr.c 2011-06-09 15:46:03.000000000 -0500
@@ -81,6 +81,12 @@ static rtx avr_function_value (const_tre
static void avr_insert_attributes (tree, tree *);
static void avr_asm_init_sections (void);
static unsigned int avr_section_type_flags (tree, const char *, int);
@ -13,7 +14,7 @@
static void avr_reorg (void);
static void avr_asm_out_ctor (rtx, int);
@@ -4782,6 +4788,54 @@
@@ -6102,6 +6108,54 @@ avr_output_progmem_section_asm_op (const
fprintf (asm_out_file, "\t.p2align 1\n");
}
@ -68,7 +69,7 @@
/* Implement TARGET_ASM_INIT_SECTIONS. */
static void
@@ -4791,6 +4845,27 @@
@@ -6111,6 +6165,27 @@ avr_asm_init_sections (void)
avr_output_progmem_section_asm_op,
NULL);
readonly_data_section = data_section;
@ -96,9 +97,9 @@
}
static unsigned int
@@ -4829,12 +4904,6 @@
fputs ("__tmp_reg__ = 0\n"
@@ -6152,12 +6227,6 @@ avr_file_start (void)
AVR_TINY ? fputs ("__tmp_reg__ = 16\n"
"__zero_reg__ = 17\n", asm_out_file) : fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
-
- /* FIXME: output these only if there is anything in the .data / .bss
@ -109,7 +110,7 @@
}
/* Outputs to the stdio stream FILE some
@@ -4843,6 +4912,16 @@
@@ -6166,6 +6235,16 @@ avr_file_start (void)
static void
avr_file_end (void)
{
@ -126,9 +127,10 @@
}
/* Choose the order in which to allocate hard registers for
--- ./gcc/config/avr/avr.h.orig 2010-03-05 15:10:10.000000000 +0100
+++ ./gcc/config/avr/avr.h 2010-03-05 15:20:53.000000000 +0100
@@ -533,29 +533,21 @@
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr.h 2011-06-09 15:46:03.000000000 -0500
@@ -562,7 +562,7 @@ do { \
#define ASM_APP_OFF "/* #NOAPP */\n"
/* Switch into a generic section. */
@ -137,50 +139,40 @@
#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
@@ -570,21 +570,13 @@ do { \
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
-#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
-do { \
- fputs ("\t.comm ", (STREAM)); \
- assemble_name ((STREAM), (NAME)); \
- fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
-} while (0)
+#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
+ avr_asm_output_common (STREAM, NAME, SIZE, ROUNDED)
-#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
- asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
+#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
+ asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
-#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
-do { \
- fputs ("\t.lcomm ", (STREAM)); \
- assemble_name ((STREAM), (NAME)); \
- fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
-} while (0)
+#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
+ avr_asm_output_local (STREAM, NAME, SIZE, ROUNDED)
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
--- ./gcc/config/avr/avr-protos.h.orig 2008-06-15 23:32:29.000000000 +0200
+++ ./gcc/config/avr/avr-protos.h 2010-03-05 15:20:53.000000000 +0100
@@ -38,6 +38,8 @@
diff -Naurp gcc/config/avr/avr-protos.h gcc/config/avr/avr-protos.h
--- gcc/config/avr/avr-protos.h 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr-protos.h 2011-06-09 15:46:03.000000000 -0500
@@ -35,6 +35,9 @@ extern int avr_simple_epilogue (void);
extern void gas_output_limited_string (FILE *file, const char *str);
extern void gas_output_ascii (FILE *file, const char *str, size_t length);
extern int avr_hard_regno_rename_ok (unsigned int, unsigned int);
+extern void avr_asm_output_common (FILE *stream, const char *name, unsigned HOST_WIDE_INT size, unsigned HOST_WIDE_INT rounded);
+extern void avr_asm_output_local (FILE *stream, const char *name, unsigned HOST_WIDE_INT size, unsigned HOST_WIDE_INT rounded);
+
extern rtx avr_return_addr_rtx (int count, const_rtx tem);
#ifdef TREE_CODE
extern void asm_output_external (FILE *file, tree decl, char *name);
@@ -123,6 +125,7 @@
extern int compare_eq_p (rtx insn);
extern void out_shift_with_cnt (const char *template, rtx insn,
rtx operands[], int *len, int t_len);
+extern rtx avr_return_addr_rtx (int count, rtx tem);
extern int avr_io_address_p (rtx x, int size);
extern int avr_peep2_scratch_safe (rtx reg_rtx);
#endif /* RTX_CODE */

43
devel/avr-gcc/files/patch-503-gcc-4.5.1-avrtiny10-bug-12510 Normal file
View file

@ -0,0 +1,43 @@
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-06-09 15:53:13.000000000 -0500
+++ gcc/config/avr/avr.h 2011-06-09 15:55:45.000000000 -0500
@@ -136,7 +136,7 @@ extern GTY(()) section *progmem_section;
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
-#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_IO_OFFSET ((AVR_XMEGA || AVR_TINY) ? 0 : 0x20)
#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/predicates.md 2011-06-09 15:55:45.000000000 -0500
@@ -50,21 +50,24 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
(match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
(match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return true if OP is a valid address of I/O space.
(define_predicate "io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
(match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))

14
devel/avr-gcc/files/patch-504-gcc-4.5.1-bug12915 Normal file
View file

@ -0,0 +1,14 @@
diff -rupw gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-02-23 15:54:14.000000000 -0600
+++ gcc/config/avr/avr.md 2011-02-23 15:55:22.000000000 -0600
@@ -1082,8 +1082,8 @@
(set_attr "cc" "clobber")])
(define_expand "<any_extend:u>mulhisi3"
- [(set (reg:HI 18) (match_operand:SI 1 "register_operand" ""))
- (set (reg:HI 20) (match_operand:SI 2 "register_operand" ""))
+ [(set (reg:HI 18) (match_operand:HI 1 "register_operand" ""))
+ (set (reg:HI 20) (match_operand:HI 2 "register_operand" ""))
(set (reg:SI 22)
(mult:SI (any_extend:SI (reg:HI 18))
(any_extend:SI (reg:HI 20))))

12
devel/avr-gcc/files/patch-505-gcc-4.5.1-bug13932 Normal file
View file

@ -0,0 +1,12 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-06-09 15:23:57.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-06-09 16:01:44.000000000 -0500
@@ -244,7 +244,7 @@ const struct mcu_type_s avr_mcu_types[]
/* Enhanced, ==256K + 3-Byte PC +
{ MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
+ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
/* Enhanced, == 256K. */
/* Xmega, <= 8K FLASH. */

40
devel/avr-gcc/files/patch-506-gcc-4.5.1-bug13789 Normal file
View file

@ -0,0 +1,40 @@
diff -rup gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-04-27 12:24:24.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-04-27 17:19:33.000000000 -0500
@@ -37,14 +37,14 @@ const struct base_arch_s avr_arch_types[
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
{ 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=100", "avrtiny10" },
{ 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
{ 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
{ 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
{ 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
{ 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
{ 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
- { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=201", "avrtiny10" }
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
};
/* List of all known AVR MCU types - if updated, it has to be kept
diff -rup gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-04-27 12:24:06.000000000 -0500
+++ gcc/config/avr/avr.h 2011-04-27 17:49:01.000000000 -0500
@@ -79,14 +79,14 @@ enum avr_arch
ARCH_AVR5,
ARCH_AVR51,
ARCH_AVR6,
+ ARCH_AVRTINY10,
ARCH_AVRXMEGA1,
ARCH_AVRXMEGA2,
ARCH_AVRXMEGA3,
ARCH_AVRXMEGA4,
ARCH_AVRXMEGA5,
ARCH_AVRXMEGA6,
- ARCH_AVRXMEGA7,
- ARCH_AVRTINY10
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {

102
devel/avr-gcc/files/patch-599-gcc-4.5.1-bug46779 Normal file
View file

@ -0,0 +1,102 @@
--- gcc/config/avr/avr.c.orig 2011-09-30 16:19:47.000000000 +0200
+++ gcc/config/avr/avr.c 2011-09-30 16:23:26.000000000 +0200
@@ -1155,8 +1155,7 @@
true_regnum (XEXP (x, 0)));
debug_rtx (x);
}
- if (!strict && GET_CODE (x) == SUBREG)
- x = SUBREG_REG (x);
+
if (REG_P (x) && (strict ? REG_OK_FOR_BASE_STRICT_P (x)
: REG_OK_FOR_BASE_NOSTRICT_P (x)))
r = POINTER_REGS;
@@ -7135,26 +7134,30 @@
int
avr_hard_regno_mode_ok (int regno, enum machine_mode mode)
{
- /* Disallow QImode in stack pointer regs. */
- if ((regno == REG_SP || regno == (REG_SP + 1)) && mode == QImode)
- return 0;
-
- /* The only thing that can go into registers r28:r29 is a Pmode. */
- if (regno == REG_Y && mode == Pmode)
- return 1;
-
- /* Otherwise disallow all regno/mode combinations that span r28:r29. */
- if (regno <= (REG_Y + 1) && (regno + GET_MODE_SIZE (mode)) >= (REG_Y + 1))
- return 0;
-
- if (mode == QImode)
+ /* NOTE: 8-bit values must not be disallowed for R28 or R29.
+ Disallowing QI et al. in these regs might lead to code like
+ (set (subreg:QI (reg:HI 28) n) ...)
+ which will result in wrong code because reload does not
+ handle SUBREGs of hard regsisters like this.
+ This could be fixed in reload. However, it appears
+ that fixing reload is not wanted by reload people. */
+
+ /* Any GENERAL_REGS register can hold 8-bit values. */
+
+ if (GET_MODE_SIZE (mode) == 1)
return 1;
- /* Modes larger than QImode occupy consecutive registers. */
- if (regno + GET_MODE_SIZE (mode) > FIRST_PSEUDO_REGISTER)
+ /* FIXME: Ideally, the following test is not needed.
+ However, it turned out that it can reduce the number
+ of spill fails. AVR and it's poor endowment with
+ address registers is extreme stress test for reload. */
+
+ if (GET_MODE_SIZE (mode) >= 4
+ && regno >= REG_X)
return 0;
- /* All modes larger than QImode should start in an even register. */
+ /* All modes larger than 8 bits should start in an even register. */
+
return !(regno & 1);
}
@@ -7281,13 +7284,23 @@
&& !df_regs_ever_live_p (regno))
return false;
+ /* Don't allow hard registers that might be part of the frame pointer.
+ Some places in the compiler just test for [HARD_]FRAME_POINTER_REGNUM
+ and don't care for a frame pointer that spans more than one register. */
+
+ if ((!reload_completed || frame_pointer_needed)
+ && (regno == REG_Y || regno == REG_Y + 1))
+ {
+ return false;
+ }
+
return true;
}
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
int
-avr_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
+avr_hard_regno_rename_ok (unsigned int old_reg,
unsigned int new_reg)
{
/* Interrupt functions can only use registers that have already been
@@ -7298,6 +7311,17 @@
&& !df_regs_ever_live_p (new_reg))
return 0;
+ /* Don't allow hard registers that might be part of the frame pointer.
+ Some places in the compiler just test for [HARD_]FRAME_POINTER_REGNUM
+ and don't care for a frame pointer that spans more than one register. */
+
+ if ((!reload_completed || frame_pointer_needed)
+ && (old_reg == REG_Y || old_reg == REG_Y + 1
+ || new_reg == REG_Y || new_reg == REG_Y + 1))
+ {
+ return 0;
+ }
+
return 1;
}

353
devel/avr-gcc/files/patch-avr-libgcc.S
View file

@ -1,353 +0,0 @@
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/avr.c ./gcc/config/avr/avr.c
--- ../gcc-4.3.4.orig/gcc/config/avr/avr.c 2008-06-15 23:32:29.000000000 +0200
+++ ./gcc/config/avr/avr.c 2009-10-02 14:27:56.000000000 +0200
@@ -127,7 +127,8 @@
{ 0, 0, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=35" },
{ 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" }
+ { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" },
+ { 0, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=6" }
};
/* These names are used as the index into the avr_arch_types[] table
@@ -144,7 +145,8 @@
ARCH_AVR35,
ARCH_AVR4,
ARCH_AVR5,
- ARCH_AVR51
+ ARCH_AVR51,
+ ARCH_AVR6
};
struct mcu_type_s {
@@ -273,6 +275,10 @@
{ "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__" },
{ "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__" },
{ "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__" },
+ /* 3-Byte PC. */
+ { "avr6", ARCH_AVR6, NULL },
+ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
+ { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__" },
@@ -513,9 +519,10 @@
else
{
int offset = frame_pointer_needed ? 2 : 0;
+ int avr_pc_size = AVR_HAVE_EIJMP_EICALL ? 3 : 2;
offset += avr_regs_to_save (NULL);
- return get_frame_size () + 2 + 1 + offset;
+ return get_frame_size () + (avr_pc_size) + 1 + offset;
}
}
@@ -662,7 +669,9 @@
/* Prevent any attempt to delete the setting of ZERO_REG! */
emit_insn (gen_rtx_USE (VOIDmode, zero_reg_rtx));
}
- if (minimize && (frame_pointer_needed || live_seq > 6))
+ if (minimize && (frame_pointer_needed
+ || (AVR_2_BYTE_PC && live_seq > 6)
+ || live_seq > 7))
{
insn = emit_move_insn (gen_rtx_REG (HImode, REG_X),
gen_int_mode (size, HImode));
@@ -1121,7 +1130,7 @@
&& ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
|| GET_CODE (addr) == LABEL_REF))
{
- fprintf (file, "pm(");
+ fprintf (file, "gs(");
output_addr_const (file,addr);
fprintf (file ,")");
}
@@ -1146,6 +1155,11 @@
if (!AVR_MEGA)
fputc ('r', file);
}
+ else if (code == '!')
+ {
+ if (AVR_HAVE_EIJMP_EICALL)
+ fputc ('e', file);
+ }
else if (REG_P (x))
{
if (x == zero_reg_rtx)
@@ -4470,7 +4484,7 @@
&& ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
|| GET_CODE (x) == LABEL_REF))
{
- fputs ("\t.word\tpm(", asm_out_file);
+ fputs ("\t.word\tgs(", asm_out_file);
output_addr_const (asm_out_file, x);
fputs (")\n", asm_out_file);
return true;
@@ -5817,7 +5831,7 @@
{
switch_to_section (progmem_section);
if (AVR_MEGA)
- fprintf (stream, "\t.word pm(.L%d)\n", value);
+ fprintf (stream, "\t.word gs(.L%d)\n", value);
else
fprintf (stream, "\trjmp .L%d\n", value);
}
Only in ./gcc/config/avr: avr.c.orig
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/avr.h ./gcc/config/avr/avr.h
--- ../gcc-4.3.4.orig/gcc/config/avr/avr.h 2008-06-15 23:32:29.000000000 +0200
+++ ./gcc/config/avr/avr.h 2009-10-02 14:27:56.000000000 +0200
@@ -80,6 +80,12 @@
builtin_define ("__AVR_MEGA__"); \
if (avr_current_arch->have_jmp_call) \
builtin_define ("__AVR_HAVE_JMP_CALL__"); \
+ if (!avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_2_BYTE_PC__"); \
+ if (avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_3_BYTE_PC__"); \
+ if (avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
if (TARGET_NO_INTERRUPTS) \
builtin_define ("__NO_INTERRUPTS__"); \
} \
@@ -100,9 +106,10 @@
#define AVR_HAVE_MOVW (avr_have_movw_lpmx_p)
#define AVR_HAVE_LPMX (avr_have_movw_lpmx_p)
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
+#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
-#define AVR_2_BYTE_PC 1
-#define AVR_3_BYTE_PC 0
+#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
+#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
@@ -681,7 +688,7 @@
#define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
-#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
+#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
#define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
@@ -838,6 +845,7 @@
mmcu=at90usb64*|\
mmcu=at90usb128*|\
mmcu=at94k: -m avr5}\
+%{mmcu=atmega256*:-m avr6}\
%{mmcu=atmega324*|\
mmcu=atmega325*|\
mmcu=atmega328p|\
@@ -866,7 +874,8 @@
mmcu=at90usb*: -Tdata 0x800100}\
%{mmcu=atmega640|\
mmcu=atmega1280|\
- mmcu=atmega1281: -Tdata 0x800200} "
+ mmcu=atmega1281|\
+ mmcu=atmega256*: -Tdata 0x800200} "
#define LIB_SPEC \
"%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
@@ -978,6 +987,8 @@
%{mmcu=atmega1280:crtm1280.o%s} \
%{mmcu=atmega1281:crtm1281.o%s} \
%{mmcu=atmega1284p:crtm1284p.o%s} \
+%{mmcu=atmega2560:crtm2560.o%s} \
+%{mmcu=atmega2561:crtm2561.o%s} \
%{mmcu=at90can128:crtcan128.o%s} \
%{mmcu=at90usb1286:crtusb1286.o%s} \
%{mmcu=at90usb1287:crtusb1287.o%s}"
Only in ./gcc/config/avr: avr.h.orig
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/avr.md ./gcc/config/avr/avr.md
--- ../gcc-4.3.4.orig/gcc/config/avr/avr.md 2009-03-09 21:49:28.000000000 +0100
+++ ./gcc/config/avr/avr.md 2009-10-02 14:27:56.000000000 +0200
@@ -32,6 +32,7 @@
;; p POST_INC or PRE_DEC address as a pointer (X, Y, Z)
;; r POST_INC or PRE_DEC address as a register (r26, r28, r30)
;; ~ Output 'r' if not AVR_MEGA.
+;; ! Output 'e' if AVR_HAVE_EIJMP_EICALL.
;; UNSPEC usage:
;; 0 Length of a string, see "strlenhi".
@@ -2290,22 +2291,22 @@
"(register_operand (operands[0], HImode) || CONSTANT_P (operands[0]))"
"*{
if (which_alternative==0)
- return \"icall\";
+ return \"%!icall\";
else if (which_alternative==1)
{
if (AVR_HAVE_MOVW)
return (AS2 (movw, r30, %0) CR_TAB
- \"icall\");
+ \"%!icall\");
else
return (AS2 (mov, r30, %A0) CR_TAB
AS2 (mov, r31, %B0) CR_TAB
- \"icall\");
+ \"%!icall\");
}
else if (which_alternative==2)
return AS1(%~call,%c0);
return (AS2 (ldi,r30,lo8(%0)) CR_TAB
AS2 (ldi,r31,hi8(%0)) CR_TAB
- \"icall\");
+ \"%!icall\");
}"
[(set_attr "cc" "clobber,clobber,clobber,clobber")
(set_attr_alternative "length"
@@ -2327,22 +2328,22 @@
"(register_operand (operands[0], VOIDmode) || CONSTANT_P (operands[0]))"
"*{
if (which_alternative==0)
- return \"icall\";
+ return \"%!icall\";
else if (which_alternative==1)
{
if (AVR_HAVE_MOVW)
return (AS2 (movw, r30, %1) CR_TAB
- \"icall\");
+ \"%!icall\");
else
return (AS2 (mov, r30, %A1) CR_TAB
AS2 (mov, r31, %B1) CR_TAB
- \"icall\");
+ \"%!icall\");
}
else if (which_alternative==2)
return AS1(%~call,%c1);
return (AS2 (ldi, r30, lo8(%1)) CR_TAB
AS2 (ldi, r31, hi8(%1)) CR_TAB
- \"icall\");
+ \"%!icall\");
}"
[(set_attr "cc" "clobber,clobber,clobber,clobber")
(set_attr_alternative "length"
@@ -2365,13 +2366,20 @@
; indirect jump
(define_insn "indirect_jump"
[(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
- ""
+ "!AVR_HAVE_EIJMP_EICALL"
"@
ijmp
push %A0\;push %B0\;ret"
[(set_attr "length" "1,3")
(set_attr "cc" "none,none")])
+(define_insn "*indirect_jump_avr6"
+ [(set (pc) (match_operand:HI 0 "register_operand" "z"))]
+ "AVR_HAVE_EIJMP_EICALL"
+ "eijmp"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
;; table jump
;; Table made from "rjmp" instructions for <=8K devices.
@@ -2380,7 +2388,7 @@
UNSPEC_INDEX_JMP))
(use (label_ref (match_operand 1 "" "")))
(clobber (match_dup 0))]
- "!AVR_MEGA"
+ "(!AVR_MEGA) && (!AVR_HAVE_EIJMP_EICALL)"
"@
ijmp
push %A0\;push %B0\;ret"
@@ -2409,7 +2417,7 @@
lpm __tmp_reg__,Z+
lpm r31,Z
mov r30,__tmp_reg__
- ijmp"
+ %!ijmp"
[(set_attr "length" "6")
(set_attr "cc" "clobber")])
@@ -2418,7 +2426,7 @@
UNSPEC_INDEX_JMP))
(use (label_ref (match_operand 1 "" "")))
(clobber (match_dup 0))]
- "AVR_MEGA"
+ "AVR_MEGA && !AVR_HAVE_EIJMP_EICALL"
"lsl r30
rol r31
lpm
@@ -2758,8 +2766,8 @@
(use (reg:HI REG_X))
(clobber (reg:HI REG_Z))]
""
- "ldi r30,pm_lo8(1f)
- ldi r31,pm_hi8(1f)
+ "ldi r30,lo8(gs(1f))
+ ldi r31,hi8(gs(1f))
%~jmp __prologue_saves__+((18 - %0) * 2)
1:"
[(set_attr_alternative "length"
Only in ./gcc/config/avr: avr.md.orig
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/libgcc.S ./gcc/config/avr/libgcc.S
--- ../gcc-4.3.4.orig/gcc/config/avr/libgcc.S 2008-01-19 13:15:02.000000000 +0100
+++ ./gcc/config/avr/libgcc.S 2009-10-02 14:27:56.000000000 +0200
@@ -594,7 +594,12 @@
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ eijmp
+#else
ijmp
+#endif
+
.endfunc
#endif /* defined (L_prologue) */
@@ -674,13 +679,22 @@
lpm __tmp_reg__, Z+
lpm r31, Z
mov r30, __tmp_reg__
+
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ eijmp
+#else
ijmp
+#endif
+
#else
lpm
adiw r30, 1
push r0
lpm
push r0
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ push __zero_reg__
+#endif
ret
#endif
.endfunc
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/t-avr ./gcc/config/avr/t-avr
--- ../gcc-4.3.4.orig/gcc/config/avr/t-avr 2008-01-23 16:07:09.000000000 +0100
+++ ./gcc/config/avr/t-avr 2009-10-02 14:27:56.000000000 +0200
@@ -37,8 +37,8 @@
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -123,7 +123,9 @@
mmcu?avr51=mmcu?atmega1284p \
mmcu?avr51=mmcu?at90can128 \
mmcu?avr51=mmcu?at90usb1286 \
- mmcu?avr51=mmcu?at90usb1287
+ mmcu?avr51=mmcu?at90usb1287 \
+ mmcu?avr6=mmcu?atmega2560 \
+ mmcu?avr6=mmcu?atmega2561
MULTILIB_EXCEPTIONS =

238
devel/avr-gcc/files/patch-bug11259
View file

@ -1,238 +0,0 @@
diff -ur ../gcc-4.3.4.orig/gcc/config/avr/avr.md ./gcc/config/avr/avr.md
--- ../gcc-4.3.4.orig/gcc/config/avr/avr.md 2009-10-02 15:08:58.000000000 +0200
+++ ./gcc/config/avr/avr.md 2009-10-02 15:09:26.000000000 +0200
@@ -54,6 +54,7 @@
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
(UNSPEC_CLI 3)
+ (UNSPEC_SWAP 4)
(UNSPECV_PROLOGUE_SAVES 0)
(UNSPECV_EPILOGUE_RESTORES 1)])
@@ -1183,6 +1184,19 @@
[(set_attr "length" "4,4")
(set_attr "cc" "set_n,clobber")])
+(define_peephole2 ; andi
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (and:QI (match_dup 0)
+ (match_operand:QI 1 "const_int_operand" "")))
+ (set (match_dup 0)
+ (and:QI (match_dup 0)
+ (match_operand:QI 2 "const_int_operand" "")))]
+ ""
+ [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))]
+ {
+ operands[1] = GEN_INT (INTVAL (operands[1]) & INTVAL (operands[2]));
+ })
+
;;|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
;; ior
@@ -1311,10 +1325,57 @@
[(set_attr "length" "4")
(set_attr "cc" "set_n")])
+;; swap
+
+(define_insn "*swap"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
+ UNSPEC_SWAP))]
+ ""
+ "swap %0"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
;; arithmetic shift left
-(define_insn "ashlqi3"
+(define_expand "ashlqi3"
+ [(set (match_operand:QI 0 "register_operand" "")
+ (ashift:QI (match_operand:QI 1 "register_operand" "")
+ (match_operand:QI 2 "general_operand" "")))]
+ ""
+ "")
+
+(define_split ; ashlqi3_const4
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -16)))]
+ "")
+
+(define_split ; ashlqi3_const5
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -32)))]
+ "")
+
+(define_split ; ashlqi3_const6
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
+ "")
+
+(define_insn "*ashlqi3"
[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
@@ -1344,6 +1405,47 @@
;; Optimize if a scratch register from LD_REGS happens to be available.
(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 2) (const_int -16))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 2) (const_int -32))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 2) (const_int -64))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
[(match_scratch:QI 3 "d")
(set (match_operand:HI 0 "register_operand" "")
(ashift:HI (match_operand:HI 1 "register_operand" "")
@@ -1462,7 +1564,49 @@
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; logical shift right
-(define_insn "lshrqi3"
+(define_expand "lshrqi3"
+ [(set (match_operand:QI 0 "register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "register_operand" "")
+ (match_operand:QI 2 "general_operand" "")))]
+ ""
+ "")
+
+(define_insn_and_split "*lshrqi3_const4"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 4)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
+ "")
+
+(define_insn_and_split "*lshrqi3_const5"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 5)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
+ "")
+
+(define_insn_and_split "*lshrqi3_const6"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 6)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
+ "")
+
+(define_insn "*lshrqi3"
[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
@@ -1492,6 +1636,47 @@
;; Optimize if a scratch register from LD_REGS happens to be available.
(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 2) (const_int 15))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 2) (const_int 7))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 2) (const_int 3))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
[(match_scratch:QI 3 "d")
(set (match_operand:HI 0 "register_operand" "")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "")
Only in ./gcc/config/avr: avr.md.orig

32
devel/avr-gcc/files/patch-bug19636-24894-31644-31786
View file

@ -1,32 +0,0 @@
--- gcc/config/avr/avr.h.orig 2010-03-05 15:20:53.000000000 +0100
+++ gcc/config/avr/avr.h 2010-03-05 15:22:53.000000000 +0100
@@ -470,10 +470,6 @@
OPNUM, TYPE); \
goto WIN; \
} \
- push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
- BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
- OPNUM, TYPE); \
- goto WIN; \
} \
else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
{ \
--- gcc/config/avr/avr.c.orig 2010-03-05 15:20:53.000000000 +0100
+++ gcc/config/avr/avr.c 2010-03-05 15:22:53.000000000 +0100
@@ -993,6 +993,8 @@
true_regnum (XEXP (x, 0)));
debug_rtx (x);
}
+ if (!strict && GET_CODE (x) == SUBREG)
+ x = SUBREG_REG (x);
if (REG_P (x) && (strict ? REG_OK_FOR_BASE_STRICT_P (x)
: REG_OK_FOR_BASE_NOSTRICT_P (x)))
r = POINTER_REGS;
@@ -1007,6 +1009,7 @@
if (fit)
{
if (! strict
+ || REGNO (XEXP (x,0)) == REG_X
|| REGNO (XEXP (x,0)) == REG_Y
|| REGNO (XEXP (x,0)) == REG_Z)
r = BASE_POINTER_REGS;

81
devel/avr-gcc/files/patch-bug33009
View file

@ -1,81 +0,0 @@
Index: gcc/rtl-factoring.c
===================================================================
--- gcc/rtl-factoring.c (revision 132522)
+++ gcc/rtl-factoring.c (working copy)
@@ -551,8 +551,8 @@
df_simulate_artificial_refs_at_end (bb, &live);
/* Propagate until INSN if found. */
- for (x = BB_END (bb); x != insn;)
- df_simulate_one_insn_backwards (bb, insn, &live);
+ for (x = BB_END (bb); x != insn; x = PREV_INSN(x))
+ df_simulate_one_insn_backwards (bb, x, &live);
/* Clear registers live after INSN. */
renumbered_reg_set_to_hard_reg_set (&hlive, &live);
@@ -562,7 +562,7 @@
for (i = 0; i < length;)
{
rtx prev = PREV_INSN (x);
- df_simulate_one_insn_backwards (bb, insn, &live);
+ df_simulate_one_insn_backwards (bb, x, &live);
if (INSN_P (x))
{
@@ -949,6 +949,17 @@
return sym;
}
+/* Splits basic block at the requested insn and rebuilds dataflow. */
+
+static basic_block
+asplit_block(basic_block bb, rtx insn)
+{
+ basic_block next;
+ next = split_block (bb, insn)->dest;
+ df_analyze ();
+ return next;
+}
+
/* Ensures that INSN is the last insn in its block and returns the block label
of the next block. */
@@ -959,7 +970,7 @@
if ((insn == BB_END (bb)) && (bb->next_bb != EXIT_BLOCK_PTR))
return block_label (bb->next_bb);
else
- return block_label (split_block (bb, insn)->dest);
+ return block_label (asplit_block (bb, insn));
}
/* Ensures that the last insns of the best pattern and its matching sequences
@@ -1008,8 +1019,9 @@
/* Emit an indirect jump via the link register after the sequence acting
as the return insn. Also emit a barrier and update the basic block. */
- retjmp = emit_jump_insn_after (gen_indirect_jump (pattern_seqs->link_reg),
- BB_END (bb));
+ if (!find_reg_note (BB_END(bb), REG_NORETURN, NULL))
+ retjmp = emit_jump_insn_after (gen_indirect_jump (pattern_seqs->link_reg),
+ BB_END (bb));
emit_barrier_after (BB_END (bb));
/* Replace all outgoing edges with a new one to the block of RETLABEL. */
@@ -1025,7 +1037,7 @@
for (; i < sb->length; i++)
insn = prev_insn_in_block (insn);
- sb->label = block_label (split_block (bb, insn)->dest);
+ sb->label = block_label (asplit_block (bb, insn));
}
/* Emit an insn saving the return address to the link register before the
@@ -1067,7 +1079,7 @@
/* Delete the insns of the sequence. */
for (i = 0; i < sb->length; i++)
insn = prev_insn_in_block (insn);
- delete_basic_block (split_block (bb, insn)->dest);
+ delete_basic_block (asplit_block (bb, insn));
/* Emit an insn saving the return address to the link register
before the deleted sequence. */

48
devel/avr-gcc/files/patch-bug34210-35508
View file

@ -1,48 +0,0 @@
Fix for bugs #34210, #35508.
===================================================================
--- libgcc/config.host.orig 2008-01-25 13:49:04.000000000 -0700
+++ libgcc/config.host 2008-03-22 22:04:25.965018200 -0600
@@ -77,6 +77,9 @@ strongarm*-*-*)
arm*-*-*)
cpu_type=arm
;;
+avr-*-*)
+ cpu_type=avr
+ ;;
bfin*-*)
cpu_type=bfin
;;
@@ -243,6 +246,8 @@ arm*-*-kaos*)
avr-*-rtems*)
;;
avr-*-*)
+ # Make HImode functions for AVR
+ tmake_file=${cpu_type}/t-avr
;;
bfin*-elf*)
;;
Index: config/avr/t-avr
===================================================================
--- libgcc/config/avr/t-avr (revision 0)
+++ libgcc/config/avr/t-avr (revision 0)
@@ -0,0 +1,19 @@
+# Extra 16-bit integer functions.
+intfuncs16 = _absvXX2 _addvXX3 _subvXX3 _mulvXX3 _negvXX2 _ffsXX2 _clzXX2 \
+ _ctzXX2 _popcountXX2 _parityXX2
+hiintfuncs16 = $(subst XX,hi,$(intfuncs16))
+siintfuncs16 = $(subst XX,si,$(intfuncs16))
+
+iter-items := $(hiintfuncs16)
+iter-labels := $(siintfuncs16)
+iter-sizes := $(patsubst %,2,$(siintfuncs16)) $(patsubst %,2,$(hiintfuncs16))
+
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/siditi-object.mk,$(iter-items))
+libgcc-objects += $(patsubst %,%$(objext),$(hiintfuncs16))
+
+ifeq ($(enable_shared),yes)
+libgcc-s-objects += $(patsubst %,%_s$(objext),$(hiintfuncs16))
+endif
+
+

59
devel/avr-gcc/files/patch-bug35013
View file

@ -1,59 +0,0 @@
--- ./gcc/config/avr/avr-protos.h.orig 2010-03-05 15:20:53.000000000 +0100
+++ ./gcc/config/avr/avr-protos.h 2010-03-05 15:24:52.000000000 +0100
@@ -114,6 +114,7 @@
extern int _reg_unused_after (rtx insn, rtx reg);
extern int avr_jump_mode (rtx x, rtx insn);
extern int byte_immediate_operand (rtx op, enum machine_mode mode);
+extern int text_segment_operand (rtx op, enum machine_mode mode);
extern int test_hard_reg_class (enum reg_class class, rtx x);
extern int jump_over_one_insn_p (rtx insn, rtx dest);
--- ./gcc/config/avr/avr.c.orig 2010-03-05 15:22:53.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-05 15:24:52.000000000 +0100
@@ -1136,8 +1136,7 @@
default:
if (CONSTANT_ADDRESS_P (addr)
- && ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
- || GET_CODE (addr) == LABEL_REF))
+ && text_segment_operand (addr, VOIDmode))
{
fprintf (file, "gs(");
output_addr_const (file,addr);
@@ -1453,6 +1452,26 @@
&& INTVAL (op) <= 0xff && INTVAL (op) >= 0);
}
+/* Return true if OP is a program memory reference.*/
+int
+text_segment_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+ switch (GET_CODE (op))
+ {
+ case LABEL_REF :
+ return true;
+ case SYMBOL_REF :
+ return SYMBOL_REF_FUNCTION_P (op);
+ case PLUS :
+ /* Assume canonical format of symbol + constant.
+ Fall through. */
+ case CONST :
+ return text_segment_operand (XEXP (op, 0), VOIDmode);
+ default :
+ return false;
+ }
+}
+
/* Output all insn addresses and their sizes into the assembly language
output file. This is helpful for debugging whether the length attributes
in the md file are correct.
@@ -4490,8 +4509,7 @@
avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
{
if (size == POINTER_SIZE / BITS_PER_UNIT && aligned_p
- && ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
- || GET_CODE (x) == LABEL_REF))
+ && text_segment_operand (x, VOIDmode) )
{
fputs ("\t.word\tgs(", asm_out_file);
output_addr_const (asm_out_file, x);

22
devel/avr-gcc/files/patch-disable-ssp
View file

@ -1,22 +0,0 @@
--- configure.orig 2009-04-25 07:55:24.000000000 +0200
+++ configure 2010-03-05 15:28:10.000000000 +0100
@@ -2277,7 +2277,7 @@
noconfigdirs="$noconfigdirs ld target-libgloss ${libgcj}"
;;
avr-*-*)
- noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj}"
+ noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj} target-libssp"
;;
bfin-*-*)
noconfigdirs="$noconfigdirs gdb"
--- configure.ac.orig 2009-04-25 07:55:24.000000000 +0200
+++ configure.ac 2010-03-05 15:28:10.000000000 +0100
@@ -554,7 +554,7 @@
noconfigdirs="$noconfigdirs ld target-libgloss ${libgcj}"
;;
avr-*-*)
- noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj}"
+ noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj} target-libssp"
;;
bfin-*-*)
noconfigdirs="$noconfigdirs gdb"

712
devel/avr-gcc/files/patch-newdevices
View file

@ -1,712 +0,0 @@
--- ./gcc/config/avr/avr.c~ 2010-03-05 17:16:20.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-05 17:19:30.000000000 +0100
@@ -193,18 +193,28 @@
{ "at90s8535", ARCH_AVR2, "__AVR_AT90S8535__" },
/* Classic + MOVW, <= 8K. */
{ "avr25", ARCH_AVR25, NULL },
+ { "ata6289", ARCH_AVR25, "__AVR_ATA6289__" },
{ "attiny13", ARCH_AVR25, "__AVR_ATtiny13__" },
+ { "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__" },
{ "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__" },
+ { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__" },
{ "attiny24", ARCH_AVR25, "__AVR_ATtiny24__" },
+ { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__" },
+ { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__" },
{ "attiny44", ARCH_AVR25, "__AVR_ATtiny44__" },
+ { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__" },
{ "attiny84", ARCH_AVR25, "__AVR_ATtiny84__" },
{ "attiny25", ARCH_AVR25, "__AVR_ATtiny25__" },
{ "attiny45", ARCH_AVR25, "__AVR_ATtiny45__" },
{ "attiny85", ARCH_AVR25, "__AVR_ATtiny85__" },
{ "attiny261", ARCH_AVR25, "__AVR_ATtiny261__" },
+ { "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__" },
{ "attiny461", ARCH_AVR25, "__AVR_ATtiny461__" },
+ { "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__" },
{ "attiny861", ARCH_AVR25, "__AVR_ATtiny861__" },
+ { "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__" },
{ "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__" },
+ { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__" },
{ "attiny48", ARCH_AVR25, "__AVR_ATtiny48__" },
{ "attiny88", ARCH_AVR25, "__AVR_ATtiny88__" },
{ "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__" },
@@ -220,61 +230,104 @@
{ "avr35", ARCH_AVR35, NULL },
{ "at90usb82", ARCH_AVR35, "__AVR_AT90USB82__" },
{ "at90usb162", ARCH_AVR35, "__AVR_AT90USB162__" },
+ { "atmega8u2", ARCH_AVR35, "__AVR_ATmega8U2__" },
+ { "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__" },
+ { "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__" },
+ { "attiny167", ARCH_AVR35, "__AVR_ATtiny167__" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__" },
+ { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__" },
+ { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__" },
{ "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__" },
+ { "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__" },
{ "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__" },
{ "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__" },
{ "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__" },
+ { "atmega4hvd", ARCH_AVR4, "__AVR_ATmega4HVD__" },
+ { "atmega8hvd", ARCH_AVR4, "__AVR_ATmega8HVD__" },
{ "at90pwm1", ARCH_AVR4, "__AVR_AT90PWM1__" },
{ "at90pwm2", ARCH_AVR4, "__AVR_AT90PWM2__" },
{ "at90pwm2b", ARCH_AVR4, "__AVR_AT90PWM2B__" },
{ "at90pwm3", ARCH_AVR4, "__AVR_AT90PWM3__" },
{ "at90pwm3b", ARCH_AVR4, "__AVR_AT90PWM3B__" },
+ { "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__" },
/* Enhanced, > 8K, <= 64K. */
{ "avr5", ARCH_AVR5, NULL },
{ "atmega16", ARCH_AVR5, "__AVR_ATmega16__" },
+ { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__" },
{ "atmega161", ARCH_AVR5, "__AVR_ATmega161__" },
{ "atmega162", ARCH_AVR5, "__AVR_ATmega162__" },
{ "atmega163", ARCH_AVR5, "__AVR_ATmega163__" },
+ { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__" },
{ "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__" },
{ "atmega165", ARCH_AVR5, "__AVR_ATmega165__" },
+ { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__" },
{ "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__" },
{ "atmega168", ARCH_AVR5, "__AVR_ATmega168__" },
+ { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__" },
{ "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__" },
{ "atmega169", ARCH_AVR5, "__AVR_ATmega169__" },
+ { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__" },
{ "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__" },
+ { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__" },
+ { "atmega16c1", ARCH_AVR5, "__AVR_ATmega16C1__" },
+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__" },
+ { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__" },
+ { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__" },
+ { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__" },
+ { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__" },
{ "atmega32", ARCH_AVR5, "__AVR_ATmega32__" },
{ "atmega323", ARCH_AVR5, "__AVR_ATmega323__" },
+ { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__" },
{ "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__" },
+ { "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__" },
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__" },
+ { "atmega328", ARCH_AVR5, "__AVR_ATmega328__" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__" },
{ "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__" },
+ { "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__" },
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__" },
+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__" },
{ "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__" },
+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__" },
+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__" },
+ { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__" },
{ "atmega406", ARCH_AVR5, "__AVR_ATmega406__" },
{ "atmega64", ARCH_AVR5, "__AVR_ATmega64__" },
{ "atmega640", ARCH_AVR5, "__AVR_ATmega640__" },
{ "atmega644", ARCH_AVR5, "__AVR_ATmega644__" },
+ { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__" },
{ "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__" },
+ { "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__" },
{ "atmega645", ARCH_AVR5, "__AVR_ATmega645__" },
+ { "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__" },
+ { "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__" },
{ "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__" },
+ { "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__" },
+ { "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__" },
{ "atmega649", ARCH_AVR5, "__AVR_ATmega649__" },
+ { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__" },
+ { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__" },
{ "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__" },
- { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__" },
+ { "atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__" },
+ { "atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__" },
+ { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__" },
+ { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__" },
+ { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__" },
{ "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__" },
{ "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__" },
{ "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__" },
{ "at90pwm316", ARCH_AVR5, "__AVR_AT90PWM316__" },
+ { "at90scr100", ARCH_AVR5, "__AVR_AT90SCR100__" },
{ "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__" },
{ "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__" },
{ "at94k", ARCH_AVR5, "__AVR_AT94K__" },
@@ -284,9 +337,13 @@
{ "atmega1280", ARCH_AVR51, "__AVR_ATmega1280__" },
{ "atmega1281", ARCH_AVR51, "__AVR_ATmega1281__" },
{ "atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__" },
+ { "atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__" },
{ "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__" },
{ "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__" },
{ "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__" },
+ { "m3000f", ARCH_AVR51, "__AVR_M3000F__" },
+ { "m3000s", ARCH_AVR51, "__AVR_M3000S__" },
+ { "m3001b", ARCH_AVR51, "__AVR_M3001B__" },
/* 3-Byte PC. */
{ "avr6", ARCH_AVR6, NULL },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
--- ./gcc/config/avr/avr.h~ 2010-03-05 17:15:55.000000000 +0100
+++ ./gcc/config/avr/avr.h 2010-03-05 17:19:53.000000000 +0100
@@ -803,67 +803,221 @@
mmcu=at90s8*|\
mmcu=at90c8*|\
mmcu=at86rf401|\
- mmcu=attiny13|\
+ mmcu=ata6289|\
+ mmcu=attiny13*|\
mmcu=attiny2313|\
+ mmcu=attiny2313a|\
mmcu=attiny24|\
+ mmcu=attiny24a|\
mmcu=attiny25|\
mmcu=attiny261|\
- mmcu=attiny4*|\
- mmcu=attiny8*: -m avr2}\
+ mmcu=attiny261a|\
+ mmcu=attiny4313|\
+ mmcu=attiny43u|\
+ mmcu=attiny44|\
+ mmcu=attiny44a|\
+ mmcu=attiny45|\
+ mmcu=attiny461|\
+ mmcu=attiny461a|\
+ mmcu=attiny48|\
+ mmcu=attiny84|\
+ mmcu=attiny85|\
+ mmcu=attiny861|\
+ mmcu=attiny861a|\
+ mmcu=attiny87|\
+ mmcu=attiny88: -m avr2}\
%{mmcu=atmega103|\
- mmcu=at43*|\
- mmcu=at76*|\
+ mmcu=at43usb320|\
+ mmcu=at43usb355|\
+ mmcu=at76c711|\
mmcu=at90usb82|\
- mmcu=at90usb162: -m avr3}\
-%{mmcu=atmega8*|\
- mmcu=atmega48*|\
+ mmcu=at90usb162|\
+ mmcu=atmega8u2|\
+ mmcu=atmega16u2|\
+ mmcu=atmega32u2|\
+ mmcu=attiny167: -m avr3}\
+%{mmcu=atmega8|\
+ mmcu=atmega88|\
+ mmcu=atmega88a|\
+ mmcu=atmega88p|\
+ mmcu=atmega88pa|\
+ mmcu=atmega8515|\
+ mmcu=atmega8535|\
+ mmcu=atmega8hva|\
+ mmcu=atmega8hvd|\
+ mmcu=atmega48|\
+ mmcu=atmega48a|\
+ mmcu=atmega48p|\
+ mmcu=atmega4hvd|\
mmcu=at90pwm1|\
mmcu=at90pwm2|\
mmcu=at90pwm2b|\
mmcu=at90pwm3|\
- mmcu=at90pwm3b: -m avr4}\
-%{mmcu=atmega16*|\
- mmcu=atmega32*|\
+ mmcu=at90pwm3b|\
+ mmcu=at90pwm81: -m avr4}\
+%{mmcu=atmega16|\
+ mmcu=atmega16a|\
+ mmcu=atmega161|\
+ mmcu=atmega162|\
+ mmcu=atmega163|\
+ mmcu=atmega164a|\
+ mmcu=atmega164p|\
+ mmcu=atmega165|\
+ mmcu=atmega165a|\
+ mmcu=atmega165p|\
+ mmcu=atmega168|\
+ mmcu=atmega168a|\
+ mmcu=atmega168p|\
+ mmcu=atmega169|\
+ mmcu=atmega169a|\
+ mmcu=atmega169p|\
+ mmcu=atmega169pa|\
+ mmcu=atmega16c1|\
+ mmcu=atmega16hva|\
+ mmcu=atmega16hva2|\
+ mmcu=atmega16hvb|\
+ mmcu=atmega16m1|\
+ mmcu=atmega16u4|\
+ mmcu=atmega32|\
+ mmcu=atmega323|\
+ mmcu=atmega324a|\
+ mmcu=atmega324p|\
+ mmcu=atmega324pa|\
+ mmcu=atmega325|\
+ mmcu=atmega325p|\
+ mmcu=atmega3250|\
+ mmcu=atmega3250p|\
+ mmcu=atmega328|\
+ mmcu=atmega328p|\
+ mmcu=atmega329|\
+ mmcu=atmega329p|\
+ mmcu=atmega329pa|\
+ mmcu=atmega3290|\
+ mmcu=atmega3290p|\
+ mmcu=atmega32c1|\
+ mmcu=atmega32hvb|\
+ mmcu=atmega32m1|\
+ mmcu=atmega32u4|\
+ mmcu=atmega32u6|\
mmcu=atmega406|\
- mmcu=atmega64*|\
+ mmcu=atmega64|\
+ mmcu=atmega640|\
+ mmcu=atmega644|\
+ mmcu=atmega644a|\
+ mmcu=atmega644p|\
+ mmcu=atmega644pa|\
+ mmcu=atmega645|\
+ mmcu=atmega645a|\
+ mmcu=atmega645p|\
+ mmcu=atmega6450|\
+ mmcu=atmega6450a|\
+ mmcu=atmega6450p|\
+ mmcu=atmega649|\
+ mmcu=atmega649a|\
+ mmcu=atmega649p|\
+ mmcu=atmega6490|\
+ mmcu=atmega6490a|\
+ mmcu=atmega6490p|\
+ mmcu=atmega64c1|\
+ mmcu=atmega64m1|\
+ mmcu=atmega64hve|\
mmcu=atmega128*|\
mmcu=at90can*|\
mmcu=at90pwm216|\
mmcu=at90pwm316|\
+ mmcu=atmega32c1|\
+ mmcu=atmega32m1|\
+ mmcu=atmega32u4|\
+ mmcu=at90scr100|\
mmcu=at90usb64*|\
mmcu=at90usb128*|\
- mmcu=at94k: -m avr5}\
+ mmcu=at94k|\
+ mmcu=m3000*|\
+ mmcu=m3001*: -m avr5}\
%{mmcu=atmega256*:-m avr6}\
-%{mmcu=atmega324*|\
+%{mmcu=atmega324a|\
+ mmcu=atmega324p|\
+ mmcu=atmega324pa|\
mmcu=atmega325*|\
+ mmcu=atmega328|\
mmcu=atmega328p|\
- mmcu=atmega329*|\
+ mmcu=atmega329|\
+ mmcu=atmega329p|\
+ mmcu=atmega329pa|\
+ mmcu=atmega3290|\
+ mmcu=atmega3290p|\
mmcu=atmega406|\
- mmcu=atmega48*|\
- mmcu=atmega88*|\
+ mmcu=atmega48|\
+ mmcu=atmega48a|\
+ mmcu=atmega48p|\
+ mmcu=atmega88|\
+ mmcu=atmega88a|\
+ mmcu=atmega88p|\
+ mmcu=atmega88pa|\
mmcu=atmega64|\
- mmcu=atmega644*|\
- mmcu=atmega645*|\
- mmcu=atmega649*|\
+ mmcu=atmega644|\
+ mmcu=atmega644a|\
+ mmcu=atmega644p|\
+ mmcu=atmega644pa|\
+ mmcu=atmega645|\
+ mmcu=atmega645p|\
+ mmcu=atmega645a|\
+ mmcu=atmega6450|\
+ mmcu=atmega6450a|\
+ mmcu=atmega6450p|\
+ mmcu=atmega649|\
+ mmcu=atmega649a|\
+ mmcu=atmega649p|\
+ mmcu=atmega6490|\
+ mmcu=atmega6490a|\
+ mmcu=atmega6490p|\
mmcu=atmega128|\
mmcu=atmega1284p|\
mmcu=atmega162|\
- mmcu=atmega164*|\
- mmcu=atmega165*|\
- mmcu=atmega168*|\
- mmcu=atmega169*|\
- mmcu=atmega8hva|\
- mmcu=atmega16hva|\
- mmcu=atmega32hvb|\
+ mmcu=atmega164a|\
+ mmcu=atmega164p|\
+ mmcu=atmega165|\
+ mmcu=atmega165a|\
+ mmcu=atmega165p|\
+ mmcu=atmega168|\
+ mmcu=atmega168a|\
+ mmcu=atmega168p|\
+ mmcu=atmega169|\
+ mmcu=atmega169a|\
+ mmcu=atmega169p|\
+ mmcu=atmega169pa|\
+ mmcu=atmega4hv*|\
+ mmcu=atmega8hv*|\
+ mmcu=atmega16hv*|\
+ mmcu=atmega32hv*|\
mmcu=attiny48|\
mmcu=attiny88|\
+ mmcu=attiny87|\
+ mmcu=attiny167|\
mmcu=at90can*|\
mmcu=at90pwm*|\
+ mmcu=atmega16c1|\
+ mmcu=atmega16m1|\
+ mmcu=atmega32c1|\
+ mmcu=atmega32m1|\
+ mmcu=atmega64c1|\
+ mmcu=atmega64m1|\
+ mmcu=atmega16u4|\
+ mmcu=atmega32u*|\
+ mmcu=at90scr100|\
+ mmcu=ata6289|\
+ mmcu=atmega64hve|\
+ mmcu=atmega8u2|\
+ mmcu=atmega16u2|\
+ mmcu=atmega32u2|\
mmcu=at90usb*: -Tdata 0x800100}\
%{mmcu=atmega640|\
mmcu=atmega1280|\
mmcu=atmega1281|\
- mmcu=atmega256*: -Tdata 0x800200} "
+ mmcu=atmega128rfa1|\
+ mmcu=atmega256*: -Tdata 0x800200}\
+%{mmcu=m3000*|\
+ mmcu=m3001*: -Tdata 0x801000}"
#define LIB_SPEC \
"%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
@@ -898,30 +1052,47 @@
%{mmcu=at90s8535:crts8535.o%s} \
%{mmcu=at86rf401:crt86401.o%s} \
%{mmcu=attiny13:crttn13.o%s} \
+%{mmcu=attiny13a:crttn13a.o%s} \
%{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
+%{mmcu=attiny2313a:crttn2313a.o%s} \
%{mmcu=attiny24:crttn24.o%s} \
+%{mmcu=attiny24a:crttn24a.o%s} \
+%{mmcu=attiny4313:crttn4313.o%s} \
%{mmcu=attiny44:crttn44.o%s} \
+%{mmcu=attiny44a:crttn44a.o%s} \
%{mmcu=attiny84:crttn84.o%s} \
%{mmcu=attiny25:crttn25.o%s} \
%{mmcu=attiny45:crttn45.o%s} \
%{mmcu=attiny85:crttn85.o%s} \
%{mmcu=attiny261:crttn261.o%s} \
+%{mmcu=attiny261a:crttn261a.o%s} \
%{mmcu=attiny461:crttn461.o%s} \
+%{mmcu=attiny461a:crttn461a.o%s} \
%{mmcu=attiny861:crttn861.o%s} \
+%{mmcu=attiny861a:crttn861a.o%s} \
%{mmcu=attiny43u:crttn43u.o%s} \
%{mmcu=attiny48:crttn48.o%s} \
%{mmcu=attiny88:crttn88.o%s} \
+%{mmcu=attiny87:crttn87.o%s} \
+%{mmcu=ata6289:crta6289.o%s} \
%{mmcu=at43usb320|mmcu=avr3:crt43320.o%s} \
%{mmcu=at43usb355:crt43355.o%s} \
%{mmcu=at76c711:crt76711.o%s} \
%{mmcu=atmega103|mmcu=avr31:crtm103.o%s} \
%{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
%{mmcu=at90usb82:crtusb82.o%s} \
+%{mmcu=atmega8u2:crtm8u2.o%s} \
+%{mmcu=atmega16u2:crtm16u2.o%s} \
+%{mmcu=atmega32u2:crtm32u2.o%s} \
+%{mmcu=attiny167:crttn167.o%s} \
%{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
%{mmcu=atmega48:crtm48.o%s} \
+%{mmcu=atmega48a:crtm48a.o%s} \
%{mmcu=atmega48p:crtm48p.o%s} \
%{mmcu=atmega88:crtm88.o%s} \
+%{mmcu=atmega88a:crtm88a.o%s} \
%{mmcu=atmega88p:crtm88p.o%s} \
+%{mmcu=atmega88pa:crtm88pa.o%s} \
%{mmcu=atmega8515:crtm8515.o%s} \
%{mmcu=atmega8535:crtm8535.o%s} \
%{mmcu=at90pwm1:crt90pwm1.o%s} \
@@ -929,45 +1100,81 @@
%{mmcu=at90pwm2b:crt90pwm2b.o%s} \
%{mmcu=at90pwm3:crt90pwm3.o%s} \
%{mmcu=at90pwm3b:crt90pwm3b.o%s} \
+%{mmcu=at90pwm81:crt90pwm81.o%s} \
%{mmcu=atmega16:crtm16.o%s} \
+%{mmcu=atmega16a:crtm16a.o%s} \
%{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
%{mmcu=atmega162:crtm162.o%s} \
%{mmcu=atmega163:crtm163.o%s} \
+%{mmcu=atmega164a:crtm164a.o%s} \
%{mmcu=atmega164p:crtm164p.o%s} \
%{mmcu=atmega165:crtm165.o%s} \
+%{mmcu=atmega165a:crtm165a.o%s} \
%{mmcu=atmega165p:crtm165p.o%s} \
%{mmcu=atmega168:crtm168.o%s} \
+%{mmcu=atmega168a:crtm168a.o%s} \
%{mmcu=atmega168p:crtm168p.o%s} \
%{mmcu=atmega169:crtm169.o%s} \
+%{mmcu=atmega169a:crtm169a.o%s} \
%{mmcu=atmega169p:crtm169p.o%s} \
+%{mmcu=atmega169pa:crtm169pa.o%s} \
%{mmcu=atmega32:crtm32.o%s} \
%{mmcu=atmega323:crtm323.o%s} \
+%{mmcu=atmega324a:crtm324a.o%s} \
%{mmcu=atmega324p:crtm324p.o%s} \
+%{mmcu=atmega324pa:crtm324pa.o%s} \
%{mmcu=atmega325:crtm325.o%s} \
%{mmcu=atmega325p:crtm325p.o%s} \
%{mmcu=atmega3250:crtm3250.o%s} \
%{mmcu=atmega3250p:crtm3250p.o%s} \
+%{mmcu=atmega328:crtm328.o%s} \
%{mmcu=atmega328p:crtm328p.o%s} \
%{mmcu=atmega329:crtm329.o%s} \
%{mmcu=atmega329p:crtm329p.o%s} \
+%{mmcu=atmega329pa:crtm329pa.o%s} \
%{mmcu=atmega3290:crtm3290.o%s} \
%{mmcu=atmega3290p:crtm3290p.o%s} \
-%{mmcu=atmega32hvb:crtm32hvb.o%s} \
%{mmcu=atmega406:crtm406.o%s} \
%{mmcu=atmega64:crtm64.o%s} \
%{mmcu=atmega640:crtm640.o%s} \
%{mmcu=atmega644:crtm644.o%s} \
+%{mmcu=atmega644a:crtm644a.o%s} \
%{mmcu=atmega644p:crtm644p.o%s} \
+%{mmcu=atmega644pa:crtm644pa.o%s} \
%{mmcu=atmega645:crtm645.o%s} \
+%{mmcu=atmega645a:crtm645a.o%s} \
+%{mmcu=atmega645p:crtm645p.o%s} \
%{mmcu=atmega6450:crtm6450.o%s} \
+%{mmcu=atmega6450a:crtm6450a.o%s} \
+%{mmcu=atmega6450p:crtm6450p.o%s} \
%{mmcu=atmega649:crtm649.o%s} \
+%{mmcu=atmega649a:crtm649a.o%s} \
+%{mmcu=atmega649p:crtm649p.o%s} \
%{mmcu=atmega6490:crtm6490.o%s} \
+%{mmcu=atmega6490a:crtm6490a.o%s} \
+%{mmcu=atmega6490p:crtm6490p.o%s} \
+%{mmcu=atmega64hve:crtm64hve.o%s} \
%{mmcu=atmega8hva:crtm8hva.o%s} \
%{mmcu=atmega16hva:crtm16hva.o%s} \
+%{mmcu=atmega16hva2:crtm16hva2.o%s} \
+%{mmcu=atmega16hvb:crtm16hvb.o%s} \
+%{mmcu=atmega32hvb:crtm32hvb.o%s} \
+%{mmcu=atmega4hvd:crtm4hvd.o%s} \
+%{mmcu=atmega8hvd:crtm8hvd.o%s} \
%{mmcu=at90can32:crtcan32.o%s} \
%{mmcu=at90can64:crtcan64.o%s} \
%{mmcu=at90pwm216:crt90pwm216.o%s} \
%{mmcu=at90pwm316:crt90pwm316.o%s} \
+%{mmcu=atmega16c1:crtm16c1.o%s} \
+%{mmcu=atmega16m1:crtm16m1.o%s} \
+%{mmcu=atmega16u4:crtm16u4.o%s} \
+%{mmcu=atmega32c1:crtm32c1.o%s} \
+%{mmcu=atmega32m1:crtm32m1.o%s} \
+%{mmcu=atmega32u4:crtm32u4.o%s} \
+%{mmcu=atmega32u6:crtm32u6.o%s} \
+%{mmcu=atmega64c1:crtm64c1.o%s} \
+%{mmcu=atmega64m1:crtm64m1.o%s} \
+%{mmcu=at90scr100:crt90scr100.o%s} \
%{mmcu=at90usb646:crtusb646.o%s} \
%{mmcu=at90usb647:crtusb647.o%s} \
%{mmcu=at94k:crtat94k.o%s} \
@@ -975,11 +1182,15 @@
%{mmcu=atmega1280:crtm1280.o%s} \
%{mmcu=atmega1281:crtm1281.o%s} \
%{mmcu=atmega1284p:crtm1284p.o%s} \
-%{mmcu=atmega2560:crtm2560.o%s} \
-%{mmcu=atmega2561:crtm2561.o%s} \
+%{mmcu=atmega128rfa1:crtm128rfa1.o%s} \
%{mmcu=at90can128:crtcan128.o%s} \
%{mmcu=at90usb1286:crtusb1286.o%s} \
-%{mmcu=at90usb1287:crtusb1287.o%s}"
+%{mmcu=at90usb1287:crtusb1287.o%s} \
+%{mmcu=m3000f:crtm3000f.o%s} \
+%{mmcu=m3000s:crtm3000s.o%s} \
+%{mmcu=m3001b:crtm3001b.o%s} \
+%{mmcu=atmega2560|mmcu=avr6:crtm2560.o%s} \
+%{mmcu=atmega2561:crtm2561.o%s}"
#define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
--- ./gcc/config/avr/t-avr~ 2010-03-05 17:15:38.000000000 +0100
+++ ./gcc/config/avr/t-avr 2010-03-05 17:20:12.000000000 +0100
@@ -42,19 +42,29 @@
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
+ mmcu?avr25=mmcu?ata6289 \
mmcu?avr25=mmcu?attiny13 \
+ mmcu?avr25=mmcu?attiny13a \
mmcu?avr25=mmcu?attiny2313 \
+ mmcu?avr25=mmcu?attiny2313a \
mmcu?avr25=mmcu?attiny24 \
- mmcu?avr25=mmcu?attiny44 \
- mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny24a \
mmcu?avr25=mmcu?attiny25 \
- mmcu?avr25=mmcu?attiny45 \
- mmcu?avr25=mmcu?attiny85 \
mmcu?avr25=mmcu?attiny261 \
- mmcu?avr25=mmcu?attiny461 \
- mmcu?avr25=mmcu?attiny861 \
+ mmcu?avr25=mmcu?attiny261a \
+ mmcu?avr25=mmcu?attiny4313 \
mmcu?avr25=mmcu?attiny43u \
+ mmcu?avr25=mmcu?attiny44 \
+ mmcu?avr25=mmcu?attiny44a \
+ mmcu?avr25=mmcu?attiny45 \
+ mmcu?avr25=mmcu?attiny461 \
+ mmcu?avr25=mmcu?attiny461a \
mmcu?avr25=mmcu?attiny48 \
+ mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny85 \
+ mmcu?avr25=mmcu?attiny861 \
+ mmcu?avr25=mmcu?attiny861a \
+ mmcu?avr25=mmcu?attiny87 \
mmcu?avr25=mmcu?attiny88 \
mmcu?avr25=mmcu?at86rf401 \
mmcu?avr3=mmcu?at43usb320 \
@@ -63,57 +73,100 @@
mmcu?avr31=mmcu?atmega103 \
mmcu?avr35=mmcu?at90usb82 \
mmcu?avr35=mmcu?at90usb162 \
+ mmcu?avr35=mmcu?atmega8u2 \
+ mmcu?avr35=mmcu?atmega16u2 \
+ mmcu?avr35=mmcu?atmega32u2 \
+ mmcu?avr35=mmcu?attiny167 \
mmcu?avr4=mmcu?atmega48 \
+ mmcu?avr4=mmcu?atmega48a \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
mmcu?avr4=mmcu?atmega8515 \
mmcu?avr4=mmcu?atmega8535 \
mmcu?avr4=mmcu?atmega88 \
+ mmcu?avr4=mmcu?atmega88a \
mmcu?avr4=mmcu?atmega88p \
+ mmcu?avr4=mmcu?atmega88pa \
mmcu?avr4=mmcu?atmega8hva \
+ mmcu?avr4=mmcu?atmega4hvd \
+ mmcu?avr4=mmcu?atmega8hvd \
mmcu?avr4=mmcu?at90pwm1 \
mmcu?avr4=mmcu?at90pwm2 \
mmcu?avr4=mmcu?at90pwm2b \
mmcu?avr4=mmcu?at90pwm3 \
mmcu?avr4=mmcu?at90pwm3b \
+ mmcu?avr4=mmcu?at90pwm81 \
mmcu?avr5=mmcu?atmega16 \
+ mmcu?avr5=mmcu?atmega16a \
mmcu?avr5=mmcu?atmega161 \
mmcu?avr5=mmcu?atmega162 \
mmcu?avr5=mmcu?atmega163 \
+ mmcu?avr5=mmcu?atmega164a \
mmcu?avr5=mmcu?atmega164p \
mmcu?avr5=mmcu?atmega165 \
+ mmcu?avr5=mmcu?atmega165a \
mmcu?avr5=mmcu?atmega165p \
mmcu?avr5=mmcu?atmega168 \
+ mmcu?avr5=mmcu?atmega168a \
mmcu?avr5=mmcu?atmega168p \
mmcu?avr5=mmcu?atmega169 \
+ mmcu?avr5=mmcu?atmega169a \
mmcu?avr5=mmcu?atmega169p \
+ mmcu?avr5=mmcu?atmega169pa \
mmcu?avr5=mmcu?atmega32 \
mmcu?avr5=mmcu?atmega323 \
+ mmcu?avr5=mmcu?atmega324a \
mmcu?avr5=mmcu?atmega324p \
+ mmcu?avr5=mmcu?atmega324pa \
mmcu?avr5=mmcu?atmega325 \
mmcu?avr5=mmcu?atmega325p \
mmcu?avr5=mmcu?atmega3250 \
mmcu?avr5=mmcu?atmega3250p \
+ mmcu?avr5=mmcu?atmega328 \
mmcu?avr5=mmcu?atmega328p \
mmcu?avr5=mmcu?atmega329 \
mmcu?avr5=mmcu?atmega329p \
+ mmcu?avr5=mmcu?atmega329pa \
mmcu?avr5=mmcu?atmega3290 \
mmcu?avr5=mmcu?atmega3290p \
- mmcu?avr5=mmcu?atmega32hvb \
mmcu?avr5=mmcu?atmega406 \
mmcu?avr5=mmcu?atmega64 \
mmcu?avr5=mmcu?atmega640 \
mmcu?avr5=mmcu?atmega644 \
+ mmcu?avr5=mmcu?atmega644a \
mmcu?avr5=mmcu?atmega644p \
+ mmcu?avr5=mmcu?atmega644pa \
mmcu?avr5=mmcu?atmega645 \
+ mmcu?avr5=mmcu?atmega645a \
+ mmcu?avr5=mmcu?atmega645p \
mmcu?avr5=mmcu?atmega6450 \
+ mmcu?avr5=mmcu?atmega6450a \
+ mmcu?avr5=mmcu?atmega6450p \
mmcu?avr5=mmcu?atmega649 \
+ mmcu?avr5=mmcu?atmega649a \
+ mmcu?avr5=mmcu?atmega649p \
mmcu?avr5=mmcu?atmega6490 \
+ mmcu?avr5=mmcu?atmega6490a \
+ mmcu?avr5=mmcu?atmega6490p \
mmcu?avr5=mmcu?atmega16hva \
+ mmcu?avr5=mmcu?atmega16hva2 \
+ mmcu?avr5=mmcu?atmega16hvb \
+ mmcu?avr5=mmcu?atmega32hvb \
mmcu?avr5=mmcu?at90can32 \
mmcu?avr5=mmcu?at90can64 \
mmcu?avr5=mmcu?at90pwm216 \
mmcu?avr5=mmcu?at90pwm316 \
+ mmcu?avr5=mmcu?atmega16c1 \
+ mmcu?avr5=mmcu?atmega16m1 \
+ mmcu?avr5=mmcu?atmega16u4 \
+ mmcu?avr5=mmcu?atmega32c1 \
+ mmcu?avr5=mmcu?atmega32m1 \
+ mmcu?avr5=mmcu?atmega32u4 \
+ mmcu?avr5=mmcu?atmega32u6 \
+ mmcu?avr5=mmcu?atmega64c1 \
+ mmcu?avr5=mmcu?atmega64m1 \
+ mmcu?avr5=mmcu?atmega64hve \
+ mmcu?avr5=mmcu?at90scr100 \
mmcu?avr5=mmcu?at90usb646 \
mmcu?avr5=mmcu?at90usb647 \
mmcu?avr5=mmcu?at94k \
@@ -121,12 +174,15 @@
mmcu?avr51=mmcu?atmega1280 \
mmcu?avr51=mmcu?atmega1281 \
mmcu?avr51=mmcu?atmega1284p \
+ mmcu?avr51=mmcu?atmega128rfa1 \
mmcu?avr51=mmcu?at90can128 \
mmcu?avr51=mmcu?at90usb1286 \
mmcu?avr51=mmcu?at90usb1287 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
-
+ mmcu?avr51=mmcu?m3000f \
+ mmcu?avr51=mmcu?m3000s \
+ mmcu?avr51=mmcu?m3001b \
+ mmcu?avr6=mmcu?atmega2560 \
+ mmcu?avr6=mmcu?atmega2561
MULTILIB_EXCEPTIONS =
LIBGCC = stmp-multilib

20
devel/avr-gcc/files/patch-param-inline-call-cost
View file

@ -1,20 +0,0 @@
--- gcc/config/avr/avr.c.orig 2010-03-05 17:21:19.000000000 +0100
+++ gcc/config/avr/avr.c 2010-03-05 17:22:02.000000000 +0100
@@ -46,6 +46,7 @@
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
+#include "params.h"
#include "df.h"
/* Maximal allowed offset for an address in the LD command */
@@ -419,6 +420,9 @@
flag_delete_null_pointer_checks = 0;
+ if (!PARAM_SET_P (PARAM_INLINE_CALL_COST))
+ set_param_value ("inline-call-cost", 5);
+
for (t = avr_mcu_types; t->name; t++)
if (strcmp (t->name, avr_mcu_name) == 0)
break;

892
devel/avr-gcc/files/patch-xmega
View file

@ -1,892 +0,0 @@
--- ./gcc/config/avr/avr.c.orig 2010-03-08 12:55:13.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-08 12:55:36.000000000 +0100
@@ -55,6 +55,7 @@
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
+static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
static int sequent_regs_live (void);
@@ -131,17 +132,24 @@
int avr_have_movw_lpmx_p = 0;
static const struct base_arch_s avr_arch_types[] = {
- { 1, 0, 0, 0, 0, 0, 0, 0, NULL }, /* unknown device specified */
- { 1, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=1" },
- { 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
- { 0, 0, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=25" },
- { 0, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=3" },
- { 0, 0, 1, 0, 1, 0, 0, 0, "__AVR_ARCH__=31" },
- { 0, 0, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=35" },
- { 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=4" },
- { 0, 1, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=6" }
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, NULL }, /* Unknown device specified. */
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=1" },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=25" },
+ { 0, 0, 1, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=3" },
+ { 0, 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=31" },
+ { 0, 0, 1, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=35" },
+ { 0, 1, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=4" },
+ { 0, 1, 1, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=5" },
+ { 0, 1, 1, 1, 1, 1, 0, 0, 0, "__AVR_ARCH__=51" },
+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=6" },
+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, "__AVR_ARCH__=101" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, "__AVR_ARCH__=102" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, "__AVR_ARCH__=103" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, "__AVR_ARCH__=104" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, "__AVR_ARCH__=105" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=106" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, "__AVR_ARCH__=107" }
};
/* These names are used as the index into the avr_arch_types[] table
@@ -159,7 +167,14 @@
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
- ARCH_AVR6
+ ARCH_AVR6,
+ ARCH_AVRXMEGA1,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA3,
+ ARCH_AVRXMEGA4,
+ ARCH_AVRXMEGA5,
+ ARCH_AVRXMEGA6,
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {
@@ -349,6 +364,35 @@
{ "avr6", ARCH_AVR6, NULL },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__" },
+ /* Enhanced, == 256K. */
+ /* Xmega, <= 8K FLASH. */
+ /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
+ { "avrxmega2", ARCH_AVRXMEGA2, NULL },
+ { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__" },
+ { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__" },
+ { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__" },
+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
+ { "avrxmega3", ARCH_AVRXMEGA3, NULL },
+ { "atxmega32a4", ARCH_AVRXMEGA3, "__AVR_ATxmega32A4__" },
+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
+ { "avrxmega4", ARCH_AVRXMEGA4, NULL },
+ { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__" },
+ { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__" },
+ /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
+ { "avrxmega5", ARCH_AVRXMEGA5, NULL },
+ { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__" },
+ /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
+ { "avrxmega6", ARCH_AVRXMEGA6, NULL },
+ { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__" },
+ { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__" },
+ { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__" },
+ { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__" },
+ { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__" },
+ { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__" },
+ { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__" },
+ /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
+ { "avrxmega7", ARCH_AVRXMEGA7, NULL },
+ { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__" },
@@ -531,6 +575,21 @@
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a nmi function as specified
+ by the "nmi" attribute. */
+
+static int
+nmi_function_p (tree func)
+{
+ tree a;
+
+ if (TREE_CODE (func) != FUNCTION_DECL)
+ return 0;
+
+ a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func));
+ return a != NULL_TREE;
+}
+
/* Return nonzero if FUNC is a OS_task function. */
static int
@@ -690,6 +749,7 @@
cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
cfun->machine->is_signal = signal_function_p (current_function_decl);
+ cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
/* Prologue: naked. */
@@ -725,17 +785,48 @@
/* Push SREG. */
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
+ /* Push RAMPD, RAMPX, RAMPY. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Push RAMPD. */
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ /* Push RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ /* Push RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
+
/* Push RAMPZ. */
if(AVR_HAVE_RAMPZ
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -744,9 +835,46 @@
/* Clear zero reg. */
insn = emit_move_insn (zero_reg_rtx, const0_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
-
+
/* Prevent any attempt to delete the setting of ZERO_REG! */
emit_insn (gen_rtx_USE (VOIDmode, zero_reg_rtx));
+
+ /*
+ Clear RAMP? registers if used for data access in the interrupt/signal
+ context. Do this after the zero register has been explictly cleared.
+ */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Set RAMPD to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
+ const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ /* Set RAMPX to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
+ const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ /* Set RAMPY to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
+ const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if(AVR_HAVE_RAMPZ
+ && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
+ {
+ /* Set RAMPZ to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)),
+ const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
}
if (minimize && (frame_pointer_needed
|| (AVR_2_BYTE_PC && live_seq > 6)
@@ -1010,14 +1138,39 @@
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(RAMPZ_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_RAMPZ_ADDR)),
tmp_reg_rtx);
}
+ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Pop RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPD. */
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
+ tmp_reg_rtx);
+ }
+
/* Restore SREG using tmp reg as scratch. */
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(SREG_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_SREG_ADDR)),
tmp_reg_rtx);
/* Restore tmp REG. */
@@ -1786,8 +1939,9 @@
}
/* Use simple load of stack pointer if no interrupts are used
or inside main or signal function prologue where they disabled. */
- else if (TARGET_NO_INTERRUPTS
- || (reload_completed
+ else if (TARGET_NO_INTERRUPTS
+ || (!AVR_XMEGA
+ && reload_completed
&& cfun->machine->is_signal
&& prologue_epilogue_contains (insn)))
{
@@ -1796,7 +1950,8 @@
AS2 (out,__SP_L__,%A1));
}
/* In interrupt prolog we know interrupts are enabled. */
- else if (reload_completed
+ else if (!AVR_XMEGA
+ && reload_completed
&& cfun->machine->is_interrupt
&& prologue_epilogue_contains (insn))
{
@@ -1806,12 +1961,21 @@
"sei" CR_TAB
AS2 (out,__SP_L__,%A1));
}
- *l = 5;
- return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
- "cli" CR_TAB
- AS2 (out,__SP_H__,%B1) CR_TAB
- AS2 (out,__SREG__,__tmp_reg__) CR_TAB
- AS2 (out,__SP_L__,%A1));
+ if(AVR_XMEGA)
+ {
+ *l = 2;
+ return (AS2 (out,__SP_L__,%A1) CR_TAB
+ AS2 (out,__SP_H__,%B1));
+ }
+ else
+ {
+ *l = 5;
+ return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
+ "cli" CR_TAB
+ AS2 (out,__SP_H__,%B1) CR_TAB
+ AS2 (out,__SREG__,__tmp_reg__) CR_TAB
+ AS2 (out,__SP_L__,%A1));
+ }
}
else if (test_hard_reg_class (STACK_REG, src))
{
@@ -1946,7 +2110,7 @@
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (in,%0,__SREG__);
@@ -1954,7 +2118,8 @@
if (avr_io_address_p (x, 1))
{
*l = 1;
- return AS2 (in,%0,%1-0x20);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (in,%0,%1-%2);
}
*l = 2;
return AS2 (lds,%0,%1);
@@ -2142,8 +2307,9 @@
if (avr_io_address_p (base, 2))
{
*l = 2;
- return (AS2 (in,%A0,%A1-0x20) CR_TAB
- AS2 (in,%B0,%B1-0x20));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return (AS2 (in,%A0,%A1-%2) CR_TAB
+ AS2 (in,%B0,%B1-%2));
}
*l = 4;
return (AS2 (lds,%A0,%A1) CR_TAB
@@ -2634,7 +2800,7 @@
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (out,__SREG__,%1);
@@ -2642,7 +2808,8 @@
if (avr_io_address_p (x, 1))
{
*l = 1;
- return AS2 (out,%0-0x20,%1);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (out,%0-%2,%1);
}
*l = 2;
return AS2 (sts,%0,%1);
@@ -2721,11 +2888,20 @@
if (avr_io_address_p (base, 2))
{
*l = 2;
- return (AS2 (out,%B0-0x20,%B1) CR_TAB
- AS2 (out,%A0-0x20,%A1));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ if (AVR_XMEGA)
+ return (AS2 (out,%A0-%2,%A1) CR_TAB
+ AS2 (out,%B0-%2,%B1));
+ else
+ return (AS2 (out,%B0-%2,%B1) CR_TAB
+ AS2 (out,%A0-%2,%A1));
}
- return *l = 4, (AS2 (sts,%B0,%B1) CR_TAB
- AS2 (sts,%A0,%A1));
+ if (AVR_XMEGA)
+ return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
+ AS2 (sts,%B0,%B1));
+ else
+ return *l = 4, (AS2 (sts,%B0,%B1) CR_TAB
+ AS2 (sts,%A0,%A1));
}
if (reg_base > 0)
{
@@ -2740,11 +2916,20 @@
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__));
else
- return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
- AS2 (sbiw,r26,1) CR_TAB
- AS2 (st,X,r26));
+ {
+ if (!AVR_XMEGA)
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1) CR_TAB
+ AS2 (st,X,r26));
+ else
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (st,X,r26) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
else
{
@@ -2752,14 +2937,27 @@
return *l=2, (AS2 (st,X+,%A1) CR_TAB
AS2 (st,X,%B1));
else
- return *l=3, (AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1));
+ {
+ if (!AVR_XMEGA)
+ return *l=3, (AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (st,-X,%A1));
+ else
+ return *l=3, (AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
}
else
- return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
- AS2 (st,%0,%A1));
+ {
+ if (!AVR_XMEGA)
+ return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
+ AS2 (st,%0,%A1));
+ else
+ return *l=2, (AS2 (st,%0,%A1) CR_TAB
+ AS2 (std,%0+1,%B1));
+ }
}
else if (GET_CODE (base) == PLUS)
{
@@ -2770,48 +2968,104 @@
if (reg_base != REG_Y)
fatal_insn ("incorrect insn:",insn);
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
- return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
- AS2 (std,Y+63,%B1) CR_TAB
- AS2 (std,Y+62,%A1) CR_TAB
- AS2 (sbiw,r28,%o0-62));
-
- return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
- AS2 (std,Y+1,%B1) CR_TAB
- AS2 (st,Y,%A1) CR_TAB
- AS2 (subi,r28,lo8(%o0)) CR_TAB
- AS2 (sbci,r29,hi8(%o0)));
+ if (!AVR_XMEGA)
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
+ else
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
}
if (reg_base == REG_X)
{
/* (X + d) = R */
if (reg_src == REG_X)
{
- *l = 7;
- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,__zero_reg__) CR_TAB
- AS2 (st,-X,__tmp_reg__) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
+ if (!AVR_XMEGA)
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0+1) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS2 (st,-X,__tmp_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0));
+ }
+ else
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,__tmp_reg__) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+ if (!AVR_XMEGA)
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0+1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (st,-X,%A1) CR_TAB
AS2 (sbiw,r26,%o0));
}
- *l = 4;
- return (AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
- AS2 (sbiw,r26,%o0));
+ else
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
}
- return *l=2, (AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%A0,%A1));
+
+ if (!AVR_XMEGA)
+ return *l=2, (AS2 (std,%B0,%B1) CR_TAB
+ AS2 (std,%A0,%A1));
+ else
+ return *l=2, (AS2 (std,%A0,%A1) CR_TAB
+ AS2 (std,%B0,%B1));
}
else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- return *l=2, (AS2 (st,%0,%B1) CR_TAB
- AS2 (st,%0,%A1));
+ {
+ if (mem_volatile_p && AVR_XMEGA)
+ return *l = 4, (AS2 (sbiw,%r0,1) CR_TAB
+ AS2 (st,%p0+,%A1) CR_TAB
+ AS2 (st,%p0,%B1) CR_TAB
+ AS2 (sbiw,%r0,2));
+ else
+ return *l=2, (AS2 (st,%0,%B1) CR_TAB
+ AS2 (st,%0,%A1));
+ }
else if (GET_CODE (base) == POST_INC) /* (R++) */
{
- if (mem_volatile_p)
+ if (mem_volatile_p && !AVR_XMEGA)
{
if (REGNO (XEXP (base, 0)) == REG_X)
{
@@ -2832,7 +3086,7 @@
*l = 2;
return (AS2 (st,%0,%A1) CR_TAB
- AS2 (st,%0,%B1));
+ AS2 (st,%0,%B1));
}
fatal_insn ("unknown move insn:",insn);
return "";
@@ -4712,6 +4966,7 @@
{ "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
{ "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ NULL, 0, 0, false, false, false, NULL }
@@ -4800,6 +5055,14 @@
func_name);
}
}
+ else if (strncmp (attr, "nmi", strlen ("nmi")) == 0)
+ {
+ if (strncmp (func_name, "__vector", strlen ("__vector")) != 0)
+ {
+ warning (0, "%qs appears to be a misspelled nmi handler",
+ func_name);
+ }
+ }
}
return NULL_TREE;
@@ -4994,7 +5257,8 @@
/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
fputs ("__SREG__ = 0x3f\n"
"__SP_H__ = 0x3e\n"
- "__SP_L__ = 0x3d\n", asm_out_file);
+ "__SP_L__ = 0x3d\n"
+ "__CCP__ = 0x34\n", asm_out_file);
fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
@@ -5888,15 +6152,18 @@
return !(regno & 1);
}
-/* Returns 1 if X is a valid address for an I/O register of size SIZE
- (1 or 2). Used for lds/sts -> in/out optimization. Add 0x20 to SIZE
- to check for the lower half of I/O space (for cbi/sbi/sbic/sbis). */
+/* Returns 1 if X is a valid address for an I/O register of size SIZE
+ (1 or 2). Used for lds/sts -> in/out optimization. */
int
avr_io_address_p (rtx x, int size)
{
- return (optimize > 0 && GET_CODE (x) == CONST_INT
- && INTVAL (x) >= 0x20 && INTVAL (x) <= 0x60 - size);
+ if(AVR_XMEGA)
+ return (optimize > 0 && GET_CODE (x) == CONST_INT
+ && INTVAL (x) >= 0 && INTVAL (x) <= 0x40 - size);
+ else
+ return (optimize > 0 && GET_CODE (x) == CONST_INT
+ && INTVAL (x) >= 0x20 && INTVAL (x) <= 0x60 - size);
}
const char *
@@ -6074,16 +6341,17 @@
if (GET_CODE (operands[1]) == CONST_INT)
{
- if (INTVAL (operands[1]) < 0x40)
+ operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */
+ if (low_io_address_operand (operands[1], VOIDmode))
{
if (comp == EQ)
- output_asm_insn (AS2 (sbis,%1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbis,%1-%4,%2), operands);
else
- output_asm_insn (AS2 (sbic,%1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbic,%1-%4,%2), operands);
}
else
{
- output_asm_insn (AS2 (in,__tmp_reg__,%1-0x20), operands);
+ output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands);
if (comp == EQ)
output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
else
--- ./gcc/config/avr/avr.h.orig 2010-03-08 12:55:09.000000000 +0100
+++ ./gcc/config/avr/avr.h 2010-03-08 12:55:36.000000000 +0100
@@ -44,8 +44,11 @@
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
- /* Reserved. */
- int reserved;
+ /* Core is in Xmega family. */
+ int xmega;
+
+ /* Core have RAMPX, RAMPY and RAMPD registers. */
+ int have_rampx_y_d;
const char *const macro;
};
@@ -68,6 +71,13 @@
builtin_define ("__AVR_HAVE_ELPMX__"); \
if (avr_have_movw_lpmx_p) \
builtin_define ("__AVR_HAVE_MOVW__"); \
+ if (avr_current_arch->have_elpm) \
+ { \
+ builtin_define ("__AVR_HAVE_RAMPZ__");\
+ builtin_define ("__AVR_HAVE_ELPM__"); \
+ } \
+ if (avr_current_arch->have_elpmx) \
+ builtin_define ("__AVR_HAVE_ELPMX__"); \
if (avr_have_movw_lpmx_p) \
builtin_define ("__AVR_HAVE_LPMX__"); \
if (avr_asm_only_p) \
@@ -88,6 +98,17 @@
builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
if (TARGET_NO_INTERRUPTS) \
builtin_define ("__NO_INTERRUPTS__"); \
+ if (avr_current_arch->xmega) \
+ { \
+ builtin_define ("__AVR_XMEGA__"); \
+ builtin_define ("__AVR_HAVE_SPMX__"); \
+ } \
+ if (avr_current_arch->have_rampx_y_d) \
+ { \
+ builtin_define ("__AVR_HAVE_RAMPX__");\
+ builtin_define ("__AVR_HAVE_RAMPY__");\
+ builtin_define ("__AVR_HAVE_RAMPD__");\
+ } \
} \
while (0)
@@ -107,10 +128,19 @@
#define AVR_HAVE_LPMX (avr_have_movw_lpmx_p)
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
+#define AVR_XMEGA (avr_current_arch->xmega)
+#define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d)
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
+#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
+#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
+#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
+#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B)
+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
+
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
#define OVERRIDE_OPTIONS avr_override_options ()
@@ -935,6 +965,20 @@
mmcu=m3000*|\
mmcu=m3001*: -m avr5}\
%{mmcu=atmega256*:-m avr6}\
+%{mmcu=atxmega16a4|\
+ mmcu=atxmega16d4|\
+ mmcu=atxmega32d4:-m avrxmega2}\
+%{mmcu=atxmega32a4:-m avrxmega3} \
+%{mmcu=atxmega64a3|\
+ mmcu=atxmega64d3:-m avrxmega4} \
+%{mmcu=atxmega64a1:-m avrxmega5} \
+%{mmcu=atxmega128a3|\
+ mmcu=atxmega128d3|\
+ mmcu=atxmega192a3|\
+ mmcu=atxmega192d3|\
+ mmcu=atxmega256a3*|\
+ mmcu=atxmega256d3:-m avrxmega6} \
+%{mmcu=atxmega128a1:-m avrxmega7} \
%{mmcu=atmega324a|\
mmcu=atmega324p|\
mmcu=atmega324pa|\
@@ -1190,7 +1234,22 @@
%{mmcu=m3000s:crtm3000s.o%s} \
%{mmcu=m3001b:crtm3001b.o%s} \
%{mmcu=atmega2560|mmcu=avr6:crtm2560.o%s} \
-%{mmcu=atmega2561:crtm2561.o%s}"
+%{mmcu=atmega2561:crtm2561.o%s} \
+%{mmcu=avrxmega2|mmcu=atxmega32d4:crtx32d4.o%s} \
+%{mmcu=atxmega16a4:crtx16a4.o%s} \
+%{mmcu=atxmega16d4:crtx16d4.o%s} \
+%{mmcu=atxmega3|mmcu=atxmega32a4:crtx32a4.o%s} \
+%{mmcu=atxmega4|mmcu=atxmega64a3:crtx64a3.o%s} \
+%{mmcu=atxmega64d3:crtx64d3.o%s} \
+%{mmcu=atxmega5|mmcu=atxmega64a1:crtx64a1.o%s} \
+%{mmcu=atxmega6|mmcu=atxmega128a3:crtx128a3.o%s} \
+%{mmcu=atxmega128d3:crtx128d3.o%s}\
+%{mmcu=atxmega192a3:crtx192a3.o%s}\
+%{mmcu=atxmega192d3:crtx192d3.o%s}\
+%{mmcu=atxmega256a3:crtx256a3.o%s} \
+%{mmcu=atxmega256a3b:crtx256a3b.o%s} \
+%{mmcu=atxmega256d3:crtx256d3.o%s} \
+%{mmcu=atxmega7|mmcu=atxmega128a1:crtx128a1.o%s}"
#define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
@@ -1252,8 +1311,12 @@
/* 'true' - if current function is a signal function
as specified by the "signal" attribute. */
int is_signal;
-
+
/* 'true' - if current function is a signal function
+ as specified by the "nmi" attribute. */
+ int is_nmi;
+
+ /* 'true' - if current function is a task function
as specified by the "OS_task" attribute. */
int is_OS_task;
};
--- ./gcc/config/avr/t-avr.orig 2010-03-08 12:55:09.000000000 +0100
+++ ./gcc/config/avr/t-avr 2010-03-08 12:55:36.000000000 +0100
@@ -37,8 +37,8 @@
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega3/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -182,7 +182,22 @@
mmcu?avr51=mmcu?m3000s \
mmcu?avr51=mmcu?m3001b \
mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
+ mmcu?avr6=mmcu?atmega2561 \
+ mmcu?avrxmega2=mmcu?atxmega16a4 \
+ mmcu?avrxmega2=mmcu?atxmega16d4 \
+ mmcu?avrxmega2=mmcu?atxmega32d4 \
+ mmcu?avrxmega3=mmcu?atxmega32a4 \
+ mmcu?avrxmega4=mmcu?atxmega64a3 \
+ mmcu?avrxmega4=mmcu?atxmega64d3 \
+ mmcu?avrxmega5=mmcu?atxmega64a1 \
+ mmcu?avrxmega6=mmcu?atxmega128a3 \
+ mmcu?avrxmega6=mmcu?atxmega128d3 \
+ mmcu?avrxmega6=mmcu?atxmega192a3 \
+ mmcu?avrxmega6=mmcu?atxmega192d3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3b \
+ mmcu?avrxmega6=mmcu?atxmega256d3 \
+ mmcu?avrxmega7=mmcu?atxmega128a1
MULTILIB_EXCEPTIONS =
LIBGCC = stmp-multilib
--- ./gcc/config/avr/avr.md.orig 2010-03-08 12:54:57.000000000 +0100
+++ ./gcc/config/avr/avr.md 2010-03-08 12:55:36.000000000 +0100
@@ -47,9 +47,6 @@
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
- (SREG_ADDR 0x5F)
- (RAMPZ_ADDR 0x5B)
-
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SWAP 2)
@@ -2677,7 +2674,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
- return AS2 (cbi,%0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (cbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
@@ -2689,7 +2687,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
- return AS2 (sbi,%0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (sbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
--- ./gcc/config/avr/predicates.md.orig 2010-03-08 12:54:57.000000000 +0100
+++ ./gcc/config/avr/predicates.md 2010-03-08 12:55:36.000000000 +0100
@@ -50,12 +50,16 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return 1 if OP is the zero constant for MODE.
(define_predicate "const0_operand"

186
devel/avr-gcc/files/patch-xx-os_main
View file

@ -1,186 +0,0 @@
--- ./gcc/config/avr/avr.c.orig 2010-03-05 18:01:20.000000000 +0100
+++ ./gcc/config/avr/avr.c 2010-03-05 18:01:51.000000000 +0100
@@ -57,6 +57,7 @@
static int signal_function_p (tree);
static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
+static int avr_OS_main_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
static int sequent_regs_live (void);
static const char *ptrreg_to_str (int);
@@ -603,6 +604,19 @@
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a OS_main function. */
+
+static int
+avr_OS_main_function_p (tree func)
+{
+ tree a;
+
+ gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
+
+ a = lookup_attribute ("OS_main", TYPE_ATTRIBUTES (TREE_TYPE (func)));
+ return a != NULL_TREE;
+}
+
/* Return the number of hard registers to push/pop in the prologue/epilogue
of the current function, and optionally store these registers in SET. */
@@ -621,9 +635,10 @@
count = 0;
/* No need to save any registers if the function never returns or
- is have "OS_task" attribute. */
+ is have "OS_task" or "OS_main" attribute. */
if (TREE_THIS_VOLATILE (current_function_decl)
- || cfun->machine->is_OS_task)
+ || cfun->machine->is_OS_task
+ || cfun->machine->is_OS_main)
return 0;
for (reg = 0; reg < 32; reg++)
@@ -742,6 +757,8 @@
rtx pushword = gen_rtx_MEM (HImode,
gen_rtx_POST_DEC (HImode, stack_pointer_rtx));
rtx insn;
+ int method1_length;
+ int sp_plus_length;
last_insn_address = 0;
@@ -751,6 +768,7 @@
cfun->machine->is_signal = signal_function_p (current_function_decl);
cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
+ cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
/* Prologue: naked. */
if (cfun->machine->is_naked)
@@ -764,6 +782,7 @@
&& !cfun->machine->is_interrupt
&& !cfun->machine->is_signal
&& !cfun->machine->is_OS_task
+ && !cfun->machine->is_OS_main
&& live_seq);
if (cfun->machine->is_interrupt || cfun->machine->is_signal)
@@ -903,7 +922,7 @@
}
if (frame_pointer_needed)
{
- if(!cfun->machine->is_OS_task)
+ if (!(cfun->machine->is_OS_task || cfun->machine->is_OS_main))
{
/* Push frame pointer. */
insn = emit_move_insn (pushword, frame_pointer_rtx);
@@ -933,7 +952,7 @@
if (TARGET_TINY_STACK)
{
if (size < -63 || size > 63)
- warning (0, "large frame pointer change (%d) with -mtiny-stack", size);
+ warning (0, "large frame pointer change (%ld) with -mtiny-stack", size);
/* The high byte (r29) doesn't change - prefer 'subi' (1 cycle)
over 'sbiw' (2 cycles, same size). */
@@ -945,7 +964,6 @@
myfp = frame_pointer_rtx;
}
/* Calculate length. */
- int method1_length;
method1_length =
get_attr_length (gen_move_insn (frame_pointer_rtx, stack_pointer_rtx));
method1_length +=
@@ -1043,6 +1061,7 @@
HARD_REG_SET set;
int minimize;
HOST_WIDE_INT size = get_frame_size();
+ int sp_plus_length;
/* epilogue: naked */
if (cfun->machine->is_naked)
@@ -1057,6 +1076,7 @@
&& !cfun->machine->is_interrupt
&& !cfun->machine->is_signal
&& !cfun->machine->is_OS_task
+ && !cfun->machine->is_OS_main
&& live_seq);
if (minimize && (frame_pointer_needed || live_seq > 4))
@@ -1119,7 +1139,7 @@
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
}
- if(!cfun->machine->is_OS_task)
+ if (!(cfun->machine->is_OS_task || cfun->machine->is_OS_main))
{
/* Restore previous frame_pointer. */
emit_insn (gen_pophi (frame_pointer_rtx));
@@ -1939,10 +1959,18 @@
}
/* Use simple load of stack pointer if no interrupts are used
or inside main or signal function prologue where they disabled. */
- else if (TARGET_NO_INTERRUPTS
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
|| (!AVR_XMEGA
- && reload_completed
+ && reload_completed
&& cfun->machine->is_signal
+ && prologue_epilogue_contains (insn))
+ || (!AVR_XMEGA
+ && reload_completed
+ && cfun->machine->is_OS_main
+ && prologue_contains (insn))
+ || (AVR_XMEGA
+ && reload_completed
+ && cfun->machine->is_nmi
&& prologue_epilogue_contains (insn)))
{
*l = 2;
@@ -4969,6 +4997,7 @@
{ "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ NULL, 0, 0, false, false, false, NULL }
};
--- ./gcc/config/avr/avr.h.orig 2010-03-05 18:01:20.000000000 +0100
+++ ./gcc/config/avr/avr.h 2010-03-05 18:01:51.000000000 +0100
@@ -1320,4 +1320,8 @@
/* 'true' - if current function is a task function
as specified by the "OS_task" attribute. */
int is_OS_task;
+
+ /* 'true' - if current function is a 'main' function
+ as specified by the "OS_main" attribute. */
+ int is_OS_main;
};
--- ./gcc/function.c.orig 2009-06-19 23:44:24.000000000 +0200
+++ ./gcc/function.c 2010-03-05 18:01:51.000000000 +0100
@@ -4757,6 +4757,14 @@
}
int
+prologue_contains (const_rtx insn)
+{
+ if (contains (insn, &prologue))
+ return 1;
+ return 0;
+}
+
+int
prologue_epilogue_contains (const_rtx insn)
{
if (contains (insn, &prologue))
--- ./gcc/rtl.h.orig 2009-07-14 11:32:55.000000000 +0200
+++ ./gcc/rtl.h 2010-03-05 18:01:51.000000000 +0100
@@ -2145,6 +2145,7 @@
/* In function.c */
extern void reposition_prologue_and_epilogue_notes (void);
+extern int prologue_contains (const_rtx);
extern int prologue_epilogue_contains (const_rtx);
extern int sibcall_epilogue_contains (const_rtx);
extern void mark_temp_addr_taken (rtx);

286
devel/avr-gcc/pkg-plist
View file

@ -5,66 +5,186 @@ bin/avr-c++
bin/avr-cpp
bin/avr-g++
bin/avr-gcc
bin/avr-gcc-4.3.4
bin/avr-gcc-4.5.1
bin/avr-gccbug
lib/gcc/avr/4.3.4/avr25/libgcc.a
lib/gcc/avr/4.3.4/avr25/libgcov.a
lib/gcc/avr/4.3.4/avr3/libgcc.a
lib/gcc/avr/4.3.4/avr3/libgcov.a
lib/gcc/avr/4.3.4/avr31/libgcc.a
lib/gcc/avr/4.3.4/avr31/libgcov.a
lib/gcc/avr/4.3.4/avr35/libgcc.a
lib/gcc/avr/4.3.4/avr35/libgcov.a
lib/gcc/avr/4.3.4/avr4/libgcc.a
lib/gcc/avr/4.3.4/avr4/libgcov.a
lib/gcc/avr/4.3.4/avr5/libgcc.a
lib/gcc/avr/4.3.4/avr5/libgcov.a
lib/gcc/avr/4.3.4/avr51/libgcc.a
lib/gcc/avr/4.3.4/avr51/libgcov.a
lib/gcc/avr/4.3.4/avr6/libgcc.a
lib/gcc/avr/4.3.4/avr6/libgcov.a
lib/gcc/avr/4.3.4/avrxmega2/libgcc.a
lib/gcc/avr/4.3.4/avrxmega2/libgcov.a
lib/gcc/avr/4.3.4/avrxmega3/libgcc.a
lib/gcc/avr/4.3.4/avrxmega3/libgcov.a
lib/gcc/avr/4.3.4/avrxmega4/libgcc.a
lib/gcc/avr/4.3.4/avrxmega4/libgcov.a
lib/gcc/avr/4.3.4/avrxmega5/libgcc.a
lib/gcc/avr/4.3.4/avrxmega5/libgcov.a
lib/gcc/avr/4.3.4/avrxmega6/libgcc.a
lib/gcc/avr/4.3.4/avrxmega6/libgcov.a
lib/gcc/avr/4.3.4/avrxmega7/libgcc.a
lib/gcc/avr/4.3.4/avrxmega7/libgcov.a
lib/gcc/avr/4.3.4/include-fixed/README
lib/gcc/avr/4.3.4/include-fixed/fixed
lib/gcc/avr/4.3.4/include-fixed/limits.h
lib/gcc/avr/4.3.4/include-fixed/syslimits.h
lib/gcc/avr/4.3.4/include/float.h
lib/gcc/avr/4.3.4/include/iso646.h
lib/gcc/avr/4.3.4/include/stdarg.h
lib/gcc/avr/4.3.4/include/stdbool.h
lib/gcc/avr/4.3.4/include/stddef.h
lib/gcc/avr/4.3.4/include/stdfix.h
lib/gcc/avr/4.3.4/include/tgmath.h
lib/gcc/avr/4.3.4/include/unwind.h
lib/gcc/avr/4.3.4/include/varargs.h
lib/gcc/avr/4.3.4/install-tools/fixinc_list
lib/gcc/avr/4.3.4/install-tools/gsyslimits.h
lib/gcc/avr/4.3.4/install-tools/include/README
lib/gcc/avr/4.3.4/install-tools/include/limits.h
lib/gcc/avr/4.3.4/install-tools/macro_list
lib/gcc/avr/4.3.4/install-tools/mkheaders.conf
lib/gcc/avr/4.3.4/libgcc.a
lib/gcc/avr/4.3.4/libgcov.a
libexec/gcc/avr/4.3.4/cc1
libexec/gcc/avr/4.3.4/cc1plus
libexec/gcc/avr/4.3.4/collect2
libexec/gcc/avr/4.3.4/install-tools/fix-header
libexec/gcc/avr/4.3.4/install-tools/fixinc.sh
libexec/gcc/avr/4.3.4/install-tools/fixincl
libexec/gcc/avr/4.3.4/install-tools/fixproto
libexec/gcc/avr/4.3.4/install-tools/mkheaders
libexec/gcc/avr/4.3.4/install-tools/mkinstalldirs
lib/gcc/avr/4.5.1/avr25/libgcc.a
lib/gcc/avr/4.5.1/avr25/libgcov.a
lib/gcc/avr/4.5.1/avr3/libgcc.a
lib/gcc/avr/4.5.1/avr3/libgcov.a
lib/gcc/avr/4.5.1/avr31/libgcc.a
lib/gcc/avr/4.5.1/avr31/libgcov.a
lib/gcc/avr/4.5.1/avr35/libgcc.a
lib/gcc/avr/4.5.1/avr35/libgcov.a
lib/gcc/avr/4.5.1/avr4/libgcc.a
lib/gcc/avr/4.5.1/avr4/libgcov.a
lib/gcc/avr/4.5.1/avr5/libgcc.a
lib/gcc/avr/4.5.1/avr5/libgcov.a
lib/gcc/avr/4.5.1/avr51/libgcc.a
lib/gcc/avr/4.5.1/avr51/libgcov.a
lib/gcc/avr/4.5.1/avr6/libgcc.a
lib/gcc/avr/4.5.1/avr6/libgcov.a
lib/gcc/avr/4.5.1/avrxmega2/libgcc.a
lib/gcc/avr/4.5.1/avrxmega2/libgcov.a
lib/gcc/avr/4.5.1/avrxmega4/libgcc.a
lib/gcc/avr/4.5.1/avrxmega4/libgcov.a
lib/gcc/avr/4.5.1/avrxmega5/libgcc.a
lib/gcc/avr/4.5.1/avrxmega5/libgcov.a
lib/gcc/avr/4.5.1/avrxmega6/libgcc.a
lib/gcc/avr/4.5.1/avrxmega6/libgcov.a
lib/gcc/avr/4.5.1/avrxmega7/libgcc.a
lib/gcc/avr/4.5.1/avrxmega7/libgcov.a
lib/gcc/avr/4.5.1/avrtiny10/libgcc.a
lib/gcc/avr/4.5.1/avrtiny10/libgcov.a
lib/gcc/avr/4.5.1/include-fixed/README
lib/gcc/avr/4.5.1/include-fixed/limits.h
lib/gcc/avr/4.5.1/include-fixed/syslimits.h
lib/gcc/avr/4.5.1/include/float.h
lib/gcc/avr/4.5.1/include/iso646.h
lib/gcc/avr/4.5.1/include/stdarg.h
lib/gcc/avr/4.5.1/include/stdbool.h
lib/gcc/avr/4.5.1/include/stddef.h
lib/gcc/avr/4.5.1/include/stdfix.h
lib/gcc/avr/4.5.1/include/stdint-gcc.h
lib/gcc/avr/4.5.1/include/stdint.h
lib/gcc/avr/4.5.1/include/tgmath.h
lib/gcc/avr/4.5.1/include/unwind.h
lib/gcc/avr/4.5.1/include/varargs.h
lib/gcc/avr/4.5.1/install-tools/fixinc_list
lib/gcc/avr/4.5.1/install-tools/gsyslimits.h
lib/gcc/avr/4.5.1/install-tools/include/README
lib/gcc/avr/4.5.1/install-tools/include/limits.h
lib/gcc/avr/4.5.1/install-tools/macro_list
lib/gcc/avr/4.5.1/install-tools/mkheaders.conf
lib/gcc/avr/4.5.1/libgcc.a
lib/gcc/avr/4.5.1/libgcov.a
lib/gcc/avr/4.5.1/plugin/include/cp/cp-tree.h
lib/gcc/avr/4.5.1/plugin/include/cp/cxx-pretty-print.h
lib/gcc/avr/4.5.1/plugin/include/cp/name-lookup.h
lib/gcc/avr/4.5.1/plugin/include/cp/cp-tree.def
lib/gcc/avr/4.5.1/plugin/include/ansidecl.h
lib/gcc/avr/4.5.1/plugin/include/filenames.h
lib/gcc/avr/4.5.1/plugin/include/hashtab.h
lib/gcc/avr/4.5.1/plugin/include/libiberty.h
lib/gcc/avr/4.5.1/plugin/include/md5.h
lib/gcc/avr/4.5.1/plugin/include/obstack.h
lib/gcc/avr/4.5.1/plugin/include/partition.h
lib/gcc/avr/4.5.1/plugin/include/safe-ctype.h
lib/gcc/avr/4.5.1/plugin/include/splay-tree.h
lib/gcc/avr/4.5.1/plugin/include/cpplib.h
lib/gcc/avr/4.5.1/plugin/include/line-map.h
lib/gcc/avr/4.5.1/plugin/include/symtab.h
lib/gcc/avr/4.5.1/plugin/include/config/avr/avr-protos.h
lib/gcc/avr/4.5.1/plugin/include/config/avr/avr.h
lib/gcc/avr/4.5.1/plugin/include/config/dbxelf.h
lib/gcc/avr/4.5.1/plugin/include/config/newlib-stdint.h
lib/gcc/avr/4.5.1/plugin/include/defaults.h
lib/gcc/avr/4.5.1/plugin/include/alias.h
lib/gcc/avr/4.5.1/plugin/include/all-tree.def
lib/gcc/avr/4.5.1/plugin/include/auto-host.h
lib/gcc/avr/4.5.1/plugin/include/basic-block.h
lib/gcc/avr/4.5.1/plugin/include/bitmap.h
lib/gcc/avr/4.5.1/plugin/include/builtins.def
lib/gcc/avr/4.5.1/plugin/include/bversion.h
lib/gcc/avr/4.5.1/plugin/include/c-common.def
lib/gcc/avr/4.5.1/plugin/include/c-common.h
lib/gcc/avr/4.5.1/plugin/include/c-pragma.h
lib/gcc/avr/4.5.1/plugin/include/c-pretty-print.h
lib/gcc/avr/4.5.1/plugin/include/cfghooks.h
lib/gcc/avr/4.5.1/plugin/include/cfgloop.h
lib/gcc/avr/4.5.1/plugin/include/cgraph.h
lib/gcc/avr/4.5.1/plugin/include/cif-code.def
lib/gcc/avr/4.5.1/plugin/include/config.h
lib/gcc/avr/4.5.1/plugin/include/configargs.h
lib/gcc/avr/4.5.1/plugin/include/coretypes.h
lib/gcc/avr/4.5.1/plugin/include/cppdefault.h
lib/gcc/avr/4.5.1/plugin/include/debug.h
lib/gcc/avr/4.5.1/plugin/include/diagnostic.def
lib/gcc/avr/4.5.1/plugin/include/diagnostic.h
lib/gcc/avr/4.5.1/plugin/include/double-int.h
lib/gcc/avr/4.5.1/plugin/include/emit-rtl.h
lib/gcc/avr/4.5.1/plugin/include/except.h
lib/gcc/avr/4.5.1/plugin/include/fixed-value.h
lib/gcc/avr/4.5.1/plugin/include/flags.h
lib/gcc/avr/4.5.1/plugin/include/function.h
lib/gcc/avr/4.5.1/plugin/include/gcc-plugin.h
lib/gcc/avr/4.5.1/plugin/include/genrtl.h
lib/gcc/avr/4.5.1/plugin/include/ggc.h
lib/gcc/avr/4.5.1/plugin/include/gimple.def
lib/gcc/avr/4.5.1/plugin/include/gimple.h
lib/gcc/avr/4.5.1/plugin/include/gsstruct.def
lib/gcc/avr/4.5.1/plugin/include/gtype-desc.h
lib/gcc/avr/4.5.1/plugin/include/hard-reg-set.h
lib/gcc/avr/4.5.1/plugin/include/highlev-plugin-common.h
lib/gcc/avr/4.5.1/plugin/include/hwint.h
lib/gcc/avr/4.5.1/plugin/include/incpath.h
lib/gcc/avr/4.5.1/plugin/include/input.h
lib/gcc/avr/4.5.1/plugin/include/insn-constants.h
lib/gcc/avr/4.5.1/plugin/include/insn-flags.h
lib/gcc/avr/4.5.1/plugin/include/insn-modes.h
lib/gcc/avr/4.5.1/plugin/include/insn-notes.def
lib/gcc/avr/4.5.1/plugin/include/intl.h
lib/gcc/avr/4.5.1/plugin/include/ipa-prop.h
lib/gcc/avr/4.5.1/plugin/include/ipa-reference.h
lib/gcc/avr/4.5.1/plugin/include/ipa-utils.h
lib/gcc/avr/4.5.1/plugin/include/langhooks.h
lib/gcc/avr/4.5.1/plugin/include/machmode.h
lib/gcc/avr/4.5.1/plugin/include/mode-classes.def
lib/gcc/avr/4.5.1/plugin/include/omp-builtins.def
lib/gcc/avr/4.5.1/plugin/include/options.h
lib/gcc/avr/4.5.1/plugin/include/opts.h
lib/gcc/avr/4.5.1/plugin/include/output.h
lib/gcc/avr/4.5.1/plugin/include/params.def
lib/gcc/avr/4.5.1/plugin/include/params.h
lib/gcc/avr/4.5.1/plugin/include/plugin-version.h
lib/gcc/avr/4.5.1/plugin/include/plugin.def
lib/gcc/avr/4.5.1/plugin/include/plugin.h
lib/gcc/avr/4.5.1/plugin/include/pointer-set.h
lib/gcc/avr/4.5.1/plugin/include/predict.def
lib/gcc/avr/4.5.1/plugin/include/predict.h
lib/gcc/avr/4.5.1/plugin/include/prefix.h
lib/gcc/avr/4.5.1/plugin/include/pretty-print.h
lib/gcc/avr/4.5.1/plugin/include/real.h
lib/gcc/avr/4.5.1/plugin/include/reg-notes.def
lib/gcc/avr/4.5.1/plugin/include/rtl.def
lib/gcc/avr/4.5.1/plugin/include/rtl.h
lib/gcc/avr/4.5.1/plugin/include/sbitmap.h
lib/gcc/avr/4.5.1/plugin/include/statistics.h
lib/gcc/avr/4.5.1/plugin/include/sync-builtins.def
lib/gcc/avr/4.5.1/plugin/include/system.h
lib/gcc/avr/4.5.1/plugin/include/target.h
lib/gcc/avr/4.5.1/plugin/include/timevar.def
lib/gcc/avr/4.5.1/plugin/include/timevar.h
lib/gcc/avr/4.5.1/plugin/include/tm-preds.h
lib/gcc/avr/4.5.1/plugin/include/tm.h
lib/gcc/avr/4.5.1/plugin/include/tm_p.h
lib/gcc/avr/4.5.1/plugin/include/toplev.h
lib/gcc/avr/4.5.1/plugin/include/tree-dump.h
lib/gcc/avr/4.5.1/plugin/include/tree-check.h
lib/gcc/avr/4.5.1/plugin/include/tree-flow-inline.h
lib/gcc/avr/4.5.1/plugin/include/tree-flow.h
lib/gcc/avr/4.5.1/plugin/include/tree-inline.h
lib/gcc/avr/4.5.1/plugin/include/tree-iterator.h
lib/gcc/avr/4.5.1/plugin/include/tree-pass.h
lib/gcc/avr/4.5.1/plugin/include/tree-ssa-alias.h
lib/gcc/avr/4.5.1/plugin/include/tree-ssa-operands.h
lib/gcc/avr/4.5.1/plugin/include/tree-ssa-sccvn.h
lib/gcc/avr/4.5.1/plugin/include/tree.def
lib/gcc/avr/4.5.1/plugin/include/tree.h
lib/gcc/avr/4.5.1/plugin/include/treestruct.def
lib/gcc/avr/4.5.1/plugin/include/varray.h
lib/gcc/avr/4.5.1/plugin/include/vec.h
lib/gcc/avr/4.5.1/plugin/include/vecprim.h
lib/gcc/avr/4.5.1/plugin/include/version.h
lib/gcc/avr/4.5.1/plugin/include/b-header-vars
libexec/gcc/avr/4.5.1/cc1
libexec/gcc/avr/4.5.1/cc1plus
libexec/gcc/avr/4.5.1/collect2
libexec/gcc/avr/4.5.1/lto-wrapper
libexec/gcc/avr/4.5.1/lto1
libexec/gcc/avr/4.5.1/install-tools/fixinc.sh
libexec/gcc/avr/4.5.1/install-tools/fixincl
libexec/gcc/avr/4.5.1/install-tools/mkheaders
libexec/gcc/avr/4.5.1/install-tools/mkinstalldirs
share/locale/be/LC_MESSAGES/cpplib.mo
share/locale/be/LC_MESSAGES/gcc.mo
share/locale/ca/LC_MESSAGES/cpplib.mo
@ -97,29 +217,33 @@ share/locale/zh_CN/LC_MESSAGES/cpplib.mo
share/locale/zh_CN/LC_MESSAGES/gcc.mo
share/locale/zh_TW/LC_MESSAGES/cpplib.mo
share/locale/zh_TW/LC_MESSAGES/gcc.mo
@dirrm lib/gcc/avr/4.3.4/avr25
@dirrm lib/gcc/avr/4.3.4/avr3
@dirrm lib/gcc/avr/4.3.4/avr31
@dirrm lib/gcc/avr/4.3.4/avr35
@dirrm lib/gcc/avr/4.3.4/avr4
@dirrm lib/gcc/avr/4.3.4/avr5
@dirrm lib/gcc/avr/4.3.4/avr51
@dirrm lib/gcc/avr/4.3.4/avr6
@dirrm lib/gcc/avr/4.3.4/avrxmega2
@dirrm lib/gcc/avr/4.3.4/avrxmega3
@dirrm lib/gcc/avr/4.3.4/avrxmega4
@dirrm lib/gcc/avr/4.3.4/avrxmega5
@dirrm lib/gcc/avr/4.3.4/avrxmega6
@dirrm lib/gcc/avr/4.3.4/avrxmega7
@dirrm lib/gcc/avr/4.3.4/include
@dirrm lib/gcc/avr/4.3.4/include-fixed
@dirrm lib/gcc/avr/4.3.4/install-tools/include
@dirrm lib/gcc/avr/4.3.4/install-tools
@dirrm lib/gcc/avr/4.3.4
@dirrm lib/gcc/avr/4.5.1/avr25
@dirrm lib/gcc/avr/4.5.1/avr3
@dirrm lib/gcc/avr/4.5.1/avr31
@dirrm lib/gcc/avr/4.5.1/avr35
@dirrm lib/gcc/avr/4.5.1/avr4
@dirrm lib/gcc/avr/4.5.1/avr5
@dirrm lib/gcc/avr/4.5.1/avr51
@dirrm lib/gcc/avr/4.5.1/avr6
@dirrm lib/gcc/avr/4.5.1/avrxmega2
@dirrm lib/gcc/avr/4.5.1/avrxmega4
@dirrm lib/gcc/avr/4.5.1/avrxmega5
@dirrm lib/gcc/avr/4.5.1/avrxmega6
@dirrm lib/gcc/avr/4.5.1/avrxmega7
@dirrm lib/gcc/avr/4.5.1/avrtiny10
@dirrm lib/gcc/avr/4.5.1/include
@dirrm lib/gcc/avr/4.5.1/include-fixed
@dirrm lib/gcc/avr/4.5.1/install-tools/include
@dirrm lib/gcc/avr/4.5.1/install-tools
@dirrm lib/gcc/avr/4.5.1/plugin/include/config/avr
@dirrm lib/gcc/avr/4.5.1/plugin/include/config
@dirrm lib/gcc/avr/4.5.1/plugin/include/cp
@dirrm lib/gcc/avr/4.5.1/plugin/include
@dirrm lib/gcc/avr/4.5.1/plugin
@dirrm lib/gcc/avr/4.5.1
@dirrm lib/gcc/avr
@dirrm lib/gcc
@dirrm libexec/gcc/avr/4.3.4/install-tools
@dirrm libexec/gcc/avr/4.3.4
@dirrm libexec/gcc/avr/4.5.1/install-tools
@dirrm libexec/gcc/avr/4.5.1
@dirrm libexec/gcc/avr
@dirrm libexec/gcc
@dirrm avr/bin