Udpate to sources as of today

This update attempts to fix a build error on FreeBSD-11 that appears to be
caused by the D compiler creating object files that cannot be linked by the
linker it invokes by default (GNU ld on FreeBSD-11).

Approved by:	antoine (implicit)
This commit is contained in:
Stefan Eßer 2020-06-21 16:22:04 +00:00
parent e2e38df01c
commit 16d15dc28a
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=539773
3 changed files with 23 additions and 9 deletions

View file

@ -1,7 +1,7 @@
# $FreeBSD$
PORTNAME= silq
PORTVERSION= 20200617
PORTVERSION= 20200621
CATEGORIES= lang math science
MAINTAINER= se@FreeBSD.org
@ -17,14 +17,14 @@ BUILD_DEPENDS= ldmd2:lang/ldc
USE_GITHUB= yes
GH_TUPLE= eth-sri:silq:27c399d \
tgehr:ast:2812b33:ast/ast \
GH_TUPLE= eth-sri:silq:7331c54 \
tgehr:ast:3018b4b:ast/ast \
tgehr:util:27168af:util/util
OPTIONS_DEFINE= EXAMPLES
do-build:
cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -of=silq
cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -linker=lld -of=silq
do-install:
${INSTALL_PROGRAM} ${WRKSRC}/silq ${STAGEDIR}${PREFIX}/bin/

View file

@ -1,7 +1,7 @@
TIMESTAMP = 1592393472
SHA256 (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 6d6a287bc4e956414cecc0d4984b106d33f9da0b3825af4f9e638a83dd780361
SIZE (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 264879
SHA256 (tgehr-ast-2812b33_GH0.tar.gz) = 5dc2763272cd32b7dec0be08ede2155593b45795464615620658ddfe87b99580
SIZE (tgehr-ast-2812b33_GH0.tar.gz) = 72161
TIMESTAMP = 1592756190
SHA256 (eth-sri-silq-20200621-7331c54_GH0.tar.gz) = 3cc9869bb6902b09004c45a3e73ada272df8b0f03dcff03fd89e0c7d1bf25893
SIZE (eth-sri-silq-20200621-7331c54_GH0.tar.gz) = 265843
SHA256 (tgehr-ast-3018b4b_GH0.tar.gz) = 9328b7adf58a7077745c89f6bafa403bf0f9bb8f96468f2f035a1dced88c5eae
SIZE (tgehr-ast-3018b4b_GH0.tar.gz) = 72267
SHA256 (tgehr-util-27168af_GH0.tar.gz) = 78363e2ec4942698f66c798fff03ac652ed30173fc8759369709032295aa221a
SIZE (tgehr-util-27168af_GH0.tar.gz) = 9449

View file

@ -74,6 +74,14 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/g.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/h.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/i.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/c.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b1.slq
@ -104,6 +112,8 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/communicationGame.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockAssign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockCapture.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumingVector.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conv.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertForget.slq
@ -192,6 +202,7 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds9.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceIfFunctionCall.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/intUintBoolConversion.slq
@ -202,6 +213,7 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaEq.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthMismatch.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedAssign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConstArg.slq
@ -255,6 +267,7 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/piToRat.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/print.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qft.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumBitNotMinus.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumControlClassicalAssignment.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quid-updates.slq
@ -287,6 +300,7 @@ bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseImplicitForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseLifted.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseMeasureNonClassical.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePair.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase.slq