Udpate to sources as of today
This update attempts to fix a build error on FreeBSD-11 that appears to be caused by the D compiler creating object files that cannot be linked by the linker it invokes by default (GNU ld on FreeBSD-11). Approved by: antoine (implicit)
This commit is contained in:
parent
e2e38df01c
commit
16d15dc28a
Notes:
svn2git
2021-03-31 03:12:20 +00:00
svn path=/head/; revision=539773
3 changed files with 23 additions and 9 deletions
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@ -1,7 +1,7 @@
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# $FreeBSD$
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PORTNAME= silq
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PORTVERSION= 20200617
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PORTVERSION= 20200621
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CATEGORIES= lang math science
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MAINTAINER= se@FreeBSD.org
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@ -17,14 +17,14 @@ BUILD_DEPENDS= ldmd2:lang/ldc
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USE_GITHUB= yes
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GH_TUPLE= eth-sri:silq:27c399d \
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tgehr:ast:2812b33:ast/ast \
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GH_TUPLE= eth-sri:silq:7331c54 \
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tgehr:ast:3018b4b:ast/ast \
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tgehr:util:27168af:util/util
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OPTIONS_DEFINE= EXAMPLES
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do-build:
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cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -of=silq
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cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -linker=lld -of=silq
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do-install:
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${INSTALL_PROGRAM} ${WRKSRC}/silq ${STAGEDIR}${PREFIX}/bin/
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@ -1,7 +1,7 @@
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TIMESTAMP = 1592393472
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SHA256 (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 6d6a287bc4e956414cecc0d4984b106d33f9da0b3825af4f9e638a83dd780361
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SIZE (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 264879
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SHA256 (tgehr-ast-2812b33_GH0.tar.gz) = 5dc2763272cd32b7dec0be08ede2155593b45795464615620658ddfe87b99580
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SIZE (tgehr-ast-2812b33_GH0.tar.gz) = 72161
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TIMESTAMP = 1592756190
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SHA256 (eth-sri-silq-20200621-7331c54_GH0.tar.gz) = 3cc9869bb6902b09004c45a3e73ada272df8b0f03dcff03fd89e0c7d1bf25893
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SIZE (eth-sri-silq-20200621-7331c54_GH0.tar.gz) = 265843
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SHA256 (tgehr-ast-3018b4b_GH0.tar.gz) = 9328b7adf58a7077745c89f6bafa403bf0f9bb8f96468f2f035a1dced88c5eae
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SIZE (tgehr-ast-3018b4b_GH0.tar.gz) = 72267
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SHA256 (tgehr-util-27168af_GH0.tar.gz) = 78363e2ec4942698f66c798fff03ac652ed30173fc8759369709032295aa221a
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SIZE (tgehr-util-27168af_GH0.tar.gz) = 9449
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@ -74,6 +74,14 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/g.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/h.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/i.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a1.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a3.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a4.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a5.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b1.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/c.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a1.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b1.slq
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@ -104,6 +112,8 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/communicationGame.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockAssign.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockCapture.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumingVector.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conv.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertForget.slq
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@ -192,6 +202,7 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds7.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds8.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds9.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceIfFunctionCall.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/intUintBoolConversion.slq
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@ -202,6 +213,7 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite3.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite4.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaEq.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthMismatch.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedAssign.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConstArg.slq
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@ -255,6 +267,7 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/piToRat.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/print.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qft.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumBitNotMinus.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumControlClassicalAssignment.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quid-updates.slq
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@ -287,6 +300,7 @@ bin/silq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId3.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseImplicitForget.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseLifted.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseMeasureNonClassical.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePair.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase.slq
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