cad/veroroute: Update 1.86 -> 1.90
Reported by: upstream
This commit is contained in:
parent
1123ef7ccb
commit
1e68a83d90
Notes:
svn2git
2021-03-31 03:12:20 +00:00
svn path=/head/; revision=532614
3 changed files with 6 additions and 6 deletions
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@ -1,7 +1,7 @@
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# $FreeBSD$
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PORTNAME= veroroute
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PORTVERSION= 1.86
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PORTVERSION= 1.90
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PORTEPOCH= 1
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CATEGORIES= cad
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MASTER_SITES= SF/${PORTNAME}/
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@ -1,3 +1,3 @@
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TIMESTAMP = 1584320068
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SHA256 (VeroRoute_V186_Src.zip) = be95e383b04a8d7de8fb11852ef1feac29c152c94214e06a503b2f92e26a8f41
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SIZE (VeroRoute_V186_Src.zip) = 980967
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TIMESTAMP = 1587612602
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SHA256 (VeroRoute_V190_Src.zip) = 537ed18887bcf1453124b6b80b6c66ae8874ca2dfd80864f8aca8a882407bd83
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SIZE (VeroRoute_V190_Src.zip) = 1002812
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@ -82,9 +82,9 @@ share/gEDA/sym/veroroute_passive/Capacitor_Film_300.sym
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share/gEDA/sym/veroroute_passive/Crystal.sym
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share/gEDA/sym/veroroute_passive/Resistor.sym
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share/gEDA/sym/veroroute_passive/Resistor_100mil.sym
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share/gEDA/sym/veroroute_passive/Resistor_200mil .sym
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share/gEDA/sym/veroroute_passive/Resistor_200mil.sym
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share/gEDA/sym/veroroute_passive/Resistor_300mil.sym
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share/gEDA/sym/veroroute_passive/Resistor_400mil .sym
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share/gEDA/sym/veroroute_passive/Resistor_400mil.sym
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share/gEDA/sym/veroroute_regulator/LM137.sym
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share/gEDA/sym/veroroute_regulator/LM317.sym
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share/gEDA/sym/veroroute_regulator/LM336.sym
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