Emmanuel Vadot 2022-10-14 15:12:10 +02:00
parent d56435624e
commit 23e4dce35c
13 changed files with 303 additions and 84 deletions

View file

@ -27,33 +27,28 @@ ZSTD_MESON_ENABLED= zstd
.include <bsd.port.options.mk>
.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
ALL_DRI_DRIVERS= I915 I965 R100 R200
ALL_GALLIUM_DRIVERS= CROCUS IRIS PANFROST R300 R600 RADEONSI SVGA SWRAST
ALL_GALLIUM_DRIVERS= CROCUS IRIS PANFROST R300 R600 RADEONSI SVGA SWRAST ZINK
ALL_VULKAN_DRIVERS= INTEL AMD SWRAST
GALLIUM_DRIVERS+= SWRAST # llvmpipe
GALLIUM_DRIVERS+= SWRAST \
ZINK
VULKAN_DRIVERS+= SWRAST # lavapipe
.if ${ARCH:Marm*}
DRI_DRIVERS+= R100
.endif
.if ${ARCH} == aarch64
GALLIUM_DRIVERS+= PANFROST
.endif
.if ${ARCH} == aarch64 || ${ARCH} == amd64 || ${ARCH} == i386 \
|| ${ARCH:Mpowerpc*} || ${ARCH} == riscv64
DRI_DRIVERS+= R100 R200
GALLIUM_DRIVERS+= R300 R600 RADEONSI
VULKAN_DRIVERS+= AMD
BUILD_DEPENDS+= glslangValidator:graphics/glslang
. if ${PORT_OPTIONS:MPLATFORM_X11}
USE_XORG+= xv xvmc
MESON_ARGS+= -Dgallium-xvmc=enabled
. endif
.endif
.if ${ARCH} == amd64 || ${ARCH} == i386
DRI_DRIVERS+= I915 I965
GALLIUM_DRIVERS+= CROCUS IRIS SVGA
VULKAN_DRIVERS+= INTEL
.endif
@ -72,8 +67,7 @@ USE_XORG+= xcb xrandr
MESA_PLATFORMS+= wayland
.endif
MESON_ARGS+= -Ddri-drivers="${DRI_DRIVERS:ts,:tl}" \
-Dgallium-drivers="${GALLIUM_DRIVERS:ts,:tl}" \
MESON_ARGS+= -Dgallium-drivers="${GALLIUM_DRIVERS:ts,:tl}" \
-Dvulkan-drivers="${VULKAN_DRIVERS:ts,:tl}" \
-Dplatforms="${MESA_PLATFORMS:ts,:tl}"
@ -84,17 +78,7 @@ MESON_ARGS+= -Dgallium-xa=disabled \
-Dgles1=disabled \
-Dgles2=disabled \
-Dglx=disabled \
-Degl=disabled \
-Dosmesa=false \
-Dtools=""
.for _d in ${ALL_DRI_DRIVERS}
. if defined(DRI_DRIVERS) && ${DRI_DRIVERS:M${_d}}
PLIST_SUB+= ${_d}_DRIVER=""
. else
PLIST_SUB+= ${_d}_DRIVER="@comment "
. endif
.endfor
-Dosmesa=false
.for _gd in ${ALL_GALLIUM_DRIVERS}
. if defined(GALLIUM_DRIVERS) && ${GALLIUM_DRIVERS:M${_gd}}

View file

@ -12,7 +12,7 @@
MESAVERSION= ${MESABASEVERSION}${MESASUBVERSION:C/^(.)/.\1/}
MESADISTVERSION=${MESABASEVERSION}${MESASUBVERSION:C/^(.)/-\1/}
MESABASEVERSION= 21.3.8
MESABASEVERSION= 22.2.1
# if there is a subversion, don't include the '-' between 7.11-rc2.
MESASUBVERSION=

View file

@ -1,3 +1,3 @@
TIMESTAMP = 1647770617
SHA256 (mesa-21.3.8.tar.xz) = e70d273bdc53a4e931871bb5550ba3900e6a3deab2fff64184107c33e92d9da7
SIZE (mesa-21.3.8.tar.xz) = 16593540
TIMESTAMP = 1665746519
SHA256 (mesa-22.2.1.tar.xz) = 0079beac0a33f45e7e0aec59e6913eafbc4268a3f1e2e330017440494f91b13c
SIZE (mesa-22.2.1.tar.xz) = 16408240

View file

@ -0,0 +1,198 @@
--- include/drm-uapi/dma-buf.h.orig 2022-10-14 14:21:26 UTC
+++ include/drm-uapi/dma-buf.h
@@ -0,0 +1,195 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * Framework for buffer objects that can be shared across devices/subsystems.
+ *
+ * Copyright(C) 2015 Intel Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DMA_BUF_UAPI_H_
+#define _DMA_BUF_UAPI_H_
+
+#ifdef __linux__
+#include <linux/types.h>
+#else
+#include <sys/types.h>
+
+typedef int8_t __s8;
+typedef uint8_t __u8;
+typedef int16_t __s16;
+typedef uint16_t __u16;
+typedef int32_t __s32;
+typedef uint32_t __u32;
+typedef int64_t __s64;
+typedef uint64_t __u64;
+#endif
+
+/**
+ * struct dma_buf_sync - Synchronize with CPU access.
+ *
+ * When a DMA buffer is accessed from the CPU via mmap, it is not always
+ * possible to guarantee coherency between the CPU-visible map and underlying
+ * memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
+ * any CPU access to give the kernel the chance to shuffle memory around if
+ * needed.
+ *
+ * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
+ * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
+ * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
+ * DMA_BUF_SYNC_END and the same read/write flags.
+ *
+ * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
+ * coherency. It does not prevent other processes or devices from
+ * accessing the memory at the same time. If synchronization with a GPU or
+ * other device driver is required, it is the client's responsibility to
+ * wait for buffer to be ready for reading or writing before calling this
+ * ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
+ * follow-up work is not submitted to GPU or other device driver until
+ * after this ioctl has been called with DMA_BUF_SYNC_END?
+ *
+ * If the driver or API with which the client is interacting uses implicit
+ * synchronization, waiting for prior work to complete can be done via
+ * poll() on the DMA buffer file descriptor. If the driver or API requires
+ * explicit synchronization, the client may have to wait on a sync_file or
+ * other synchronization primitive outside the scope of the DMA buffer API.
+ */
+struct dma_buf_sync {
+ /**
+ * @flags: Set of access flags
+ *
+ * DMA_BUF_SYNC_START:
+ * Indicates the start of a map access session.
+ *
+ * DMA_BUF_SYNC_END:
+ * Indicates the end of a map access session.
+ *
+ * DMA_BUF_SYNC_READ:
+ * Indicates that the mapped DMA buffer will be read by the
+ * client via the CPU map.
+ *
+ * DMA_BUF_SYNC_WRITE:
+ * Indicates that the mapped DMA buffer will be written by the
+ * client via the CPU map.
+ *
+ * DMA_BUF_SYNC_RW:
+ * An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
+ */
+ __u64 flags;
+};
+
+#define DMA_BUF_SYNC_READ (1 << 0)
+#define DMA_BUF_SYNC_WRITE (2 << 0)
+#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
+#define DMA_BUF_SYNC_START (0 << 2)
+#define DMA_BUF_SYNC_END (1 << 2)
+#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
+ (DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
+
+#define DMA_BUF_NAME_LEN 32
+
+/**
+ * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
+ *
+ * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
+ * current set of fences on a dma-buf file descriptor as a sync_file. CPU
+ * waits via poll() or other driver-specific mechanisms typically wait on
+ * whatever fences are on the dma-buf at the time the wait begins. This
+ * is similar except that it takes a snapshot of the current fences on the
+ * dma-buf for waiting later instead of waiting immediately. This is
+ * useful for modern graphics APIs such as Vulkan which assume an explicit
+ * synchronization model but still need to inter-operate with dma-buf.
+ *
+ * The intended usage pattern is the following:
+ *
+ * 1. Export a sync_file with flags corresponding to the expected GPU usage
+ * via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
+ *
+ * 2. Submit rendering work which uses the dma-buf. The work should wait on
+ * the exported sync file before rendering and produce another sync_file
+ * when complete.
+ *
+ * 3. Import the rendering-complete sync_file into the dma-buf with flags
+ * corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
+ *
+ * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
+ * the above is not a single atomic operation. If userspace wants to ensure
+ * ordering via these fences, it is the respnosibility of userspace to use
+ * locks or other mechanisms to ensure that no other context adds fences or
+ * submits work between steps 1 and 3 above.
+ */
+struct dma_buf_export_sync_file {
+ /**
+ * @flags: Read/write flags
+ *
+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
+ *
+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
+ * the returned sync file waits on any writers of the dma-buf to
+ * complete. Waiting on the returned sync file is equivalent to
+ * poll() with POLLIN.
+ *
+ * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
+ * any users of the dma-buf (read or write) to complete. Waiting
+ * on the returned sync file is equivalent to poll() with POLLOUT.
+ * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
+ * is equivalent to just DMA_BUF_SYNC_WRITE.
+ */
+ __u32 flags;
+ /** @fd: Returned sync file descriptor */
+ __s32 fd;
+};
+
+/**
+ * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
+ *
+ * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
+ * sync_file into a dma-buf for the purposes of implicit synchronization
+ * with other dma-buf consumers. This allows clients using explicitly
+ * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
+ * which expect implicit synchronization such as OpenGL or most media
+ * drivers/video.
+ */
+struct dma_buf_import_sync_file {
+ /**
+ * @flags: Read/write flags
+ *
+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
+ *
+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
+ * this inserts the sync_file as a read-only fence. Any subsequent
+ * implicitly synchronized writes to this dma-buf will wait on this
+ * fence but reads will not.
+ *
+ * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
+ * write fence. All subsequent implicitly synchronized access to
+ * this dma-buf will wait on this fence.
+ */
+ __u32 flags;
+ /** @fd: Sync file descriptor */
+ __s32 fd;
+};
+
+#define DMA_BUF_BASE 'b'
+#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
+
+/* 32/64bitness of this uapi was botched in android, there's no difference
+ * between them in actual uapi, they're just different numbers.
+ */
+#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
+#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
+#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
+#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
+#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
+
+#endif

View file

@ -1,12 +1,14 @@
--- meson.build.orig 2022-03-18 19:26:47 UTC
--- meson.build.orig 2022-10-11 18:53:31 UTC
+++ meson.build
@@ -1414,11 +1414,42 @@ foreach f : ['strtof', 'mkostemp', 'timespec_get', 'me
endforeach
@@ -1436,7 +1436,6 @@ functions_to_detect = {
'flock': '',
'strtok_r': '',
'getrandom': '',
- 'qsort_r': '',
'qsort_s': '',
}
foreach f : ['strtof', 'mkostemp', 'timespec_get', 'memfd_create', 'random_r',
- 'flock', 'strtok_r', 'getrandom', 'qsort_r', 'qsort_s']
+ 'flock', 'strtok_r', 'getrandom', 'qsort_s']
if cc.has_function(f)
@@ -1445,6 +1444,37 @@ endforeach
pre_args += '-DHAVE_@0@'.format(f.to_upper())
endif
endforeach
@ -42,5 +44,5 @@
+ pre_args += '-DHAVE_BSD_QSORT_R'
+endif
if cc.has_header_symbol('errno.h', 'program_invocation_name',
args : '-D_GNU_SOURCE')
if cc.has_header_symbol('time.h', 'struct timespec')
pre_args += '-DHAVE_STRUCT_TIMESPEC'

View file

@ -1,6 +1,6 @@
--- src/gallium/drivers/llvmpipe/lp_rast_tri.c.orig 2021-07-21 11:06:08 UTC
--- src/gallium/drivers/llvmpipe/lp_rast_tri.c.orig 2022-10-11 18:53:31 UTC
+++ src/gallium/drivers/llvmpipe/lp_rast_tri.c
@@ -465,7 +465,9 @@ lp_rast_triangle_32_3_4(struct lp_rasterizer_task *tas
@@ -488,7 +488,9 @@ lp_rast_triangle_32_3_4(struct lp_rasterizer_task *tas
#if defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN

View file

@ -1,6 +1,6 @@
--- src/gallium/drivers/llvmpipe/lp_setup_tri.c.orig 2021-07-21 11:05:23 UTC
--- src/gallium/drivers/llvmpipe/lp_setup_tri.c.orig 2022-10-11 18:53:31 UTC
+++ src/gallium/drivers/llvmpipe/lp_setup_tri.c
@@ -47,7 +47,9 @@
@@ -46,7 +46,9 @@
#if defined(PIPE_ARCH_SSE)
#include <emmintrin.h>
#elif defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN

View file

@ -1,6 +1,6 @@
--- src/gallium/include/pipe/p_compiler.h.orig 2022-01-16 11:29:08 UTC
--- src/gallium/include/pipe/p_compiler.h.orig 2022-10-11 18:53:31 UTC
+++ src/gallium/include/pipe/p_compiler.h
@@ -170,7 +170,7 @@ typedef unsigned char boolean;
@@ -125,7 +125,7 @@ typedef unsigned char boolean;
* aligned, but we only want to align the field.
*/
#define EXCLUSIVE_CACHELINE(decl) \
@ -8,4 +8,4 @@
+ union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
decl; }
#if defined(__GNUC__)
#if defined(__cplusplus)

View file

@ -1,10 +1,11 @@
--- src/util/macros.h.orig 2022-01-16 11:28:56 UTC
--- src/util/macros.h.orig 2022-10-11 18:53:31 UTC
+++ src/util/macros.h
@@ -478,6 +478,6 @@ typedef int lock_cap_t;
@@ -448,7 +448,7 @@ typedef int lock_cap_t;
#endif
/* TODO: this could be different on non-x86 architectures. */
-#define CACHE_LINE_SIZE 64
+#define MESA_CACHE_LINE_SIZE 64
#endif /* UTIL_MACROS_H */
#define DO_PRAGMA(X) _Pragma (#X)

View file

@ -1,27 +0,0 @@
--- src/util/u_process.c.orig 2021-06-30 18:18:56 UTC
+++ src/util/u_process.c
@@ -94,22 +94,13 @@ __getProgramName()
# define GET_PROGRAM_NAME() __getProgramName()
#elif defined(HAVE_PROGRAM_INVOCATION_NAME)
# define GET_PROGRAM_NAME() program_invocation_short_name
-#elif defined(__FreeBSD__) && (__FreeBSD__ >= 2)
-# include <osreldate.h>
-# if (__FreeBSD_version >= 440000)
-# define GET_PROGRAM_NAME() getprogname()
-# endif
+#elif defined(__FreeBSD__) || defined(__DragonFly__) || defined(__APPLE__) || defined(ANDROID)
+# define GET_PROGRAM_NAME() getprogname()
#elif defined(__NetBSD__)
# include <sys/param.h>
# if defined(__NetBSD_Version__) && (__NetBSD_Version__ >= 106000100)
# define GET_PROGRAM_NAME() getprogname()
# endif
-#elif defined(__DragonFly__)
-# define GET_PROGRAM_NAME() getprogname()
-#elif defined(__APPLE__)
-# define GET_PROGRAM_NAME() getprogname()
-#elif defined(ANDROID)
-# define GET_PROGRAM_NAME() getprogname()
#elif defined(__sun)
/* Solaris has getexecname() which returns the full path - return just
the basename to match BSD getprogname() */

View file

@ -0,0 +1,61 @@
--- src/vulkan/wsi/wsi_common_drm.c.orig 2022-10-11 18:53:31 UTC
+++ src/vulkan/wsi/wsi_common_drm.c
@@ -30,29 +30,15 @@
#include "vk_physical_device.h"
#include "vk_util.h"
#include "drm-uapi/drm_fourcc.h"
+#include "drm-uapi/dma-buf.h"
#include <errno.h>
-#include <linux/dma-buf.h>
-#include <linux/sync_file.h>
#include <time.h>
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <xf86drm.h>
-struct dma_buf_export_sync_file_wsi {
- __u32 flags;
- __s32 fd;
-};
-
-struct dma_buf_import_sync_file_wsi {
- __u32 flags;
- __s32 fd;
-};
-
-#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file_wsi)
-#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file_wsi)
-
static VkResult
wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync_file_fd)
{
@@ -61,11 +47,11 @@ wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync
if (no_dma_buf_sync_file)
return VK_ERROR_FEATURE_NOT_PRESENT;
- struct dma_buf_export_sync_file_wsi export = {
+ struct dma_buf_export_sync_file export = {
.flags = DMA_BUF_SYNC_RW,
.fd = -1,
};
- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI, &export);
+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE, &export);
if (ret) {
if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
no_dma_buf_sync_file = true;
@@ -88,11 +74,11 @@ wsi_dma_buf_import_sync_file(int dma_buf_fd, int sync_
if (no_dma_buf_sync_file)
return VK_ERROR_FEATURE_NOT_PRESENT;
- struct dma_buf_import_sync_file_wsi import = {
+ struct dma_buf_import_sync_file import = {
.flags = DMA_BUF_SYNC_RW,
.fd = sync_file_fd,
};
- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI, &import);
+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE, &import);
if (ret) {
if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
no_dma_buf_sync_file = true;

View file

@ -1,24 +1,25 @@
@comment include/EGL/egl.h
@comment include/EGL/eglext.h
@comment include/EGL/eglextchromium.h
@comment include/EGL/eglmesaext.h
@comment include/EGL/eglplatform.h
include/GL/internal/dri_interface.h
@comment include/GL/gl.h
@comment include/GL/glcorearb.h
@comment include/GL/glext.h
include/GL/internal/dri_interface.h
@comment include/KHR/khrplatform.h
@comment include/gbm.h
%%CROCUS_GDRIVER%%lib/dri/crocus_dri.so
%%I915_DRIVER%%lib/dri/i830_dri.so
%%I915_DRIVER%%lib/dri/i915_dri.so
%%I965_DRIVER%%lib/dri/i965_dri.so
%%IRIS_GDRIVER%%lib/dri/iris_dri.so
%%PANFROST_GDRIVER%%lib/dri/panfrost_dri.so
%%PANFROST_GDRIVER%%lib/dri/rockchip_dri.so
%%SWRAST_GDRIVER%%lib/dri/kms_swrast_dri.so
%%R200_DRIVER%%lib/dri/r200_dri.so
%%R300_GDRIVER%%lib/dri/r300_dri.so
%%R600_GDRIVER%%lib/dri/r600_dri.so
%%R100_DRIVER%%lib/dri/radeon_dri.so
%%RADEONSI_GDRIVER%%lib/dri/radeonsi_dri.so
%%SWRAST_GDRIVER%%lib/dri/swrast_dri.so
%%SVGA_GDRIVER%%lib/dri/vmwgfx_dri.so
%%ZINK_GDRIVER%%lib/dri/zink_dri.so
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so.1
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so.1.0
@ -33,6 +34,7 @@ include/GL/internal/dri_interface.h
%%AMD_VDRIVER%%lib/libvulkan_radeon.so
%%SWRAST_VDRIVER%%lib/libvulkan_lvp.so
libdata/pkgconfig/dri.pc
@comment libdata/pkgconfig/egl.pc
@comment libdata/pkgconfig/gbm.pc
share/drirc.d/00-mesa-defaults.conf
%%AMD_VDRIVER%%share/drirc.d/00-radv-defaults.conf

View file

@ -29,8 +29,7 @@ ZSTD_MESON_ENABLED= zstd
.include <bsd.port.options.mk>
.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
MESON_ARGS+= -Dgallium-drivers="" \
-Dgallium-vdpau=disabled \
MESON_ARGS+= -Dgallium-vdpau=disabled \
-Dgallium-xvmc=disabled \
-Dgallium-omx=disabled \
-Dgallium-va=disabled \
@ -41,10 +40,9 @@ MESON_ARGS+= -Dgallium-drivers="" \
-Degl=enabled \
-Dgbm=enabled \
-Dvulkan-drivers="" \
-Dglvnd=true \
-Dprefer-iris=true
# Building EGL and GBM requires a dri driver so add r100
MESON_ARGS+= -Ddri-drivers="r100"
-Dglvnd=true
# Building EGL and GBM requires a driver so add r300
MESON_ARGS+= -Dgallium-drivers="r300"
.if ${PORT_OPTIONS:MPLATFORM_X11}
MESA_PLATFORMS+= x11