graphics/mesa: Update to 22.2.1
This removes the old dri drivers. While here add zink (OpenGL over Vulkan). Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-March/000665.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-March/000667.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-April/000670.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-May/000673.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-May/000675.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-June/000678.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-June/000681.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-June/000682.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-August/000683.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-August/000685.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-September/000687.html Release notes: https://lists.freedesktop.org/archives/mesa-announce/2022-October/000688.html Differential Revision: https://reviews.freebsd.org/D37003 Sponsored by: Beckhoff Automation GmbH & Co. KG
This commit is contained in:
parent
d56435624e
commit
23e4dce35c
13 changed files with 303 additions and 84 deletions
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@ -27,33 +27,28 @@ ZSTD_MESON_ENABLED= zstd
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.include <bsd.port.options.mk>
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.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
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ALL_DRI_DRIVERS= I915 I965 R100 R200
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ALL_GALLIUM_DRIVERS= CROCUS IRIS PANFROST R300 R600 RADEONSI SVGA SWRAST
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ALL_GALLIUM_DRIVERS= CROCUS IRIS PANFROST R300 R600 RADEONSI SVGA SWRAST ZINK
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ALL_VULKAN_DRIVERS= INTEL AMD SWRAST
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GALLIUM_DRIVERS+= SWRAST # llvmpipe
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GALLIUM_DRIVERS+= SWRAST \
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ZINK
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VULKAN_DRIVERS+= SWRAST # lavapipe
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.if ${ARCH:Marm*}
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DRI_DRIVERS+= R100
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.endif
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.if ${ARCH} == aarch64
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GALLIUM_DRIVERS+= PANFROST
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.endif
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.if ${ARCH} == aarch64 || ${ARCH} == amd64 || ${ARCH} == i386 \
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|| ${ARCH:Mpowerpc*} || ${ARCH} == riscv64
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DRI_DRIVERS+= R100 R200
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GALLIUM_DRIVERS+= R300 R600 RADEONSI
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VULKAN_DRIVERS+= AMD
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BUILD_DEPENDS+= glslangValidator:graphics/glslang
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. if ${PORT_OPTIONS:MPLATFORM_X11}
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USE_XORG+= xv xvmc
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MESON_ARGS+= -Dgallium-xvmc=enabled
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. endif
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.endif
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.if ${ARCH} == amd64 || ${ARCH} == i386
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DRI_DRIVERS+= I915 I965
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GALLIUM_DRIVERS+= CROCUS IRIS SVGA
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VULKAN_DRIVERS+= INTEL
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.endif
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@ -72,8 +67,7 @@ USE_XORG+= xcb xrandr
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MESA_PLATFORMS+= wayland
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.endif
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MESON_ARGS+= -Ddri-drivers="${DRI_DRIVERS:ts,:tl}" \
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-Dgallium-drivers="${GALLIUM_DRIVERS:ts,:tl}" \
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MESON_ARGS+= -Dgallium-drivers="${GALLIUM_DRIVERS:ts,:tl}" \
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-Dvulkan-drivers="${VULKAN_DRIVERS:ts,:tl}" \
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-Dplatforms="${MESA_PLATFORMS:ts,:tl}"
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@ -84,17 +78,7 @@ MESON_ARGS+= -Dgallium-xa=disabled \
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-Dgles1=disabled \
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-Dgles2=disabled \
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-Dglx=disabled \
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-Degl=disabled \
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-Dosmesa=false \
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-Dtools=""
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.for _d in ${ALL_DRI_DRIVERS}
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. if defined(DRI_DRIVERS) && ${DRI_DRIVERS:M${_d}}
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PLIST_SUB+= ${_d}_DRIVER=""
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. else
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PLIST_SUB+= ${_d}_DRIVER="@comment "
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. endif
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.endfor
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-Dosmesa=false
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.for _gd in ${ALL_GALLIUM_DRIVERS}
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. if defined(GALLIUM_DRIVERS) && ${GALLIUM_DRIVERS:M${_gd}}
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@ -12,7 +12,7 @@
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MESAVERSION= ${MESABASEVERSION}${MESASUBVERSION:C/^(.)/.\1/}
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MESADISTVERSION=${MESABASEVERSION}${MESASUBVERSION:C/^(.)/-\1/}
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MESABASEVERSION= 21.3.8
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MESABASEVERSION= 22.2.1
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# if there is a subversion, don't include the '-' between 7.11-rc2.
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MESASUBVERSION=
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@ -1,3 +1,3 @@
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TIMESTAMP = 1647770617
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SHA256 (mesa-21.3.8.tar.xz) = e70d273bdc53a4e931871bb5550ba3900e6a3deab2fff64184107c33e92d9da7
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SIZE (mesa-21.3.8.tar.xz) = 16593540
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TIMESTAMP = 1665746519
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SHA256 (mesa-22.2.1.tar.xz) = 0079beac0a33f45e7e0aec59e6913eafbc4268a3f1e2e330017440494f91b13c
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SIZE (mesa-22.2.1.tar.xz) = 16408240
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198
graphics/mesa-dri/files/patch-include_drm-uapi_dma-buf.h
Normal file
198
graphics/mesa-dri/files/patch-include_drm-uapi_dma-buf.h
Normal file
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@ -0,0 +1,198 @@
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--- include/drm-uapi/dma-buf.h.orig 2022-10-14 14:21:26 UTC
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+++ include/drm-uapi/dma-buf.h
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@@ -0,0 +1,195 @@
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+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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+/*
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+ * Framework for buffer objects that can be shared across devices/subsystems.
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+ *
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+ * Copyright(C) 2015 Intel Ltd
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published by
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+ * the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along with
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+ * this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#ifndef _DMA_BUF_UAPI_H_
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+#define _DMA_BUF_UAPI_H_
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+
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+#ifdef __linux__
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+#include <linux/types.h>
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+#else
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+#include <sys/types.h>
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+
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+typedef int8_t __s8;
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+typedef uint8_t __u8;
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+typedef int16_t __s16;
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+typedef uint16_t __u16;
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+typedef int32_t __s32;
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+typedef uint32_t __u32;
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+typedef int64_t __s64;
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+typedef uint64_t __u64;
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+#endif
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+
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+/**
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+ * struct dma_buf_sync - Synchronize with CPU access.
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+ *
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+ * When a DMA buffer is accessed from the CPU via mmap, it is not always
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+ * possible to guarantee coherency between the CPU-visible map and underlying
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+ * memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
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+ * any CPU access to give the kernel the chance to shuffle memory around if
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+ * needed.
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+ *
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+ * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
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+ * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
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+ * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
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+ * DMA_BUF_SYNC_END and the same read/write flags.
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+ *
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+ * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
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+ * coherency. It does not prevent other processes or devices from
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+ * accessing the memory at the same time. If synchronization with a GPU or
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+ * other device driver is required, it is the client's responsibility to
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+ * wait for buffer to be ready for reading or writing before calling this
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+ * ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
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+ * follow-up work is not submitted to GPU or other device driver until
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+ * after this ioctl has been called with DMA_BUF_SYNC_END?
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+ *
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+ * If the driver or API with which the client is interacting uses implicit
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+ * synchronization, waiting for prior work to complete can be done via
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+ * poll() on the DMA buffer file descriptor. If the driver or API requires
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+ * explicit synchronization, the client may have to wait on a sync_file or
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+ * other synchronization primitive outside the scope of the DMA buffer API.
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+ */
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+struct dma_buf_sync {
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+ /**
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+ * @flags: Set of access flags
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+ *
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+ * DMA_BUF_SYNC_START:
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+ * Indicates the start of a map access session.
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+ *
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+ * DMA_BUF_SYNC_END:
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+ * Indicates the end of a map access session.
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+ *
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+ * DMA_BUF_SYNC_READ:
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+ * Indicates that the mapped DMA buffer will be read by the
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+ * client via the CPU map.
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+ *
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+ * DMA_BUF_SYNC_WRITE:
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+ * Indicates that the mapped DMA buffer will be written by the
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+ * client via the CPU map.
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+ *
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+ * DMA_BUF_SYNC_RW:
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+ * An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
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+ */
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+ __u64 flags;
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+};
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+
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+#define DMA_BUF_SYNC_READ (1 << 0)
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+#define DMA_BUF_SYNC_WRITE (2 << 0)
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+#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
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+#define DMA_BUF_SYNC_START (0 << 2)
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+#define DMA_BUF_SYNC_END (1 << 2)
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+#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
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+ (DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
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+
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+#define DMA_BUF_NAME_LEN 32
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+
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+/**
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+ * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
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+ *
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+ * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
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+ * current set of fences on a dma-buf file descriptor as a sync_file. CPU
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+ * waits via poll() or other driver-specific mechanisms typically wait on
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+ * whatever fences are on the dma-buf at the time the wait begins. This
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+ * is similar except that it takes a snapshot of the current fences on the
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+ * dma-buf for waiting later instead of waiting immediately. This is
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+ * useful for modern graphics APIs such as Vulkan which assume an explicit
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+ * synchronization model but still need to inter-operate with dma-buf.
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+ *
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+ * The intended usage pattern is the following:
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+ *
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+ * 1. Export a sync_file with flags corresponding to the expected GPU usage
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+ * via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
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+ *
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+ * 2. Submit rendering work which uses the dma-buf. The work should wait on
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+ * the exported sync file before rendering and produce another sync_file
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+ * when complete.
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+ *
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+ * 3. Import the rendering-complete sync_file into the dma-buf with flags
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+ * corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
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+ *
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+ * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
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+ * the above is not a single atomic operation. If userspace wants to ensure
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+ * ordering via these fences, it is the respnosibility of userspace to use
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+ * locks or other mechanisms to ensure that no other context adds fences or
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+ * submits work between steps 1 and 3 above.
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+ */
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+struct dma_buf_export_sync_file {
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+ /**
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+ * @flags: Read/write flags
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+ *
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+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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+ *
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+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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+ * the returned sync file waits on any writers of the dma-buf to
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+ * complete. Waiting on the returned sync file is equivalent to
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+ * poll() with POLLIN.
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+ *
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+ * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
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+ * any users of the dma-buf (read or write) to complete. Waiting
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+ * on the returned sync file is equivalent to poll() with POLLOUT.
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+ * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
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+ * is equivalent to just DMA_BUF_SYNC_WRITE.
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+ */
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+ __u32 flags;
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+ /** @fd: Returned sync file descriptor */
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+ __s32 fd;
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+};
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+
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+/**
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+ * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
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+ *
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+ * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
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+ * sync_file into a dma-buf for the purposes of implicit synchronization
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+ * with other dma-buf consumers. This allows clients using explicitly
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+ * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
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+ * which expect implicit synchronization such as OpenGL or most media
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+ * drivers/video.
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+ */
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+struct dma_buf_import_sync_file {
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+ /**
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+ * @flags: Read/write flags
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+ *
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+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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+ *
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+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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+ * this inserts the sync_file as a read-only fence. Any subsequent
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+ * implicitly synchronized writes to this dma-buf will wait on this
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+ * fence but reads will not.
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+ *
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+ * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
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+ * write fence. All subsequent implicitly synchronized access to
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+ * this dma-buf will wait on this fence.
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+ */
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+ __u32 flags;
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+ /** @fd: Sync file descriptor */
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+ __s32 fd;
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+};
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+
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+#define DMA_BUF_BASE 'b'
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+#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
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+
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+/* 32/64bitness of this uapi was botched in android, there's no difference
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+ * between them in actual uapi, they're just different numbers.
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+ */
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+#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
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+#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
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+#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
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+#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
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+#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
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+
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+#endif
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@ -1,12 +1,14 @@
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--- meson.build.orig 2022-03-18 19:26:47 UTC
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--- meson.build.orig 2022-10-11 18:53:31 UTC
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+++ meson.build
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@@ -1414,11 +1414,42 @@ foreach f : ['strtof', 'mkostemp', 'timespec_get', 'me
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endforeach
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@@ -1436,7 +1436,6 @@ functions_to_detect = {
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'flock': '',
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'strtok_r': '',
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'getrandom': '',
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- 'qsort_r': '',
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'qsort_s': '',
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}
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foreach f : ['strtof', 'mkostemp', 'timespec_get', 'memfd_create', 'random_r',
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- 'flock', 'strtok_r', 'getrandom', 'qsort_r', 'qsort_s']
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+ 'flock', 'strtok_r', 'getrandom', 'qsort_s']
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if cc.has_function(f)
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@@ -1445,6 +1444,37 @@ endforeach
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pre_args += '-DHAVE_@0@'.format(f.to_upper())
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endif
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endforeach
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@ -42,5 +44,5 @@
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+ pre_args += '-DHAVE_BSD_QSORT_R'
|
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+endif
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if cc.has_header_symbol('errno.h', 'program_invocation_name',
|
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args : '-D_GNU_SOURCE')
|
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if cc.has_header_symbol('time.h', 'struct timespec')
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pre_args += '-DHAVE_STRUCT_TIMESPEC'
|
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|
|
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@ -1,6 +1,6 @@
|
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--- src/gallium/drivers/llvmpipe/lp_rast_tri.c.orig 2021-07-21 11:06:08 UTC
|
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--- src/gallium/drivers/llvmpipe/lp_rast_tri.c.orig 2022-10-11 18:53:31 UTC
|
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+++ src/gallium/drivers/llvmpipe/lp_rast_tri.c
|
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@@ -465,7 +465,9 @@ lp_rast_triangle_32_3_4(struct lp_rasterizer_task *tas
|
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@@ -488,7 +488,9 @@ lp_rast_triangle_32_3_4(struct lp_rasterizer_task *tas
|
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|
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#if defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN
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|
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|
|
|
@ -1,6 +1,6 @@
|
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--- src/gallium/drivers/llvmpipe/lp_setup_tri.c.orig 2021-07-21 11:05:23 UTC
|
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--- src/gallium/drivers/llvmpipe/lp_setup_tri.c.orig 2022-10-11 18:53:31 UTC
|
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+++ src/gallium/drivers/llvmpipe/lp_setup_tri.c
|
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@@ -47,7 +47,9 @@
|
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@@ -46,7 +46,9 @@
|
||||
#if defined(PIPE_ARCH_SSE)
|
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#include <emmintrin.h>
|
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#elif defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN
|
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|
|
|
@ -1,6 +1,6 @@
|
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--- src/gallium/include/pipe/p_compiler.h.orig 2022-01-16 11:29:08 UTC
|
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--- src/gallium/include/pipe/p_compiler.h.orig 2022-10-11 18:53:31 UTC
|
||||
+++ src/gallium/include/pipe/p_compiler.h
|
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@@ -170,7 +170,7 @@ typedef unsigned char boolean;
|
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@@ -125,7 +125,7 @@ typedef unsigned char boolean;
|
||||
* aligned, but we only want to align the field.
|
||||
*/
|
||||
#define EXCLUSIVE_CACHELINE(decl) \
|
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|
@ -8,4 +8,4 @@
|
|||
+ union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
|
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decl; }
|
||||
|
||||
#if defined(__GNUC__)
|
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#if defined(__cplusplus)
|
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|
|
|
@ -1,10 +1,11 @@
|
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--- src/util/macros.h.orig 2022-01-16 11:28:56 UTC
|
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--- src/util/macros.h.orig 2022-10-11 18:53:31 UTC
|
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+++ src/util/macros.h
|
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@@ -478,6 +478,6 @@ typedef int lock_cap_t;
|
||||
@@ -448,7 +448,7 @@ typedef int lock_cap_t;
|
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#endif
|
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|
||||
/* TODO: this could be different on non-x86 architectures. */
|
||||
-#define CACHE_LINE_SIZE 64
|
||||
+#define MESA_CACHE_LINE_SIZE 64
|
||||
|
||||
#endif /* UTIL_MACROS_H */
|
||||
#define DO_PRAGMA(X) _Pragma (#X)
|
||||
|
||||
|
|
|
@ -1,27 +0,0 @@
|
|||
--- src/util/u_process.c.orig 2021-06-30 18:18:56 UTC
|
||||
+++ src/util/u_process.c
|
||||
@@ -94,22 +94,13 @@ __getProgramName()
|
||||
# define GET_PROGRAM_NAME() __getProgramName()
|
||||
#elif defined(HAVE_PROGRAM_INVOCATION_NAME)
|
||||
# define GET_PROGRAM_NAME() program_invocation_short_name
|
||||
-#elif defined(__FreeBSD__) && (__FreeBSD__ >= 2)
|
||||
-# include <osreldate.h>
|
||||
-# if (__FreeBSD_version >= 440000)
|
||||
-# define GET_PROGRAM_NAME() getprogname()
|
||||
-# endif
|
||||
+#elif defined(__FreeBSD__) || defined(__DragonFly__) || defined(__APPLE__) || defined(ANDROID)
|
||||
+# define GET_PROGRAM_NAME() getprogname()
|
||||
#elif defined(__NetBSD__)
|
||||
# include <sys/param.h>
|
||||
# if defined(__NetBSD_Version__) && (__NetBSD_Version__ >= 106000100)
|
||||
# define GET_PROGRAM_NAME() getprogname()
|
||||
# endif
|
||||
-#elif defined(__DragonFly__)
|
||||
-# define GET_PROGRAM_NAME() getprogname()
|
||||
-#elif defined(__APPLE__)
|
||||
-# define GET_PROGRAM_NAME() getprogname()
|
||||
-#elif defined(ANDROID)
|
||||
-# define GET_PROGRAM_NAME() getprogname()
|
||||
#elif defined(__sun)
|
||||
/* Solaris has getexecname() which returns the full path - return just
|
||||
the basename to match BSD getprogname() */
|
|
@ -0,0 +1,61 @@
|
|||
--- src/vulkan/wsi/wsi_common_drm.c.orig 2022-10-11 18:53:31 UTC
|
||||
+++ src/vulkan/wsi/wsi_common_drm.c
|
||||
@@ -30,29 +30,15 @@
|
||||
#include "vk_physical_device.h"
|
||||
#include "vk_util.h"
|
||||
#include "drm-uapi/drm_fourcc.h"
|
||||
+#include "drm-uapi/dma-buf.h"
|
||||
|
||||
#include <errno.h>
|
||||
-#include <linux/dma-buf.h>
|
||||
-#include <linux/sync_file.h>
|
||||
#include <time.h>
|
||||
#include <unistd.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <xf86drm.h>
|
||||
|
||||
-struct dma_buf_export_sync_file_wsi {
|
||||
- __u32 flags;
|
||||
- __s32 fd;
|
||||
-};
|
||||
-
|
||||
-struct dma_buf_import_sync_file_wsi {
|
||||
- __u32 flags;
|
||||
- __s32 fd;
|
||||
-};
|
||||
-
|
||||
-#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file_wsi)
|
||||
-#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file_wsi)
|
||||
-
|
||||
static VkResult
|
||||
wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync_file_fd)
|
||||
{
|
||||
@@ -61,11 +47,11 @@ wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync
|
||||
if (no_dma_buf_sync_file)
|
||||
return VK_ERROR_FEATURE_NOT_PRESENT;
|
||||
|
||||
- struct dma_buf_export_sync_file_wsi export = {
|
||||
+ struct dma_buf_export_sync_file export = {
|
||||
.flags = DMA_BUF_SYNC_RW,
|
||||
.fd = -1,
|
||||
};
|
||||
- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI, &export);
|
||||
+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE, &export);
|
||||
if (ret) {
|
||||
if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
|
||||
no_dma_buf_sync_file = true;
|
||||
@@ -88,11 +74,11 @@ wsi_dma_buf_import_sync_file(int dma_buf_fd, int sync_
|
||||
if (no_dma_buf_sync_file)
|
||||
return VK_ERROR_FEATURE_NOT_PRESENT;
|
||||
|
||||
- struct dma_buf_import_sync_file_wsi import = {
|
||||
+ struct dma_buf_import_sync_file import = {
|
||||
.flags = DMA_BUF_SYNC_RW,
|
||||
.fd = sync_file_fd,
|
||||
};
|
||||
- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI, &import);
|
||||
+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE, &import);
|
||||
if (ret) {
|
||||
if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
|
||||
no_dma_buf_sync_file = true;
|
|
@ -1,24 +1,25 @@
|
|||
@comment include/EGL/egl.h
|
||||
@comment include/EGL/eglext.h
|
||||
@comment include/EGL/eglextchromium.h
|
||||
@comment include/EGL/eglmesaext.h
|
||||
@comment include/EGL/eglplatform.h
|
||||
include/GL/internal/dri_interface.h
|
||||
@comment include/GL/gl.h
|
||||
@comment include/GL/glcorearb.h
|
||||
@comment include/GL/glext.h
|
||||
include/GL/internal/dri_interface.h
|
||||
@comment include/KHR/khrplatform.h
|
||||
@comment include/gbm.h
|
||||
%%CROCUS_GDRIVER%%lib/dri/crocus_dri.so
|
||||
%%I915_DRIVER%%lib/dri/i830_dri.so
|
||||
%%I915_DRIVER%%lib/dri/i915_dri.so
|
||||
%%I965_DRIVER%%lib/dri/i965_dri.so
|
||||
%%IRIS_GDRIVER%%lib/dri/iris_dri.so
|
||||
%%PANFROST_GDRIVER%%lib/dri/panfrost_dri.so
|
||||
%%PANFROST_GDRIVER%%lib/dri/rockchip_dri.so
|
||||
%%SWRAST_GDRIVER%%lib/dri/kms_swrast_dri.so
|
||||
%%R200_DRIVER%%lib/dri/r200_dri.so
|
||||
%%R300_GDRIVER%%lib/dri/r300_dri.so
|
||||
%%R600_GDRIVER%%lib/dri/r600_dri.so
|
||||
%%R100_DRIVER%%lib/dri/radeon_dri.so
|
||||
%%RADEONSI_GDRIVER%%lib/dri/radeonsi_dri.so
|
||||
%%SWRAST_GDRIVER%%lib/dri/swrast_dri.so
|
||||
%%SVGA_GDRIVER%%lib/dri/vmwgfx_dri.so
|
||||
%%ZINK_GDRIVER%%lib/dri/zink_dri.so
|
||||
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so
|
||||
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so.1
|
||||
%%PLATFORM_X11%%%%R600_GDRIVER%%lib/libXvMCr600.so.1.0
|
||||
|
@ -33,6 +34,7 @@ include/GL/internal/dri_interface.h
|
|||
%%AMD_VDRIVER%%lib/libvulkan_radeon.so
|
||||
%%SWRAST_VDRIVER%%lib/libvulkan_lvp.so
|
||||
libdata/pkgconfig/dri.pc
|
||||
@comment libdata/pkgconfig/egl.pc
|
||||
@comment libdata/pkgconfig/gbm.pc
|
||||
share/drirc.d/00-mesa-defaults.conf
|
||||
%%AMD_VDRIVER%%share/drirc.d/00-radv-defaults.conf
|
||||
|
|
|
@ -29,8 +29,7 @@ ZSTD_MESON_ENABLED= zstd
|
|||
.include <bsd.port.options.mk>
|
||||
.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
|
||||
|
||||
MESON_ARGS+= -Dgallium-drivers="" \
|
||||
-Dgallium-vdpau=disabled \
|
||||
MESON_ARGS+= -Dgallium-vdpau=disabled \
|
||||
-Dgallium-xvmc=disabled \
|
||||
-Dgallium-omx=disabled \
|
||||
-Dgallium-va=disabled \
|
||||
|
@ -41,10 +40,9 @@ MESON_ARGS+= -Dgallium-drivers="" \
|
|||
-Degl=enabled \
|
||||
-Dgbm=enabled \
|
||||
-Dvulkan-drivers="" \
|
||||
-Dglvnd=true \
|
||||
-Dprefer-iris=true
|
||||
# Building EGL and GBM requires a dri driver so add r100
|
||||
MESON_ARGS+= -Ddri-drivers="r100"
|
||||
-Dglvnd=true
|
||||
# Building EGL and GBM requires a driver so add r300
|
||||
MESON_ARGS+= -Dgallium-drivers="r300"
|
||||
|
||||
.if ${PORT_OPTIONS:MPLATFORM_X11}
|
||||
MESA_PLATFORMS+= x11
|
||||
|
|
Loading…
Reference in a new issue