www/chromium: Fix aarch64 by reapplying r527876
It was lost in the 80.x update, unfortunately. Mea culpa. Reported by: mikael Discussed with: jrm Approved by: mikael Differential Revision: https://reviews.freebsd.org/D24026
This commit is contained in:
Conrad Meyer
parent
88cc445eec
commit
2b7ee102cf
Notes:
svn2git
2021-03-31 03:12:20 +00:00
svn path=/head/; revision=528250
3 changed files with 61 additions and 33 deletions
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@ -1,6 +1,6 @@
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--- third_party/boringssl/src/crypto/cpu-aarch64-linux.c.orig 2020-03-03 18:55:22 UTC
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+++ third_party/boringssl/src/crypto/cpu-aarch64-linux.c
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@@ -14,49 +14,35 @@
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@@ -14,49 +14,45 @@
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#include <openssl/cpu.h>
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@ -17,12 +17,10 @@
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-
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extern uint32_t OPENSSL_armcap_P;
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-void OPENSSL_cpuid_setup(void) {
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- unsigned long hwcap = getauxval(AT_HWCAP);
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+#include <sys/types.h>
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+#include <machine/armreg.h>
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+
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void OPENSSL_cpuid_setup(void) {
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- unsigned long hwcap = getauxval(AT_HWCAP);
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+ uint64_t id_aa64isar0;
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- // See /usr/include/asm/hwcap.h on an aarch64 installation for the source of
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- // these values.
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@ -31,30 +29,42 @@
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- static const unsigned long kPMULL = 1 << 4;
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- static const unsigned long kSHA1 = 1 << 5;
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- static const unsigned long kSHA256 = 1 << 6;
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+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
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+#ifndef ID_AA64ISAR0_AES_VAL
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+#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
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+#endif
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+#ifndef ID_AA64ISAR0_SHA1_VAL
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+#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1
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+#endif
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+#ifndef ID_AA64ISAR0_SHA2_VAL
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+#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2
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+#endif
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- if ((hwcap & kNEON) == 0) {
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- // Matching OpenSSL, if NEON is missing, don't report other features
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- // either.
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- return;
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- }
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-
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+void OPENSSL_cpuid_setup(void) {
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+ uint64_t id_aa64isar0;
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+ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
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+
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OPENSSL_armcap_P |= ARMV7_NEON;
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- if (hwcap & kAES) {
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+ if (ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) {
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+ if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) {
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OPENSSL_armcap_P |= ARMV8_AES;
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}
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- if (hwcap & kPMULL) {
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+ if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
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+ if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
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OPENSSL_armcap_P |= ARMV8_PMULL;
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}
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- if (hwcap & kSHA1) {
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+ if (ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
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+ if (ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
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OPENSSL_armcap_P |= ARMV8_SHA1;
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}
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- if (hwcap & kSHA256) {
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+ if(ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) {
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+ if(ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) {
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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}
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@ -9,7 +9,7 @@
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#include <cstddef>
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#include <cstdint>
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@@ -16,30 +14,19 @@
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@@ -16,30 +14,25 @@
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#if HAVE_ARM64_CRC32C
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@ -19,12 +19,18 @@
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-// getauxval() is not available on Android until API level 20. Link it as a weak
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-// symbol.
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-extern "C" unsigned long getauxval(unsigned long type) __attribute__((weak));
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-
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+#include <sys/types.h>
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+#include <machine/armreg.h>
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-#define AT_HWCAP 16
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-#endif // HAVE_STRONG_GETAUXVAL || HAVE_WEAK_GETAUXVAL
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-
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+#include <machine/armreg.h>
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+#include <sys/types.h>
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+#ifndef ID_AA64ISAR0_AES_VAL
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+#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
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+#endif
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+#ifndef ID_AA64ISAR0_CRC32_VAL
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+#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
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+#endif
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namespace crc32c {
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-inline bool CanUseArm64Linux() {
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@ -42,11 +48,9 @@
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+ inline bool CanUseArm64Linux() {
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+ uint64_t id_aa64isar0;
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+
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+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
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+ if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
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+ (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
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+ return true;
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+ return false;
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+ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
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+ return ((ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) &&
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+ (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE));
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+ }
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} // namespace crc32c
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@ -1,39 +1,53 @@
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--- third_party/zlib/arm_features.c.orig 2020-03-03 18:54:06 UTC
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+++ third_party/zlib/arm_features.c
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@@ -16,6 +16,10 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
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@@ -12,10 +12,24 @@
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int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
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int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
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+/*
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+ * FreeBSD: we implicitly inherit ARMV8_OS_LINUX via zlib/BUILD.gn and
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+ * "is_linux," which is true for FreeBSD builds.
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+ */
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#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
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#include <pthread.h>
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#endif
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+#if defined(__FreeBSD__)
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+#include <machine/armreg.h>
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+#include <sys/types.h>
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+#else
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+#include <machine/armreg.h>
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+#ifndef ID_AA64ISAR0_AES_VAL
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+#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
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+#endif
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+#ifndef ID_AA64ISAR0_CRC32_VAL
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+#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
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+#endif
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+#else /* !__FreeBSD__ */
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#if defined(ARMV8_OS_ANDROID)
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#include <cpu-features.h>
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#elif defined(ARMV8_OS_LINUX)
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@@ -30,6 +34,7 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
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@@ -30,6 +44,7 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
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#else
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#error arm_features.c ARM feature detection in not defined for your platform
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#endif
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+#endif
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+#endif /* __FreeBSD__ */
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static void _arm_check_features(void);
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@@ -68,14 +73,24 @@ static void _arm_check_features(void)
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@@ -68,14 +83,24 @@ static void _arm_check_features(void)
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arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM_FEATURE_CRC32);
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arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM_FEATURE_PMULL);
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#elif defined(ARMV8_OS_LINUX) && defined(__aarch64__)
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+#if defined(__FreeBSD__)
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+ uint64_t id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
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+ if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
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+ arm_cpu_enable_pmull = 1;
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+ if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
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+ arm_cpu_enable_crc32 = 1;
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+ uint64_t id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
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+ arm_cpu_enable_pmull =
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+ (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL);
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+ arm_cpu_enable_crc32 =
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+ (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE);
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+#else
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unsigned long features = getauxval(AT_HWCAP);
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arm_cpu_enable_crc32 = !!(features & HWCAP_CRC32);
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arm_cpu_enable_pmull = !!(features & HWCAP_PMULL);
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+#endif
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+#endif /* __FreeBSD__ */
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#elif defined(ARMV8_OS_LINUX) && (defined(__ARM_NEON) || defined(__ARM_NEON__))
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+#if !defined(__FreeBSD__)
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/* Query HWCAP2 for ARMV8-A SoCs running in aarch32 mode */
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