kpriv/freebsd-ports
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Make GCC 4.3.x the default version.

Browse source 
Contents goes into devel/avr-gcc now.

devel/avr-gcc-devel
This commit is contained in:
Joerg Wunsch 2009-06-11 21:47:49 +00:00
parent 54b0b2e541
commit 31d0662402
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=235600
20 changed files with 1 additions and 2357 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
MOVED
View file

@ -3981,3 +3981,4 @@ www/apache-jserv|www/tomcat6|2009-06-08|Has expired: superceeded by tomcat
lang/perl5.6||2009-06-08|Has expired: no longer under development, use lang/perl5.10 or lang/perl5.8
multimedia/dplay|multimedia/playd|2009-06-10|Port renamed
www/epiphany-webkit|www/epiphany|2009-06-10|Webkit backend isn't supported.
devel/avr-gcc-devel|devel/avr-gcc|2009-06-11|AVR-GCC 4.3.x becomes the default version.

1
devel/Makefile
View file

@ -85,7 +85,6 @@
SUBDIR += avr-binutils
SUBDIR += avr-gcc
SUBDIR += avr-gcc-3
SUBDIR += avr-gcc-devel
SUBDIR += avr-gdb
SUBDIR += avr-libc
SUBDIR += avra

65
devel/avr-gcc-devel/Makefile
View file

@ -1,65 +0,0 @@
# New ports collection makefile for: avr-gcc-devel
# Date created: 28 Jul 2008
# Whom: Joerg Wunsch <joerg@freebsd.org>
#
# $FreeBSD$
#
PORTNAME= gcc-devel
PORTVERSION= 4.3.1
PORTREVISION= 2
CATEGORIES= devel
MASTER_SITES= ${MASTER_SITE_GCC}
MASTER_SITES+= http://people.freebsd.org/~joerg/:local
MASTER_SITE_SUBDIR= releases/gcc-${PORTVERSION}
PKGNAMEPREFIX= avr-
DISTFILES= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
EXTRACT_ONLY= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
MAINTAINER= joerg@freebsd.org
COMMENT= FSF GCC 4.3.x for Atmel AVR 8-bit RISC cross-development
BUILD_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils
LIB_DEPENDS= mpfr.3:${PORTSDIR}/math/mpfr \
gmp.8:${PORTSDIR}/math/libgmp4
RUN_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils
# GCC 4.x doesn't want to be built in its own source directory.
WRKSRC= ${WRKDIR}/gcc-${PORTVERSION}
BUILD_WRKSRC= ${WRKDIR}/build
CONFIGURE_WRKSRC= ${BUILD_WRKSRC}
INSTALL_WRKSRC= ${BUILD_WRKSRC}
CONFIGURE_SCRIPT= ../gcc-${PORTVERSION}/configure
NO_LATEST_LINK= Use devel/avr-gcc for a stable version.
USE_PERL5_BUILD= yes
USE_BZIP2= yes
USE_GMAKE= yes
USE_BISON= build
GNU_CONFIGURE= yes
.include <bsd.port.pre.mk>
.if (${ARCH} == "amd64")
ARCH= x86_64
.endif
CONFIGURE_ARGS= --target=avr --disable-libssp --with-gmp=${LOCALBASE} \
--program-prefix="avr-" --program-suffix="-43"
MAKE_FLAGS= LANGUAGES="c c++"
# get rid of that silly -mcpu=pentiumpro FreeBSD 5+ is so fond of. :-(
MAKE_ENV= MACHINE_ARCH=avr
MAN1= avr-cpp-43.1 avr-gcc-43.1 avr-g++-43.1 avr-gcov-43.1
MAN7= fsf-funding.7 gfdl.7 gpl.7
INFO= cpp gcc gccint cppinternals gccinstall
post-extract:
cd ${WRKDIR} && ${MKDIR} build
.include <bsd.port.post.mk>

6
devel/avr-gcc-devel/distinfo
View file

@ -1,6 +0,0 @@
MD5 (gcc-core-4.3.1.tar.bz2) = f30652bdee577911681c86f5d7f23d65
SHA256 (gcc-core-4.3.1.tar.bz2) = c7706b3354c1bede6ba83440b0997dc7d5fcd8892345f857527807294a9857a3
SIZE (gcc-core-4.3.1.tar.bz2) = 23799743
MD5 (gcc-g++-4.3.1.tar.bz2) = 1e0eadf92c2aeff4611fe9da286348d4
SHA256 (gcc-g++-4.3.1.tar.bz2) = 45b435c6dc48b568f20190bc04ccebddb2e16a037d48b16cee28530f81d1e464
SIZE (gcc-g++-4.3.1.tar.bz2) = 5659383

333
devel/avr-gcc-devel/files/patch-avr-libgcc.S
View file

@ -1,333 +0,0 @@
Index: gcc/config/avr/libgcc.S
===================================================================
--- gcc/config/avr/libgcc.S (revision 132252)
+++ gcc/config/avr/libgcc.S (working copy)
@@ -594,7 +594,12 @@
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ eijmp
+#else
ijmp
+#endif
+
.endfunc
#endif /* defined (L_prologue) */
@@ -674,13 +679,22 @@
lpm __tmp_reg__, Z+
lpm r31, Z
mov r30, __tmp_reg__
+
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ eijmp
+#else
ijmp
+#endif
+
#else
lpm
adiw r30, 1
push r0
lpm
push r0
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+ push __zero_reg__
+#endif
ret
#endif
.endfunc
Index: gcc/config/avr/avr.md
===================================================================
--- gcc/config/avr/avr.md (revision 132252)
+++ gcc/config/avr/avr.md (working copy)
@@ -32,6 +32,7 @@
;; p POST_INC or PRE_DEC address as a pointer (X, Y, Z)
;; r POST_INC or PRE_DEC address as a register (r26, r28, r30)
;; ~ Output 'r' if not AVR_MEGA.
+;; ! Output 'e' if AVR_HAVE_EIJMP_EICALL.
;; UNSPEC usage:
;; 0 Length of a string, see "strlenhi".
@@ -2301,22 +2302,22 @@
"(register_operand (operands[0], HImode) || CONSTANT_P (operands[0]))"
"*{
if (which_alternative==0)
- return \"icall\";
+ return \"%!icall\";
else if (which_alternative==1)
{
if (AVR_HAVE_MOVW)
return (AS2 (movw, r30, %0) CR_TAB
- \"icall\");
+ \"%!icall\");
else
return (AS2 (mov, r30, %A0) CR_TAB
AS2 (mov, r31, %B0) CR_TAB
- \"icall\");
+ \"%!icall\");
}
else if (which_alternative==2)
return AS1(%~call,%c0);
return (AS2 (ldi,r30,lo8(%0)) CR_TAB
AS2 (ldi,r31,hi8(%0)) CR_TAB
- \"icall\");
+ \"%!icall\");
}"
[(set_attr "cc" "clobber,clobber,clobber,clobber")
(set_attr_alternative "length"
@@ -2338,22 +2339,22 @@
"(register_operand (operands[0], VOIDmode) || CONSTANT_P (operands[0]))"
"*{
if (which_alternative==0)
- return \"icall\";
+ return \"%!icall\";
else if (which_alternative==1)
{
if (AVR_HAVE_MOVW)
return (AS2 (movw, r30, %1) CR_TAB
- \"icall\");
+ \"%!icall\");
else
return (AS2 (mov, r30, %A1) CR_TAB
AS2 (mov, r31, %B1) CR_TAB
- \"icall\");
+ \"%!icall\");
}
else if (which_alternative==2)
return AS1(%~call,%c1);
return (AS2 (ldi, r30, lo8(%1)) CR_TAB
AS2 (ldi, r31, hi8(%1)) CR_TAB
- \"icall\");
+ \"%!icall\");
}"
[(set_attr "cc" "clobber,clobber,clobber,clobber")
(set_attr_alternative "length"
@@ -2376,13 +2377,20 @@
; indirect jump
(define_insn "indirect_jump"
[(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
- ""
+ "!AVR_HAVE_EIJMP_EICALL"
"@
ijmp
push %A0\;push %B0\;ret"
[(set_attr "length" "1,3")
(set_attr "cc" "none,none")])
+(define_insn "*indirect_jump_avr6"
+ [(set (pc) (match_operand:HI 0 "register_operand" "z"))]
+ "AVR_HAVE_EIJMP_EICALL"
+ "eijmp"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
;; table jump
;; Table made from "rjmp" instructions for <=8K devices.
@@ -2391,7 +2399,7 @@
UNSPEC_INDEX_JMP))
(use (label_ref (match_operand 1 "" "")))
(clobber (match_dup 0))]
- "!AVR_MEGA"
+ "(!AVR_MEGA) && (!AVR_HAVE_EIJMP_EICALL)"
"@
ijmp
push %A0\;push %B0\;ret"
@@ -2420,7 +2428,7 @@
lpm __tmp_reg__,Z+
lpm r31,Z
mov r30,__tmp_reg__
- ijmp"
+ %!ijmp"
[(set_attr "length" "6")
(set_attr "cc" "clobber")])
@@ -2429,7 +2437,7 @@
UNSPEC_INDEX_JMP))
(use (label_ref (match_operand 1 "" "")))
(clobber (match_dup 0))]
- "AVR_MEGA"
+ "AVR_MEGA && !AVR_HAVE_EIJMP_EICALL"
"lsl r30
rol r31
lpm
Index: gcc/config/avr/avr.c
===================================================================
--- gcc/config/avr/avr.c (revision 132252)
+++ gcc/config/avr/avr.c (working copy)
@@ -127,7 +127,8 @@
{ 0, 0, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=35" },
{ 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" }
+ { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" },
+ { 0, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=6" }
};
/* These names are used as the index into the avr_arch_types[] table
@@ -144,7 +145,8 @@
ARCH_AVR35,
ARCH_AVR4,
ARCH_AVR5,
- ARCH_AVR51
+ ARCH_AVR51,
+ ARCH_AVR6
};
struct mcu_type_s {
@@ -273,6 +275,10 @@
{ "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__" },
{ "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__" },
{ "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__" },
+ /* 3-Byte PC. */
+ { "avr6", ARCH_AVR6, NULL },
+ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
+ { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__" },
@@ -511,9 +517,10 @@
else
{
int offset = frame_pointer_needed ? 2 : 0;
+ int avr_pc_size = AVR_HAVE_EIJMP_EICALL ? 3 : 2;
offset += avr_regs_to_save (NULL);
- return get_frame_size () + 2 + 1 + offset;
+ return get_frame_size () + (avr_pc_size) + 1 + offset;
}
}
@@ -1119,7 +1126,7 @@
&& ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
|| GET_CODE (addr) == LABEL_REF))
{
- fprintf (file, "pm(");
+ fprintf (file, "gs(");
output_addr_const (file,addr);
fprintf (file ,")");
}
@@ -1144,6 +1151,11 @@
if (!AVR_MEGA)
fputc ('r', file);
}
+ else if (code == '!')
+ {
+ if (AVR_HAVE_EIJMP_EICALL)
+ fputc ('e', file);
+ }
else if (REG_P (x))
{
if (x == zero_reg_rtx)
@@ -4468,7 +4480,7 @@
&& ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
|| GET_CODE (x) == LABEL_REF))
{
- fputs ("\t.word\tpm(", asm_out_file);
+ fputs ("\t.word\tgs(", asm_out_file);
output_addr_const (asm_out_file, x);
fputs (")\n", asm_out_file);
return true;
@@ -5815,7 +5827,7 @@
{
switch_to_section (progmem_section);
if (AVR_MEGA)
- fprintf (stream, "\t.word pm(.L%d)\n", value);
+ fprintf (stream, "\t.word gs(.L%d)\n", value);
else
fprintf (stream, "\trjmp .L%d\n", value);
}
Index: gcc/config/avr/t-avr
===================================================================
--- gcc/config/avr/t-avr (revision 132252)
+++ gcc/config/avr/t-avr (working copy)
@@ -37,8 +37,8 @@
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -123,7 +123,9 @@
mmcu?avr51=mmcu?atmega1284p \
mmcu?avr51=mmcu?at90can128 \
mmcu?avr51=mmcu?at90usb1286 \
- mmcu?avr51=mmcu?at90usb1287
+ mmcu?avr51=mmcu?at90usb1287 \
+ mmcu?avr6=mmcu?atmega2560 \
+ mmcu?avr6=mmcu?atmega2561
MULTILIB_EXCEPTIONS =
Index: gcc/config/avr/avr.h
===================================================================
--- gcc/config/avr/avr.h (revision 132252)
+++ gcc/config/avr/avr.h (working copy)
@@ -80,6 +80,12 @@
builtin_define ("__AVR_MEGA__"); \
if (avr_current_arch->have_jmp_call) \
builtin_define ("__AVR_HAVE_JMP_CALL__"); \
+ if (!avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_2_BYTE_PC__"); \
+ if (avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_3_BYTE_PC__"); \
+ if (avr_current_arch->have_eijmp_eicall) \
+ builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
if (TARGET_NO_INTERRUPTS) \
builtin_define ("__NO_INTERRUPTS__"); \
} \
@@ -100,9 +106,10 @@
#define AVR_HAVE_MOVW (avr_have_movw_lpmx_p)
#define AVR_HAVE_LPMX (avr_have_movw_lpmx_p)
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
+#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
-#define AVR_2_BYTE_PC 1
-#define AVR_3_BYTE_PC 0
+#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
+#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
@@ -671,7 +678,7 @@
#define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
-#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
+#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
#define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
@@ -828,6 +835,7 @@
mmcu=at90usb64*|\
mmcu=at90usb128*|\
mmcu=at94k: -m avr5}\
+%{mmcu=atmega256*:-m avr6}\
%{mmcu=atmega324*|\
mmcu=atmega325*|\
mmcu=atmega328p|\
@@ -856,7 +864,8 @@
mmcu=at90usb*: -Tdata 0x800100}\
%{mmcu=atmega640|\
mmcu=atmega1280|\
- mmcu=atmega1281: -Tdata 0x800200} "
+ mmcu=atmega1281|\
+ mmcu=atmega256*: -Tdata 0x800200} "
#define LIB_SPEC \
"%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
@@ -968,6 +977,8 @@
%{mmcu=atmega1280:crtm1280.o%s} \
%{mmcu=atmega1281:crtm1281.o%s} \
%{mmcu=atmega1284p:crtm1284p.o%s} \
+%{mmcu=atmega2560:crtm2560.o%s} \
+%{mmcu=atmega2561:crtm2561.o%s} \
%{mmcu=at90can128:crtcan128.o%s} \
%{mmcu=at90usb1286:crtusb1286.o%s} \
%{mmcu=at90usb1287:crtusb1287.o%s}"

323
devel/avr-gcc-devel/files/patch-bug11259
View file

@ -1,323 +0,0 @@
Index: gcc/config/avr/avr.md
===================================================================
--- gcc/config/avr/avr.md (revision 129892)
+++ gcc/config/avr/avr.md (working copy)
@@ -45,21 +45,22 @@
(REG_SP 32)
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
(SREG_ADDR 0x5F)
(RAMPZ_ADDR 0x5B)
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
(UNSPEC_CLI 3)
+ (UNSPEC_SWAP 4)
(UNSPECV_PROLOGUE_SAVES 0)
(UNSPECV_EPILOGUE_RESTORES 1)])
(include "predicates.md")
(include "constraints.md")
;; Condition code settings.
(define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber"
(const_string "none"))
@@ -1185,20 +1186,33 @@
return (AS2 (andi, %A0,lo8(%2)) CR_TAB
AS2 (andi, %B0,hi8(%2)) CR_TAB
AS2 (andi, %C0,hlo8(%2)) CR_TAB
AS2 (andi, %D0,hhi8(%2)));
}
return \"bug\";
}"
[(set_attr "length" "4,4")
(set_attr "cc" "set_n,set_n")])
+(define_peephole2 ; andi
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (and:QI (match_dup 0)
+ (match_operand:QI 1 "const_int_operand" "")))
+ (set (match_dup 0)
+ (and:QI (match_dup 0)
+ (match_operand:QI 2 "const_int_operand" "")))]
+ ""
+ [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))]
+ {
+ operands[1] = GEN_INT (INTVAL (operands[1]) & INTVAL (operands[2]));
+ })
+
;;|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
;; ior
(define_insn "iorqi3"
[(set (match_operand:QI 0 "register_operand" "=r,d")
(ior:QI (match_operand:QI 1 "register_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "r,i")))]
""
"@
or %0,%2
@@ -1313,24 +1327,71 @@
(xor:SI (match_operand:SI 1 "register_operand" "%0")
(match_operand:SI 2 "register_operand" "r")))]
""
"eor %0,%2
eor %B0,%B2
eor %C0,%C2
eor %D0,%D2"
[(set_attr "length" "4")
(set_attr "cc" "set_n")])
+;; swap
+
+(define_insn "*swap"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
+ UNSPEC_SWAP))]
+ ""
+ "swap %0"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
;; arithmetic shift left
-(define_insn "ashlqi3"
+(define_expand "ashlqi3"
+ [(set (match_operand:QI 0 "register_operand" "")
+ (ashift:QI (match_operand:QI 1 "register_operand" "")
+ (match_operand:QI 2 "general_operand" "")))]
+ ""
+ "")
+
+(define_split ; ashlqi3_const4
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -16)))]
+ "")
+
+(define_split ; ashlqi3_const5
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -32)))]
+ "")
+
+(define_split ; ashlqi3_const6
+ [(set (match_operand:QI 0 "d_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
+ "")
+
+(define_insn "*ashlqi3"
[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
""
"* return ashlqi3_out (insn, operands, NULL);"
[(set_attr "length" "5,0,1,2,4,6,9")
(set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
(define_insn "ashlhi3"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
@@ -1346,20 +1407,61 @@
(ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
""
"* return ashlsi3_out (insn, operands, NULL);"
[(set_attr "length" "8,0,4,4,8,10,12")
(set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
;; Optimize if a scratch register from LD_REGS happens to be available.
(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 2) (const_int -16))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 2) (const_int -32))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 2) (const_int -64))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
[(match_scratch:QI 3 "d")
(set (match_operand:HI 0 "register_operand" "")
(ashift:HI (match_operand:HI 1 "register_operand" "")
(match_operand:QI 2 "const_int_operand" "")))]
""
[(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
"if (!avr_peep2_scratch_safe (operands[3]))
FAIL;")
@@ -1464,21 +1566,63 @@
(match_operand:QI 2 "const_int_operand" "L,P,O,n")))
(clobber (match_scratch:QI 3 "=X,X,X,&d"))]
"reload_completed"
"* return ashrsi3_out (insn, operands, NULL);"
[(set_attr "length" "0,4,4,10")
(set_attr "cc" "none,clobber,set_n,clobber")])
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; logical shift right
-(define_insn "lshrqi3"
+(define_expand "lshrqi3"
+ [(set (match_operand:QI 0 "register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "register_operand" "")
+ (match_operand:QI 2 "general_operand" "")))]
+ ""
+ "")
+
+(define_insn_and_split "*lshrqi3_const4"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 4)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
+ "")
+
+(define_insn_and_split "*lshrqi3_const5"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 5)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
+ "")
+
+(define_insn_and_split "*lshrqi3_const6"
+ [(set (match_operand:QI 0 "d_register_operand" "=d")
+ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
+ (const_int 6)))]
+ ""
+ "#"
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
+ "")
+
+(define_insn "*lshrqi3"
[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
""
"* return lshrqi3_out (insn, operands, NULL);"
[(set_attr "length" "5,0,1,2,4,6,9")
(set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
(define_insn "lshrhi3"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
@@ -1494,20 +1638,61 @@
(lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
(match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
""
"* return lshrsi3_out (insn, operands, NULL);"
[(set_attr "length" "8,0,4,4,8,10,12")
(set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
;; Optimize if a scratch register from LD_REGS happens to be available.
(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 4)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 2) (const_int 15))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 5)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
+ (set (match_dup 2) (const_int 7))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
+ [(match_scratch:QI 2 "d")
+ (set (match_operand:QI 0 "l_register_operand" "")
+ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
+ (const_int 6)))]
+ ""
+ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
+ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
+ (set (match_dup 2) (const_int 3))
+ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
+ (clobber (match_dup 2))]
+ "if (!avr_peep2_scratch_safe (operands[2]))
+ FAIL;")
+
+(define_peephole2
[(match_scratch:QI 3 "d")
(set (match_operand:HI 0 "register_operand" "")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "")
(match_operand:QI 2 "const_int_operand" "")))]
""
[(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2)))
(clobber (match_dup 3))])]
"if (!avr_peep2_scratch_safe (operands[3]))
FAIL;")

183
devel/avr-gcc-devel/files/patch-bug19636-24894-31644-31786
View file

@ -1,183 +0,0 @@
Fix for GCC bugs:
#19636
#24894
#31644
#31786
Index: avr.c
===================================================================
--- gcc/config/avr/avr.c (revision 132380)
+++ gcc/config/avr/avr.c (working copy)
@@ -976,6 +976,8 @@
true_regnum (XEXP (x, 0)));
debug_rtx (x);
}
+ if (!strict && GET_CODE (x) == SUBREG)
+ x = SUBREG_REG (x);
if (REG_P (x) && (strict ? REG_OK_FOR_BASE_STRICT_P (x)
: REG_OK_FOR_BASE_NOSTRICT_P (x)))
r = POINTER_REGS;
@@ -990,6 +992,7 @@
if (fit)
{
if (! strict
+ || REGNO (XEXP (x,0)) == REG_X
|| REGNO (XEXP (x,0)) == REG_Y
|| REGNO (XEXP (x,0)) == REG_Z)
r = BASE_POINTER_REGS;
@@ -1957,7 +1960,7 @@
/* This is a paranoid case. LEGITIMIZE_RELOAD_ADDRESS must exclude
it but I have this situation with extremal
optimization options. */
-
+
*l = 4;
if (reg_base == reg_dest)
return (AS2 (adiw,r26,%o1) CR_TAB
@@ -4840,43 +4843,9 @@
order_regs_for_local_alloc (void)
{
unsigned int i;
- static const int order_0[] = {
- 24,25,
- 18,19,
- 20,21,
- 22,23,
- 30,31,
- 26,27,
- 28,29,
- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,
- 0,1,
- 32,33,34,35
- };
- static const int order_1[] = {
- 18,19,
- 20,21,
- 22,23,
- 24,25,
- 30,31,
- 26,27,
- 28,29,
- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,
- 0,1,
- 32,33,34,35
- };
- static const int order_2[] = {
- 25,24,
- 23,22,
- 21,20,
- 19,18,
- 30,31,
- 26,27,
- 28,29,
- 17,16,
- 15,14,13,12,11,10,9,8,7,6,5,4,3,2,
- 1,0,
- 32,33,34,35
- };
+ static const int order_0[] = REG_ALLOC_ORDER_0;
+ static const int order_1[] = REG_ALLOC_ORDER_1;
+ static const int order_2[] = REG_ALLOC_ORDER_2;
const int *order = (TARGET_ORDER_1 ? order_1 :
TARGET_ORDER_2 ? order_2 :
@@ -5490,6 +5459,14 @@
|| xx == arg_pointer_rtx)
return 1; /* XXX frame & arg pointer checks */
}
+ else if (GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
+ {
+ int regno = REGNO (XEXP (x, 0));
+ if (regno == REG_Z || regno == REG_Y || regno == REG_X)
+ return 1;
+ }
+
+
return 0;
}
@@ -5692,7 +5669,7 @@
return 1;
/* Modes larger than QImode occupy consecutive registers. */
- if (regno + GET_MODE_SIZE (mode) > FIRST_PSEUDO_REGISTER)
+ if (regno <= (REG_Z + 1) && (regno + GET_MODE_SIZE (mode)) > (REG_Z + 2))
return 0;
/* All modes larger than QImode should start in an even register. */
Index: avr.h
===================================================================
--- gcc/config/avr/avr.h (revision 132380)
+++ gcc/config/avr/avr.h (working copy)
@@ -199,19 +199,29 @@
1,1,/* STACK */ \
1,1 /* arg pointer */ }
-#define REG_ALLOC_ORDER { \
- 24,25, \
- 18,19, \
- 20,21, \
- 22,23, \
- 30,31, \
- 26,27, \
- 28,29, \
- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
- 0,1, \
- 32,33,34,35 \
- }
+#define REG_ALLOC_ORDER_0 {\
+ 24,25,18,19,20,21,22,23,30,31,26,27,28,29, \
+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
+ 0,1,\
+ 32,33,34,35 }
+
+#define REG_ALLOC_ORDER_1 {\
+ 18,19,20,21,22,23,24,25,30,31,26,27,28,29,\
+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
+ 0,1,\
+ 32,33,34,35 }
+
+#define REG_ALLOC_ORDER_2 {\
+ 18,22,20,24,19,23,21,25,30,31,26,27,28,29, \
+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
+ 0,1,\
+ 32,33,34,35 }
+
+
+#define REG_ALLOC_ORDER REG_ALLOC_ORDER_0
+
+
#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
@@ -453,11 +463,14 @@
OPNUM, TYPE); \
goto WIN; \
} \
+ if(0) \
+ { \
push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
} \
+ } \
else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
{ \
push_reload (X, NULL_RTX, &X, NULL, \
Index: avr.md
===================================================================
--- gcc/config/avr/avr.md (revision 132380)
+++ gcc/config/avr/avr.md (working copy)
@@ -251,8 +251,8 @@
(set_attr "cc" "none")])
(define_insn "*movhi"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
- (match_operand:HI 1 "general_operand" "r,m,rL,i,i,r,q"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,Qm,d,*r,q,r")
+ (match_operand:HI 1 "general_operand" "r,Qm,rL,i,i,r,q"))]
"(register_operand (operands[0],HImode)
|| register_operand (operands[1],HImode) || const0_rtx == operands[1])"
"* return output_movhi (insn, operands, NULL);"

14
devel/avr-gcc-devel/files/patch-bug30243
View file

@ -1,14 +0,0 @@
Fix for GCC bug #30243.
Index: gcc/builtins.c
===================================================================
--- gcc/builtins.c (revision 126457)
+++ gcc/builtins.c (working copy)
@@ -5664,7 +5664,7 @@
lo = 0;
}
- if (imode != rmode)
+ if (imode > rmode)
temp = gen_lowpart (rmode, temp);
temp = expand_binop (rmode, and_optab, temp,
immed_double_const (lo, hi, rmode),

81
devel/avr-gcc-devel/files/patch-bug33009
View file

@ -1,81 +0,0 @@
Index: gcc/rtl-factoring.c
===================================================================
--- gcc/rtl-factoring.c (revision 132522)
+++ gcc/rtl-factoring.c (working copy)
@@ -551,8 +551,8 @@
df_simulate_artificial_refs_at_end (bb, &live);
/* Propagate until INSN if found. */
- for (x = BB_END (bb); x != insn;)
- df_simulate_one_insn_backwards (bb, insn, &live);
+ for (x = BB_END (bb); x != insn; x = PREV_INSN(x))
+ df_simulate_one_insn_backwards (bb, x, &live);
/* Clear registers live after INSN. */
renumbered_reg_set_to_hard_reg_set (&hlive, &live);
@@ -562,7 +562,7 @@
for (i = 0; i < length;)
{
rtx prev = PREV_INSN (x);
- df_simulate_one_insn_backwards (bb, insn, &live);
+ df_simulate_one_insn_backwards (bb, x, &live);
if (INSN_P (x))
{
@@ -949,6 +949,17 @@
return sym;
}
+/* Splits basic block at the requested insn and rebuilds dataflow. */
+
+static basic_block
+asplit_block(basic_block bb, rtx insn)
+{
+ basic_block next;
+ next = split_block (bb, insn)->dest;
+ df_analyze ();
+ return next;
+}
+
/* Ensures that INSN is the last insn in its block and returns the block label
of the next block. */
@@ -959,7 +970,7 @@
if ((insn == BB_END (bb)) && (bb->next_bb != EXIT_BLOCK_PTR))
return block_label (bb->next_bb);
else
- return block_label (split_block (bb, insn)->dest);
+ return block_label (asplit_block (bb, insn));
}
/* Ensures that the last insns of the best pattern and its matching sequences
@@ -1008,8 +1019,9 @@
/* Emit an indirect jump via the link register after the sequence acting
as the return insn. Also emit a barrier and update the basic block. */
- retjmp = emit_jump_insn_after (gen_indirect_jump (pattern_seqs->link_reg),
- BB_END (bb));
+ if (!find_reg_note (BB_END(bb), REG_NORETURN, NULL))
+ retjmp = emit_jump_insn_after (gen_indirect_jump (pattern_seqs->link_reg),
+ BB_END (bb));
emit_barrier_after (BB_END (bb));
/* Replace all outgoing edges with a new one to the block of RETLABEL. */
@@ -1025,7 +1037,7 @@
for (; i < sb->length; i++)
insn = prev_insn_in_block (insn);
- sb->label = block_label (split_block (bb, insn)->dest);
+ sb->label = block_label (asplit_block (bb, insn));
}
/* Emit an insn saving the return address to the link register before the
@@ -1067,7 +1079,7 @@
/* Delete the insns of the sequence. */
for (i = 0; i < sb->length; i++)
insn = prev_insn_in_block (insn);
- delete_basic_block (split_block (bb, insn)->dest);
+ delete_basic_block (asplit_block (bb, insn));
/* Emit an insn saving the return address to the link register
before the deleted sequence. */

48
devel/avr-gcc-devel/files/patch-bug34210-35508
View file

@ -1,48 +0,0 @@
Fix for bugs #34210, #35508.
===================================================================
--- libgcc/config.host.orig 2008-01-25 13:49:04.000000000 -0700
+++ libgcc/config.host 2008-03-22 22:04:25.965018200 -0600
@@ -77,6 +77,9 @@ strongarm*-*-*)
arm*-*-*)
cpu_type=arm
;;
+avr-*-*)
+ cpu_type=avr
+ ;;
bfin*-*)
cpu_type=bfin
;;
@@ -243,6 +246,8 @@ arm*-*-kaos*)
avr-*-rtems*)
;;
avr-*-*)
+ # Make HImode functions for AVR
+ tmake_file=${cpu_type}/t-avr
;;
bfin*-elf*)
;;
Index: config/avr/t-avr
===================================================================
--- libgcc/config/avr/t-avr (revision 0)
+++ libgcc/config/avr/t-avr (revision 0)
@@ -0,0 +1,19 @@
+# Extra 16-bit integer functions.
+intfuncs16 = _absvXX2 _addvXX3 _subvXX3 _mulvXX3 _negvXX2 _ffsXX2 _clzXX2 \
+ _ctzXX2 _popcountXX2 _parityXX2
+hiintfuncs16 = $(subst XX,hi,$(intfuncs16))
+siintfuncs16 = $(subst XX,si,$(intfuncs16))
+
+iter-items := $(hiintfuncs16)
+iter-labels := $(siintfuncs16)
+iter-sizes := $(patsubst %,2,$(siintfuncs16)) $(patsubst %,2,$(hiintfuncs16))
+
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/siditi-object.mk,$(iter-items))
+libgcc-objects += $(patsubst %,%$(objext),$(hiintfuncs16))
+
+ifeq ($(enable_shared),yes)
+libgcc-s-objects += $(patsubst %,%_s$(objext),$(hiintfuncs16))
+endif
+
+

20
devel/avr-gcc-devel/files/patch-bug34932
View file

@ -1,20 +0,0 @@
Index: avr.md
===================================================================
--- gcc/config/avr/avr.md (revision 132947)
+++ gcc/config/avr/avr.md (working copy)
@@ -585,13 +585,13 @@
adc %B0,__zero_reg__"
[(set_attr "length" "2")
(set_attr "cc" "set_n")])
-
+;disable this as reload has problems with it.
(define_insn "*addhi3_zero_extend2"
[(set (match_operand:HI 0 "register_operand" "=r")
(plus:HI
(zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
- ""
+ "0"
"add %0,%2
mov %B0,__zero_reg__
adc %B0,__zero_reg__"

65
devel/avr-gcc-devel/files/patch-bug35013
View file

@ -1,65 +0,0 @@
Patch to fix GCC bug #35013.
Index: avr-protos.h
===================================================================
--- gcc/config/avr/avr-protos.h (revision 132369)
+++ gcc/config/avr/avr-protos.h (working copy)
@@ -111,6 +111,7 @@
extern int _reg_unused_after (rtx insn, rtx reg);
extern int avr_jump_mode (rtx x, rtx insn);
extern int byte_immediate_operand (rtx op, enum machine_mode mode);
+extern int text_segment_operand (rtx op, enum machine_mode mode);
extern int test_hard_reg_class (enum reg_class class, rtx x);
extern int jump_over_one_insn_p (rtx insn, rtx dest);
Index: avr.c
===================================================================
--- gcc/config/avr/avr.c (revision 132366)
+++ gcc/config/avr/avr.c (working copy)
@@ -1116,8 +1116,7 @@
default:
if (CONSTANT_ADDRESS_P (addr)
- && ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
- || GET_CODE (addr) == LABEL_REF))
+ && text_segment_operand (addr, VOIDmode))
{
fprintf (file, "pm(");
output_addr_const (file,addr);
@@ -1428,6 +1427,26 @@
&& INTVAL (op) <= 0xff && INTVAL (op) >= 0);
}
+/* Return true if OP is a program memory reference.*/
+int
+text_segment_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+ switch (GET_CODE (op))
+ {
+ case LABEL_REF :
+ return true;
+ case SYMBOL_REF :
+ return SYMBOL_REF_FUNCTION_P (op);
+ case PLUS :
+ /* Assume canonical format of symbol + constant.
+ Fall through. */
+ case CONST :
+ return text_segment_operand (XEXP (op, 0), VOIDmode);
+ default :
+ return false;
+ }
+}
+
/* Output all insn addresses and their sizes into the assembly language
output file. This is helpful for debugging whether the length attributes
in the md file are correct.
@@ -4465,8 +4484,7 @@
avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
{
if (size == POINTER_SIZE / BITS_PER_UNIT && aligned_p
- && ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
- || GET_CODE (x) == LABEL_REF))
+ && text_segment_operand (x, VOIDmode) )
{
fputs ("\t.word\tpm(", asm_out_file);
output_addr_const (asm_out_file, x);

26
devel/avr-gcc-devel/files/patch-bug35542
View file

@ -1,26 +0,0 @@
Committed on HEAD/4.4
--------------------------------------------------------------------------------
Index: fwprop.c
===================================================================
--- gcc/fwprop.c (revision 131704)
+++ gcc/fwprop.c (working copy)
@@ -882,7 +882,6 @@
return try_fwprop_subst (use, loc, new, def_insn, set_reg_equal);
}
-
/* Given a use USE of an insn, if it has a single reaching
definition, try to forward propagate it into that insn. */
@@ -921,9 +920,10 @@
else
parent = PATTERN (use_insn);
- if (!loc_mentioned_in_p (DF_REF_LOC (use), parent))
+ if (!reg_mentioned_p (DF_REF_REG (use), parent))
return;
+
def_insn = DF_REF_INSN (def);
if (multiple_sets (def_insn))
return;

35
devel/avr-gcc-devel/files/patch-cross-installation
View file

@ -1,35 +0,0 @@
This hack avoids tampering with ${LOCALBASE}/avr/bin/{gcc,c++,g++} which
would conflict with a possibly installed version of devel/avr-gcc.
Funny enough, these binaries would only be installed in case ${LOCALBASE}/avr/bin
is already present.
--- gcc/Makefile.in~ 2008-05-11 20:54:15.000000000 +0200
+++ gcc/Makefile.in 2008-07-28 17:05:26.000000000 +0200
@@ -3979,10 +3979,7 @@
-( cd $(DESTDIR)$(bindir) && \
$(LN) $(GCC_INSTALL_NAME)$(exeext) $(target_noncanonical)-gcc-$(version)$(exeext) )
-if [ -f gcc-cross$(exeext) ] ; then \
- if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \
- rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \
- $(INSTALL_PROGRAM) gcc-cross$(exeext) $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \
- else true; fi; \
+ : \
else \
rm -f $(DESTDIR)$(bindir)/$(target_noncanonical)-gcc-tmp$(exeext); \
( cd $(DESTDIR)$(bindir) && \
--- gcc/cp/Make-lang.in~ 2008-02-27 10:26:24.000000000 +0100
+++ gcc/cp/Make-lang.in 2008-07-28 17:07:32.000000000 +0200
@@ -154,13 +154,7 @@
$(LN) $(GXX_INSTALL_NAME)$(exeext) $(CXX_INSTALL_NAME)$(exeext) )
-if [ -f cc1plus$(exeext) ] ; then \
if [ -f g++-cross$(exeext) ] ; then \
- if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \
- rm -f $(DESTDIR)$(gcc_tooldir)/bin/g++$(exeext); \
- $(INSTALL_PROGRAM) g++-cross$(exeext) $(DESTDIR)$(gcc_tooldir)/bin/g++$(exeext); \
- rm -f $(DESTDIR)$(gcc_tooldir)/bin/c++$(exeext); \
- ( cd $(DESTDIR)$(gcc_tooldir)/bin && \
- $(LN) g++$(exeext) c++$(exeext) ); \
- else true; fi; \
+ : \
else \
rm -f $(DESTDIR)$(bindir)/$(GXX_TARGET_INSTALL_NAME)$(exeext); \
( cd $(DESTDIR)$(bindir) && \

12
devel/avr-gcc-devel/files/patch-libiberty-Makefile.in
View file

@ -1,12 +0,0 @@
--- libiberty/Makefile.in.orig Mon Sep 26 22:55:10 2005
+++ libiberty/Makefile.in Wed Mar 22 22:13:44 2006
@@ -275,7 +275,8 @@
@MAINT@ echo stamp > stamp-functions
INSTALL_DEST = @INSTALL_DEST@
-install: install_to_$(INSTALL_DEST) install-subdir
+#install: install_to_$(INSTALL_DEST) install-subdir
+install:
install_to_libdir: all
${mkinstalldirs} $(DESTDIR)$(libdir)$(MULTISUBDIR)

92
devel/avr-gcc-devel/files/patch-newdevices
View file

@ -1,92 +0,0 @@
--- gcc/config/avr/avr.c.orig Sat Sep 1 17:28:30 2007
+++ gcc/config/avr/avr.c Wed Dec 19 14:02:11 2007
@@ -224,6 +224,7 @@ static const struct mcu_type_s avr_mcu_t
{ "avr35", ARCH_AVR35, NULL },
{ "at90usb82", ARCH_AVR35, "__AVR_AT90USB82__" },
{ "at90usb162", ARCH_AVR35, "__AVR_AT90USB162__" },
+ { "attiny167", ARCH_AVR35, "__AVR_ATtiny167__" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__" },
@@ -278,6 +278,9 @@ static const struct mcu_type_s avr_mcu_t
{ "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__" },
{ "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__" },
{ "at90pwm316", ARCH_AVR5, "__AVR_AT90PWM316__" },
+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__" },
+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__" },
+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__" },
{ "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__" },
{ "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__" },
{ "at94k", ARCH_AVR5, "__AVR_AT94K__" },
--- gcc/config/avr/t-avr.orig Fri Apr 27 22:53:57 2007
+++ gcc/config/avr/t-avr Wed Dec 19 14:01:08 2007
@@ -63,6 +63,7 @@ MULTILIB_MATCHES = \
mmcu?avr31=mmcu?atmega103 \
mmcu?avr35=mmcu?at90usb82 \
mmcu?avr35=mmcu?at90usb162 \
+ mmcu?avr35=mmcu?attiny167 \
mmcu?avr4=mmcu?atmega48 \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
@@ -114,6 +114,9 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?at90can64 \
mmcu?avr5=mmcu?at90pwm216 \
mmcu?avr5=mmcu?at90pwm316 \
+ mmcu?avr5=mmcu?atmega32c1 \
+ mmcu?avr5=mmcu?atmega32m1 \
+ mmcu?avr5=mmcu?atmega32u4 \
mmcu?avr5=mmcu?at90usb646 \
mmcu?avr5=mmcu?at90usb647 \
mmcu?avr5=mmcu?at94k \
--- gcc/config/avr/avr.h.orig Wed Dec 19 13:39:10 2007
+++ gcc/config/avr/avr.h Wed Dec 19 14:02:06 2007
@@ -853,7 +853,8 @@ mmcu=*:-mmcu=%*}"
mmcu=at43*|\
mmcu=at76*|\
mmcu=at90usb82|\
- mmcu=at90usb162: -m avr3}\
+ mmcu=at90usb162|\
+ mmcu=attiny167: -m avr3}\
%{mmcu=atmega8*|\
mmcu=atmega48*|\
mmcu=at90pwm1|\
@@ -869,6 +869,9 @@ mmcu=*:-mmcu=%*}"
mmcu=at90can*|\
mmcu=at90pwm216|\
mmcu=at90pwm316|\
+ mmcu=atmega32c1|\
+ mmcu=atmega32m1|\
+ mmcu=atmega32u4|\
mmcu=at90usb64*|\
mmcu=at90usb128*|\
mmcu=at94k: -m avr5}\
@@ -900,7 +901,11 @@ mmcu=*:-mmcu=%*}"
mmcu=attiny48|\
mmcu=attiny88|\
+ mmcu=attiny167|\
mmcu=at90can*|\
mmcu=at90pwm*|\
+ mmcu=atmega32c1|\
+ mmcu=atmega32m1|\
+ mmcu=atmega32u4|\
mmcu=at90usb*: -Tdata 0x800100}\
%{mmcu=atmega640|\
mmcu=atmega1280|\
@@ -958,6 +960,7 @@ mmcu=*:-mmcu=%*}"
%{mmcu=attiny43u:crttn43u.o%s} \
%{mmcu=attiny48:crttn48.o%s} \
%{mmcu=attiny88:crttn88.o%s} \
+%{mmcu=attiny167:crttn167.o%s} \
%{mmcu=at43usb320|mmcu=avr3:crt43320.o%s} \
%{mmcu=at43usb355:crt43355.o%s} \
%{mmcu=at76c711:crt76711.o%s} \
@@ -1009,6 +1011,9 @@ mmcu=*:-mmcu=%*}"
%{mmcu=at90can64:crtcan64.o%s} \
%{mmcu=at90pwm216:crt90pwm216.o%s} \
%{mmcu=at90pwm316:crt90pwm316.o%s} \
+%{mmcu=atmega32c1:crtm32c1.o%s} \
+%{mmcu=atmega32m1:crtm32m1.o%s} \
+%{mmcu=atmega32u4:crtm32u4.o%s} \
%{mmcu=at90usb646:crtusb646.o%s} \
%{mmcu=at90usb647:crtusb647.o%s} \
%{mmcu=at94k:crtat94k.o%s} \

733
devel/avr-gcc-devel/files/patch-xmega
View file

@ -1,733 +0,0 @@
--- gcc/config/avr/avr.c.orig 2008-06-08 10:24:28.171355800 -0600
+++ gcc/config/avr/avr.c 2008-06-08 10:29:42.276013800 -0600
@@ -51,6 +51,7 @@
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
+static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
static int sequent_regs_live (void);
@@ -118,17 +119,24 @@ int avr_asm_only_p = 0;
int avr_have_movw_lpmx_p = 0;
static const struct base_arch_s avr_arch_types[] = {
- { 1, 0, 0, 0, 0, 0, 0, 0, NULL }, /* unknown device specified */
- { 1, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=1" },
- { 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
- { 0, 0, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=25" },
- { 0, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=3" },
- { 0, 0, 1, 0, 1, 0, 0, 0, "__AVR_ARCH__=31" },
- { 0, 0, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=35" },
- { 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=4" },
- { 0, 1, 1, 1, 0, 0, 0, 0, "__AVR_ARCH__=5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=6" }
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, NULL }, /* Unknown device specified. */
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=1" },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=25" },
+ { 0, 0, 1, 0, 0, 0, 0, 0, 0, "__AVR_ARCH__=3" },
+ { 0, 0, 1, 0, 1, 0, 0, 0, 0, "__AVR_ARCH__=31" },
+ { 0, 0, 1, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=35" },
+ { 0, 1, 0, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=4" },
+ { 0, 1, 1, 1, 0, 0, 0, 0, 0, "__AVR_ARCH__=5" },
+ { 0, 1, 1, 1, 1, 1, 0, 0, 0, "__AVR_ARCH__=51" },
+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, "__AVR_ARCH__=6" },
+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, "__AVR_ARCH__=101" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, "__AVR_ARCH__=102" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, "__AVR_ARCH__=103" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, "__AVR_ARCH__=104" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, "__AVR_ARCH__=105" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, "__AVR_ARCH__=106" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, "__AVR_ARCH__=107" }
};
/* These names are used as the index into the avr_arch_types[] table
@@ -146,7 +154,14 @@ enum avr_arch
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
- ARCH_AVR6
+ ARCH_AVR6,
+ ARCH_AVRXMEGA1,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA3,
+ ARCH_AVRXMEGA4,
+ ARCH_AVRXMEGA5,
+ ARCH_AVRXMEGA6,
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {
@@ -279,6 +294,18 @@ static const struct mcu_type_s avr_mcu_t
{ "avr6", ARCH_AVR6, NULL },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__" },
+ /* Enhanced, == 256K. */
+ /* Xmega, <= 8K FLASH. */
+ /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
+ /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
+ { "avrxmega5", ARCH_AVRXMEGA5, NULL },
+ { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__" },
+ /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
+ /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
+ { "avrxmega7", ARCH_AVRXMEGA7, NULL },
+ { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__" },
@@ -452,6 +479,21 @@ signal_function_p (tree func)
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a nmi function as specified
+ by the "nmi" attribute. */
+
+static int
+nmi_function_p (tree func)
+{
+ tree a;
+
+ if (TREE_CODE (func) != FUNCTION_DECL)
+ return 0;
+
+ a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func));
+ return a != NULL_TREE;
+}
+
/* Return nonzero if FUNC is a OS_task function. */
static int
@@ -611,6 +653,7 @@ expand_prologue (void)
cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
cfun->machine->is_signal = signal_function_p (current_function_decl);
+ cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
/* Prologue: naked. */
@@ -646,7 +689,7 @@ expand_prologue (void)
/* Push SREG. */
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -656,7 +699,7 @@ expand_prologue (void)
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -929,14 +972,14 @@ expand_epilogue (void)
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(RAMPZ_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_RAMPZ_ADDR)),
tmp_reg_rtx);
}
/* Restore SREG using tmp reg as scratch. */
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(SREG_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_SREG_ADDR)),
tmp_reg_rtx);
/* Restore tmp REG. */
@@ -1705,8 +1748,9 @@ output_movhi (rtx insn, rtx operands[],
}
/* Use simple load of stack pointer if no interrupts are used
or inside main or signal function prologue where they disabled. */
- else if (TARGET_NO_INTERRUPTS
- || (reload_completed
+ else if (TARGET_NO_INTERRUPTS
+ || (!AVR_XMEGA
+ && reload_completed
&& cfun->machine->is_signal
&& prologue_epilogue_contains (insn)))
{
@@ -1715,7 +1759,8 @@ output_movhi (rtx insn, rtx operands[],
AS2 (out,__SP_L__,%A1));
}
/* In interrupt prolog we know interrupts are enabled. */
- else if (reload_completed
+ else if (!AVR_XMEGA
+ && reload_completed
&& cfun->machine->is_interrupt
&& prologue_epilogue_contains (insn))
{
@@ -1725,12 +1770,25 @@ output_movhi (rtx insn, rtx operands[],
"sei" CR_TAB
AS2 (out,__SP_L__,%A1));
}
- *l = 5;
- return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
- "cli" CR_TAB
- AS2 (out,__SP_H__,%B1) CR_TAB
- AS2 (out,__SREG__,__tmp_reg__) CR_TAB
- AS2 (out,__SP_L__,%A1));
+ if(AVR_XMEGA)
+ {
+ *l = 6;
+ return (AS2 (mov,__tmp_reg__,r24) CR_TAB
+ AS2 (ldi,r24,0xD8) CR_TAB
+ AS2 (out,__CCP__,r24) CR_TAB
+ AS2 (out,__SP_H__,%B1) CR_TAB
+ AS2 (out,__SP_L__,%A1) CR_TAB
+ AS2 (mov,r24,__tmp_reg__));
+ }
+ else
+ {
+ *l = 5;
+ return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
+ "cli" CR_TAB
+ AS2 (out,__SP_H__,%B1) CR_TAB
+ AS2 (out,__SREG__,__tmp_reg__) CR_TAB
+ AS2 (out,__SP_L__,%A1));
+ }
}
else if (test_hard_reg_class (STACK_REG, src))
{
@@ -1865,7 +1923,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (in,%0,__SREG__);
@@ -1873,7 +1931,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (avr_io_address_p (x, 1))
{
*l = 1;
- return AS2 (in,%0,%1-0x20);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (in,%0,%1-%2);
}
*l = 2;
return AS2 (lds,%0,%1);
@@ -2061,8 +2120,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
if (avr_io_address_p (base, 2))
{
*l = 2;
- return (AS2 (in,%A0,%A1-0x20) CR_TAB
- AS2 (in,%B0,%B1-0x20));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return (AS2 (in,%A0,%A1-%2) CR_TAB
+ AS2 (in,%B0,%B1-%2));
}
*l = 4;
return (AS2 (lds,%A0,%A1) CR_TAB
@@ -2553,7 +2613,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (out,__SREG__,%1);
@@ -2561,7 +2621,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (avr_io_address_p (x, 1))
{
*l = 1;
- return AS2 (out,%0-0x20,%1);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (out,%0-%2,%1);
}
*l = 2;
return AS2 (sts,%0,%1);
@@ -2640,11 +2701,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (avr_io_address_p (base, 2))
{
*l = 2;
- return (AS2 (out,%B0-0x20,%B1) CR_TAB
- AS2 (out,%A0-0x20,%A1));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ if (AVR_XMEGA)
+ return (AS2 (out,%A0-%2,%B1) CR_TAB
+ AS2 (out,%B0-%2,%A1));
+ else
+ return (AS2 (out,%B0-%2,%B1) CR_TAB
+ AS2 (out,%A0-%2,%A1));
}
- return *l = 4, (AS2 (sts,%B0,%B1) CR_TAB
- AS2 (sts,%A0,%A1));
+ if (AVR_XMEGA)
+ return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
+ AS2 (sts,%B0,%B1));
+ else
+ return *l = 4, (AS2 (sts,%B0,%B1) CR_TAB
+ AS2 (sts,%A0,%A1));
}
if (reg_base > 0)
{
@@ -2659,11 +2729,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__));
else
- return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
- AS2 (sbiw,r26,1) CR_TAB
- AS2 (st,X,r26));
+ {
+ if (!AVR_XMEGA)
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1) CR_TAB
+ AS2 (st,X,r26));
+ else
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (st,X,r26) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
else
{
@@ -2671,14 +2750,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
return *l=2, (AS2 (st,X+,%A1) CR_TAB
AS2 (st,X,%B1));
else
- return *l=3, (AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1));
+ {
+ if (!AVR_XMEGA)
+ return *l=3, (AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (st,-X,%A1));
+ else
+ return *l=3, (AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
}
else
- return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
- AS2 (st,%0,%A1));
+ {
+ if (!AVR_XMEGA)
+ return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
+ AS2 (st,%0,%A1));
+ else
+ return *l=2, (AS2 (st,%0,%A1) CR_TAB
+ AS2 (std,%0+1,%B1));
+ }
}
else if (GET_CODE (base) == PLUS)
{
@@ -2689,48 +2781,104 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (reg_base != REG_Y)
fatal_insn ("incorrect insn:",insn);
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
- return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
- AS2 (std,Y+63,%B1) CR_TAB
- AS2 (std,Y+62,%A1) CR_TAB
- AS2 (sbiw,r28,%o0-62));
-
- return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
- AS2 (std,Y+1,%B1) CR_TAB
- AS2 (st,Y,%A1) CR_TAB
- AS2 (subi,r28,lo8(%o0)) CR_TAB
- AS2 (sbci,r29,hi8(%o0)));
+ if (!AVR_XMEGA)
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
+ else
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
}
if (reg_base == REG_X)
{
/* (X + d) = R */
if (reg_src == REG_X)
{
- *l = 7;
- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,__zero_reg__) CR_TAB
- AS2 (st,-X,__tmp_reg__) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
+ if (!AVR_XMEGA)
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0+1) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS2 (st,-X,__tmp_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0));
+ }
+ else
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,__tmp_reg__) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+ if (!AVR_XMEGA)
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0+1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (st,-X,%A1) CR_TAB
AS2 (sbiw,r26,%o0));
}
- *l = 4;
- return (AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
- AS2 (sbiw,r26,%o0));
+ else
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
}
- return *l=2, (AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%A0,%A1));
+
+ if (!AVR_XMEGA)
+ return *l=2, (AS2 (std,%B0,%B1) CR_TAB
+ AS2 (std,%A0,%A1));
+ else
+ return *l=2, (AS2 (std,%A0,%A1) CR_TAB
+ AS2 (std,%B0,%B1));
}
else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- return *l=2, (AS2 (st,%0,%B1) CR_TAB
- AS2 (st,%0,%A1));
+ {
+ if (mem_volatile_p && AVR_XMEGA)
+ return *l = 4, (AS2 (sbiw,%r0,1) CR_TAB
+ AS2 (st,%p0+,%A1) CR_TAB
+ AS2 (st,%p0,%B1) CR_TAB
+ AS2 (sbiw,%r0,2));
+ else
+ return *l=2, (AS2 (st,%0,%B1) CR_TAB
+ AS2 (st,%0,%A1));
+ }
else if (GET_CODE (base) == POST_INC) /* (R++) */
{
- if (mem_volatile_p)
+ if (mem_volatile_p && !AVR_XMEGA)
{
if (REGNO (XEXP (base, 0)) == REG_X)
{
@@ -2751,7 +2899,7 @@ out_movhi_mr_r (rtx insn, rtx op[], int
*l = 2;
return (AS2 (st,%0,%A1) CR_TAB
- AS2 (st,%0,%B1));
+ AS2 (st,%0,%B1));
}
fatal_insn ("unknown move insn:",insn);
return "";
@@ -4631,6 +4779,7 @@ const struct attribute_spec avr_attribut
{ "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
{ "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ NULL, 0, 0, false, false, false, NULL }
@@ -4719,6 +4868,14 @@ avr_handle_fndecl_attribute (tree *node,
func_name);
}
}
+ else if (strncmp (attr, "nmi", strlen ("nmi")) == 0)
+ {
+ if (strncmp (func_name, "__vector", strlen ("__vector")) != 0)
+ {
+ warning (0, "%qs appears to be a misspelled nmi handler",
+ func_name);
+ }
+ }
}
return NULL_TREE;
@@ -4844,7 +5001,8 @@ avr_file_start (void)
/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
fputs ("__SREG__ = 0x3f\n"
"__SP_H__ = 0x3e\n"
- "__SP_L__ = 0x3d\n", asm_out_file);
+ "__SP_L__ = 0x3d\n"
+ "__CCP__ = 0x34\n", asm_out_file);
fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
@@ -5708,15 +5866,18 @@ avr_hard_regno_mode_ok (int regno, enum
return !(regno & 1);
}
-/* Returns 1 if X is a valid address for an I/O register of size SIZE
- (1 or 2). Used for lds/sts -> in/out optimization. Add 0x20 to SIZE
- to check for the lower half of I/O space (for cbi/sbi/sbic/sbis). */
+/* Returns 1 if X is a valid address for an I/O register of size SIZE
+ (1 or 2). Used for lds/sts -> in/out optimization. */
int
avr_io_address_p (rtx x, int size)
{
- return (optimize > 0 && GET_CODE (x) == CONST_INT
- && INTVAL (x) >= 0x20 && INTVAL (x) <= 0x60 - size);
+ if(AVR_XMEGA)
+ return (optimize > 0 && GET_CODE (x) == CONST_INT
+ && INTVAL (x) >= 0 && INTVAL (x) <= 0x40 - size);
+ else
+ return (optimize > 0 && GET_CODE (x) == CONST_INT
+ && INTVAL (x) >= 0x20 && INTVAL (x) <= 0x60 - size);
}
const char *
@@ -5877,16 +6038,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
if (GET_CODE (operands[1]) == CONST_INT)
{
- if (INTVAL (operands[1]) < 0x40)
+ operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */
+ if (low_io_address_operand (operands[1], VOIDmode))
{
if (comp == EQ)
- output_asm_insn (AS2 (sbis,%1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbis,%1-%4,%2), operands);
else
- output_asm_insn (AS2 (sbic,%1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbic,%1-%4,%2), operands);
}
else
{
- output_asm_insn (AS2 (in,__tmp_reg__,%1-0x20), operands);
+ output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands);
if (comp == EQ)
output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
else
--- gcc/config/avr/avr.h.orig 2008-06-08 10:24:28.186941800 -0600
+++ gcc/config/avr/avr.h 2008-06-08 10:28:40.274905800 -0600
@@ -44,8 +44,11 @@ struct base_arch_s {
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
- /* Reserved. */
- int reserved;
+ /* Core is in Xmega family. */
+ int xmega;
+
+ /* Core have RAMPX, RAMPY and RAMPD registers. */
+ int have_rampx_y_d;
const char *const macro;
};
@@ -68,6 +71,13 @@ extern const struct base_arch_s *avr_cur
builtin_define ("__AVR_HAVE_ELPMX__"); \
if (avr_have_movw_lpmx_p) \
builtin_define ("__AVR_HAVE_MOVW__"); \
+ if (avr_current_arch->have_elpm) \
+ { \
+ builtin_define ("__AVR_HAVE_RAMPZ__");\
+ builtin_define ("__AVR_HAVE_ELPM__"); \
+ } \
+ if (avr_current_arch->have_elpmx) \
+ builtin_define ("__AVR_HAVE_ELPMX__"); \
if (avr_have_movw_lpmx_p) \
builtin_define ("__AVR_HAVE_LPMX__"); \
if (avr_asm_only_p) \
@@ -88,6 +98,17 @@ extern const struct base_arch_s *avr_cur
builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
if (TARGET_NO_INTERRUPTS) \
builtin_define ("__NO_INTERRUPTS__"); \
+ if (avr_current_arch->xmega) \
+ { \
+ builtin_define ("__AVR_XMEGA__"); \
+ builtin_define ("__AVR_HAVE_SPMX__"); \
+ } \
+ if (avr_current_arch->have_rampx_y_d) \
+ { \
+ builtin_define ("__AVR_HAVE_RAMPX__");\
+ builtin_define ("__AVR_HAVE_RAMPY__");\
+ builtin_define ("__AVR_HAVE_RAMPD__");\
+ } \
} \
while (0)
@@ -107,10 +128,15 @@ extern GTY(()) section *progmem_section;
#define AVR_HAVE_LPMX (avr_have_movw_lpmx_p)
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
+#define AVR_XMEGA (avr_current_arch->xmega)
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
+#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B)
+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
+
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
#define OVERRIDE_OPTIONS avr_override_options ()
@@ -849,6 +875,8 @@ mmcu=*:-mmcu=%*}"
mmcu=at90usb128*|\
mmcu=at94k: -m avr5}\
%{mmcu=atmega256*:-m avr6}\
+%{mmcu=atxmega64a1:-m avrxmega5} \
+%{mmcu=atxmega128a1:-m avrxmega7} \
%{mmcu=atmega324*|\
mmcu=atmega325*|\
mmcu=atmega328p|\
@@ -994,7 +1022,9 @@ mmcu=*:-mmcu=%*}"
%{mmcu=atmega2561:crtm2561.o%s} \
%{mmcu=at90can128:crtcan128.o%s} \
%{mmcu=at90usb1286:crtusb1286.o%s} \
-%{mmcu=at90usb1287:crtusb1287.o%s}"
+%{mmcu=at90usb1287:crtusb1287.o%s} \
+%{mmcu=atxmega5|mmcu=atxmega64a1:crtx64a1.o%s} \
+%{mmcu=atxmega7|mmcu=atxmega128a1:crtx128a1.o%s}"
#define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
@@ -1050,8 +1080,12 @@ struct machine_function GTY(())
/* 'true' - if current function is a signal function
as specified by the "signal" attribute. */
int is_signal;
-
+
/* 'true' - if current function is a signal function
+ as specified by the "nmi" attribute. */
+ int is_nmi;
+
+ /* 'true' - if current function is a task function
as specified by the "OS_task" attribute. */
int is_OS_task;
};
--- gcc/config/avr/avr.md.orig 2008-06-08 10:24:28.171355800 -0600
+++ gcc/config/avr/avr.md 2008-06-08 10:29:58.610141800 -0600
@@ -47,9 +47,6 @@
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
- (SREG_ADDR 0x5F)
- (RAMPZ_ADDR 0x5B)
-
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
@@ -2681,7 +2678,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
- return AS2 (cbi,%0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (cbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
@@ -2693,7 +2691,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
- return AS2 (sbi,%0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (sbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
Index: gcc/config/avr/predicates.md
===================================================================
--- gcc/config/avr/predicates.md (revision 132445)
+++ gcc/config/avr/predicates.md (working copy)
@@ -45,12 +45,16 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return 1 if OP is the zero constant for MODE.
(define_predicate "const0_operand"
--- gcc/config/avr/t-avr.orig 2008-02-19 17:25:31.546827500 -0700
+++ gcc/config/avr/t-avr 2008-02-20 09:22:51.709554900 -0700
@@ -37,8 +37,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega5/mmcu=avrxmega7
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega5 avrxmega7
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -125,7 +125,9 @@ MULTILIB_MATCHES = \
mmcu?avr51=mmcu?at90usb1286 \
mmcu?avr51=mmcu?at90usb1287 \
mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
+ mmcu?avr6=mmcu?atmega2561 \
+ mmcu?avrxmega5=mmcu?atxmega64a1 \
+ mmcu?avrxmega7=mmcu?atxmega128a1
MULTILIB_EXCEPTIONS =

195
devel/avr-gcc-devel/files/patch-xx-os_main
View file

@ -1,195 +0,0 @@
Not committed
Adds OS_main attribute feature.
Written by Anatoly Sokolov.
Apply patch after XMEGA patch.
--------------------------------------------------------------------------------
Index: gcc/function.c
===================================================================
--- gcc/function.c (revision 133747)
+++ gcc/function.c (working copy)
@@ -4756,6 +4756,14 @@
}
int
+prologue_contains (const_rtx insn)
+{
+ if (contains (insn, &prologue))
+ return 1;
+ return 0;
+}
+
+int
prologue_epilogue_contains (const_rtx insn)
{
if (contains (insn, &prologue))
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h (revision 133747)
+++ gcc/rtl.h (working copy)
@@ -2128,6 +2128,7 @@
/* In function.c */
extern void reposition_prologue_and_epilogue_notes (void);
+extern int prologue_contains (const_rtx);
extern int prologue_epilogue_contains (const_rtx);
extern int sibcall_epilogue_contains (const_rtx);
extern void mark_temp_addr_taken (rtx);
--- gcc/config/avr/avr.h.orig 2008-03-31 16:48:03.477537900 -0600
+++ gcc/config/avr/avr.h 2008-03-31 17:07:51.442457900 -0600
@@ -1095,4 +1095,8 @@ struct machine_function GTY(())
/* 'true' - if current function is a task function
as specified by the "OS_task" attribute. */
int is_OS_task;
+
+ /* 'true' - if current function is a 'main' function
+ as specified by the "OS_main" attribute. */
+ int is_OS_main;
};
--- gcc/config/avr/avr.c.orig Mon Mar 31 19:47:54 2008
+++ gcc/config/avr/avr.c Mon Mar 31 20:50:08 2008
@@ -53,6 +53,7 @@ static int interrupt_function_p (tree);
static int signal_function_p (tree);
static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
+static int avr_OS_main_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
static void avr_args (HARD_REG_SET *);
static int sequent_regs_live (HARD_REG_SET *);
@@ -509,6 +513,19 @@ avr_OS_task_function_p (tree func)
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a OS_main function. */
+
+static int
+avr_OS_main_function_p (tree func)
+{
+ tree a;
+
+ gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
+
+ a = lookup_attribute ("OS_main", TYPE_ATTRIBUTES (TREE_TYPE (func)));
+ return a != NULL_TREE;
+}
+
/* Return the number of hard registers to push/pop in the prologue/epilogue
of the current function, and optionally store these registers in SET. */
@@ -527,9 +544,10 @@ avr_regs_to_save (HARD_REG_SET *set)
count = 0;
/* No need to save any registers if the function never returns or
- is have "OS_task" attribute. */
+ is have "OS_task" or "OS_main" attribute. */
if (TREE_THIS_VOLATILE (current_function_decl)
- || cfun->machine->is_OS_task)
+ || cfun->machine->is_OS_task
+ || cfun->machine->is_OS_main)
return 0;
for (reg = 0; reg < 32; reg++)
@@ -646,6 +664,8 @@ expand_prologue (void)
rtx pushword = gen_rtx_MEM (HImode,
gen_rtx_POST_DEC (HImode, stack_pointer_rtx));
rtx insn;
+ int method1_length;
+ int sp_plus_length;
last_insn_address = 0;
@@ -655,6 +675,7 @@ expand_prologue (void)
cfun->machine->is_signal = signal_function_p (current_function_decl);
cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
+ cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
/* Prologue: naked. */
if (cfun->machine->is_naked)
@@ -669,6 +690,7 @@ expand_prologue (void)
&& !cfun->machine->is_interrupt
&& !cfun->machine->is_signal
&& !cfun->machine->is_OS_task
+ && !cfun->machine->is_OS_main
&& live_seq);
if (cfun->machine->is_interrupt || cfun->machine->is_signal)
@@ -738,7 +760,7 @@ expand_prologue (void)
}
if (frame_pointer_needed)
{
- if(!cfun->machine->is_OS_task)
+ if (!(cfun->machine->is_OS_task || cfun->machine->is_OS_main))
{
/* Push frame pointer. */
insn = emit_move_insn (pushword, frame_pointer_rtx);
@@ -768,7 +790,7 @@ expand_prologue (void)
if (TARGET_TINY_STACK)
{
if (size < -63 || size > 63)
- warning (0, "large frame pointer change (%d) with -mtiny-stack", size);
+ warning (0, "large frame pointer change (%ld) with -mtiny-stack", size);
/* The high byte (r29) doesn't change - prefer 'subi' (1 cycle)
over 'sbiw' (2 cycles, same size). */
@@ -780,7 +802,6 @@ expand_prologue (void)
myfp = frame_pointer_rtx;
}
/* Calculate length. */
- int method1_length;
method1_length =
get_attr_length (gen_move_insn (frame_pointer_rtx, stack_pointer_rtx));
method1_length +=
@@ -878,6 +899,7 @@ expand_epilogue (void)
HARD_REG_SET set;
int minimize;
HOST_WIDE_INT size = get_frame_size();
+ int sp_plus_length;
/* epilogue: naked */
if (cfun->machine->is_naked)
@@ -893,6 +915,7 @@ expand_epilogue (void)
&& !cfun->machine->is_interrupt
&& !cfun->machine->is_signal
&& !cfun->machine->is_OS_task
+ && !cfun->machine->is_OS_main
&& live_seq);
if (minimize && (frame_pointer_needed || live_seq > 4))
@@ -955,7 +978,7 @@ expand_epilogue (void)
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
}
- if(!cfun->machine->is_OS_task)
+ if (!(cfun->machine->is_OS_task || cfun->machine->is_OS_main))
{
/* Restore previous frame_pointer. */
emit_insn (gen_pophi (frame_pointer_rtx));
@@ -1787,10 +1810,18 @@ output_movhi (rtx insn, rtx operands[],
}
/* Use simple load of stack pointer if no interrupts are used
or inside main or signal function prologue where they disabled. */
- else if (TARGET_NO_INTERRUPTS
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
|| (!AVR_XMEGA
- && reload_completed
+ && reload_completed
&& cfun->machine->is_signal
+ && prologue_epilogue_contains (insn))
+ || (!AVR_XMEGA
+ && reload_completed
+ && cfun->machine->is_OS_main
+ && prologue_contains (insn))
+ || (AVR_XMEGA
+ && reload_completed
+ && cfun->machine->is_nmi
&& prologue_epilogue_contains (insn)))
{
*l = 2;
@@ -4821,6 +4852,7 @@ const struct attribute_spec avr_attribut
{ "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ NULL, 0, 0, false, false, false, NULL }
};

16
devel/avr-gcc-devel/pkg-descr
View file

@ -1,16 +0,0 @@
FSF gcc-4.3.x for Atmel AVR cross-development
Included is the basic C++ compiler, although this is only of limited
use without a libstdc++, and it is little tested.
Locally added support for the following AVR devices:
ATmega32C1, ATmega32M1, ATmega32U4
ATtiny167
ATxmega64A1, ATxmega128A1
The binaries are installed with a -43 exec file suffix so they do not
collide with the binaries from the devel/avr-gcc port.
WWW: http://gcc.gnu.org/
WWW: http://www.nongnu.org/avr-libc/

109
devel/avr-gcc-devel/pkg-plist
View file

@ -1,109 +0,0 @@
bin/avr-avr-c++-43
bin/avr-avr-g++-43
bin/avr-avr-gcc-43
bin/avr-c++-43
bin/avr-cpp-43
bin/avr-g++-43
bin/avr-gcc-43
bin/avr-gcc-4.3.1
bin/avr-gccbug-43
lib/gcc/avr/4.3.1/avr25/libgcc.a
lib/gcc/avr/4.3.1/avr25/libgcov.a
lib/gcc/avr/4.3.1/avr3/libgcc.a
lib/gcc/avr/4.3.1/avr3/libgcov.a
lib/gcc/avr/4.3.1/avr31/libgcc.a
lib/gcc/avr/4.3.1/avr31/libgcov.a
lib/gcc/avr/4.3.1/avr35/libgcc.a
lib/gcc/avr/4.3.1/avr35/libgcov.a
lib/gcc/avr/4.3.1/avr4/libgcc.a
lib/gcc/avr/4.3.1/avr4/libgcov.a
lib/gcc/avr/4.3.1/avr5/libgcc.a
lib/gcc/avr/4.3.1/avr51/libgcc.a
lib/gcc/avr/4.3.1/avr51/libgcov.a
lib/gcc/avr/4.3.1/avr5/libgcov.a
lib/gcc/avr/4.3.1/avr6/libgcc.a
lib/gcc/avr/4.3.1/avr6/libgcov.a
lib/gcc/avr/4.3.1/avrxmega5/libgcc.a
lib/gcc/avr/4.3.1/avrxmega5/libgcov.a
lib/gcc/avr/4.3.1/avrxmega7/libgcc.a
lib/gcc/avr/4.3.1/avrxmega7/libgcov.a
lib/gcc/avr/4.3.1/include-fixed/README
lib/gcc/avr/4.3.1/include-fixed/fixed
lib/gcc/avr/4.3.1/include-fixed/limits.h
lib/gcc/avr/4.3.1/include-fixed/syslimits.h
lib/gcc/avr/4.3.1/include/float.h
lib/gcc/avr/4.3.1/include/iso646.h
lib/gcc/avr/4.3.1/include/stdarg.h
lib/gcc/avr/4.3.1/include/stdbool.h
lib/gcc/avr/4.3.1/include/stddef.h
lib/gcc/avr/4.3.1/include/stdfix.h
lib/gcc/avr/4.3.1/include/tgmath.h
lib/gcc/avr/4.3.1/include/unwind.h
lib/gcc/avr/4.3.1/include/varargs.h
lib/gcc/avr/4.3.1/install-tools/fixinc_list
lib/gcc/avr/4.3.1/install-tools/gsyslimits.h
lib/gcc/avr/4.3.1/install-tools/include/README
lib/gcc/avr/4.3.1/install-tools/include/limits.h
lib/gcc/avr/4.3.1/install-tools/macro_list
lib/gcc/avr/4.3.1/install-tools/mkheaders.conf
lib/gcc/avr/4.3.1/libgcc.a
lib/gcc/avr/4.3.1/libgcov.a
libexec/gcc/avr/4.3.1/cc1
libexec/gcc/avr/4.3.1/cc1plus
libexec/gcc/avr/4.3.1/collect2
libexec/gcc/avr/4.3.1/install-tools/fix-header
libexec/gcc/avr/4.3.1/install-tools/fixinc.sh
libexec/gcc/avr/4.3.1/install-tools/fixincl
libexec/gcc/avr/4.3.1/install-tools/fixproto
libexec/gcc/avr/4.3.1/install-tools/mkheaders
libexec/gcc/avr/4.3.1/install-tools/mkinstalldirs
share/locale/be/LC_MESSAGES/cpplib.mo
share/locale/be/LC_MESSAGES/gcc.mo
share/locale/ca/LC_MESSAGES/cpplib.mo
share/locale/da/LC_MESSAGES/cpplib.mo
share/locale/da/LC_MESSAGES/gcc.mo
share/locale/de/LC_MESSAGES/cpplib.mo
share/locale/de/LC_MESSAGES/gcc.mo
share/locale/el/LC_MESSAGES/cpplib.mo
share/locale/el/LC_MESSAGES/gcc.mo
share/locale/es/LC_MESSAGES/cpplib.mo
share/locale/es/LC_MESSAGES/gcc.mo
share/locale/fr/LC_MESSAGES/cpplib.mo
share/locale/fr/LC_MESSAGES/gcc.mo
share/locale/ja/LC_MESSAGES/cpplib.mo
share/locale/ja/LC_MESSAGES/gcc.mo
share/locale/nl/LC_MESSAGES/cpplib.mo
share/locale/nl/LC_MESSAGES/gcc.mo
share/locale/ru/LC_MESSAGES/gcc.mo
share/locale/sr/LC_MESSAGES/gcc.mo
share/locale/sv/LC_MESSAGES/cpplib.mo
share/locale/sv/LC_MESSAGES/gcc.mo
share/locale/tr/LC_MESSAGES/cpplib.mo
share/locale/tr/LC_MESSAGES/gcc.mo
share/locale/uk/LC_MESSAGES/cpplib.mo
share/locale/vi/LC_MESSAGES/cpplib.mo
share/locale/zh_CN/LC_MESSAGES/cpplib.mo
share/locale/zh_CN/LC_MESSAGES/gcc.mo
share/locale/zh_TW/LC_MESSAGES/cpplib.mo
share/locale/zh_TW/LC_MESSAGES/gcc.mo
@dirrm lib/gcc/avr/4.3.1/avr25
@dirrm lib/gcc/avr/4.3.1/avr3
@dirrm lib/gcc/avr/4.3.1/avr31
@dirrm lib/gcc/avr/4.3.1/avr35
@dirrm lib/gcc/avr/4.3.1/avr4
@dirrm lib/gcc/avr/4.3.1/avr5
@dirrm lib/gcc/avr/4.3.1/avr51
@dirrm lib/gcc/avr/4.3.1/avr6
@dirrm lib/gcc/avr/4.3.1/avrxmega5
@dirrm lib/gcc/avr/4.3.1/avrxmega7
@dirrm lib/gcc/avr/4.3.1/include
@dirrm lib/gcc/avr/4.3.1/include-fixed
@dirrm lib/gcc/avr/4.3.1/install-tools/include
@dirrm lib/gcc/avr/4.3.1/install-tools
@dirrm lib/gcc/avr/4.3.1
@dirrm lib/gcc/avr
@dirrm lib/gcc
@dirrm libexec/gcc/avr/4.3.1/install-tools
@dirrm libexec/gcc/avr/4.3.1
@dirrm libexec/gcc/avr
@dirrm libexec/gcc