New port: cad/fasm: FPGA assembly (FASM) parser and generator

This commit is contained in:
Yuri Victorovich 2019-10-27 01:00:18 +00:00
parent b6812a7e02
commit 9974b99d68
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=515742
4 changed files with 34 additions and 0 deletions

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SUBDIR += dinotrace
SUBDIR += electric
SUBDIR += electric-ng
SUBDIR += fasm
SUBDIR += feappv
SUBDIR += fidocadj
SUBDIR += freecad

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cad/fasm/Makefile Normal file
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# $FreeBSD$
PORTNAME= fasm
PORTVERSION= g20190920
CATEGORIES= cad python
MAINTAINER= yuri@FreeBSD.org
COMMENT= FPGA assembly (FASM) parser and generator
LICENSE= ISCL
LICENSE_FILE= ${WRKSRC}/COPYING
RUN_DEPENDS= ${PYTHON_PKGNAMEPREFIX}textX>0:lang/py-textX@${PY_FLAVOR}
USES= python
USE_GITHUB= yes
GH_ACCOUNT= SymbiFlow
GH_TAGNAME= b8db365
USE_PYTHON= distutils concurrent noflavors autoplist
NO_ARCH= yes
.include <bsd.port.mk>

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cad/fasm/distinfo Normal file
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TIMESTAMP = 1572137905
SHA256 (SymbiFlow-fasm-g20190920-b8db365_GH0.tar.gz) = eff6550ce5c6dff464b26c5fc8d7e4ff335289b1e9475bbc8a1b403ac305fe23
SIZE (SymbiFlow-fasm-g20190920-b8db365_GH0.tar.gz) = 57454

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cad/fasm/pkg-descr Normal file
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FPGA Assembly is a file format designed by the SymbiFlow Project developers to
provide a plain text file format for configuring the internals of an FPGA.
It is designed to allow FPGA place and route to not care about the actual
bitstream format used on an FPGA.
WWW: https://github.com/SymbiFlow/fasm