Fix qt5 builds on some arm architectures

* 222612: www/qt5-webkit: for armv6/v7: The cacheFlush support is missing on this platform
* 216816: devel/qt5: In arch.test, use CXXFLAGS from make environment

PR:		222612,216816, 223289
Exp-run by:	antoine
Submitted by:	mmel, mikael.urankar@gmail.com
Reported by:	Mark Millard <markmi@dsl-only.net>, mmel
Reviewed by:	mmel, mikael.urankar@gmail.com
Differential Revision:	https://reviews.freebsd.org/D12816

Mk/bsd.qt.mk

@@ -179,7 +179,8 @@ _EXTRA_PATCHES_QT4=	${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-src-cor
 _EXTRA_PATCHES_QT4+=	${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-armv6
 .  else
 _EXTRA_PATCHES_QT5=	${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-mkspecs_features_create__cmake.prf \
-					${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-mkspecs_features_qt__module.prf
+					${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-mkspecs_features_qt__module.prf \
+					${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-config.tests_unix_arch.test
 .  endif
 EXTRA_PATCHES?=	${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-configure \
 		${.CURDIR:H:H}/devel/${_QT_RELNAME}/files/extrapatch-config.tests-unix-compile.test \

devel/qt5/files/extrapatch-config.tests_unix_arch.test

@@ -0,0 +1,15 @@
+For many architectures (armv6, aarch64), is -mcpu is essential for proper
+detection of  CPU features. Follow compile.test case and reuse CXXFLAGS 
+from make environment also in arch.test.
+
+--- config.tests/unix/arch.test.orig	2017-02-05 07:43:57 UTC
++++ config.tests/unix/arch.test
+@@ -17,7 +17,7 @@ else
+ fi
+ 
+ LFLAGS="$SYSROOT_FLAG"
+-CXXFLAGS="$SYSROOT_FLAG"
++CXXFLAGS="$CXXFLAGS $SYSROOT_FLAG"
+ 
+ while [ "$#" -gt 0 ]; do
+     PARAM=$1

www/qt5-webkit/files/patch-Source_JavaScriptCore_assembler_ARMAssembler.h

@@ -0,0 +1,14 @@
+armv6/v7: cacheFlush support
+See PR 222612
+
+--- Source/JavaScriptCore/assembler/ARMAssembler.h.orig	2017-08-23 05:02:37 UTC
++++ Source/JavaScriptCore/assembler/ARMAssembler.h
+@@ -1128,6 +1128,8 @@ namespace JSC {
+                 linuxPageFlush(current, current + page);
+ 
+             linuxPageFlush(current, end);
++#elif OS(FREEBSD)
++        __clear_cache(code, reinterpret_cast<char*>(code) + size);
+ #else
+ #error "The cacheFlush support is missing on this platform."
+ #endif

www/qt5-webkit/files/patch-Source_JavaScriptCore_assembler_ARMv7Assembler.h

@@ -0,0 +1,14 @@
+armv6/v7: cacheFlush support
+See PR 222612
+
+--- Source/JavaScriptCore/assembler/ARMv7Assembler.h.orig	2017-08-23 04:59:46 UTC
++++ Source/JavaScriptCore/assembler/ARMv7Assembler.h
+@@ -2373,6 +2373,8 @@ class ARMv7Assembler { (public)
+             linuxPageFlush(current, current + page);
+
+         linuxPageFlush(current, end);
++#elif OS(FREEBSD)
++        __clear_cache(code, reinterpret_cast<char*>(code) + size);
+ #else
+ #error "The cacheFlush support is missing on this platform."
+ #endif

www/qt5-webkit/files/patch-Source_JavaScriptCore_offlineasm_arm.rb

@@ -0,0 +1,20 @@
+armv6/v7:
+Don't emit ARMv7 instructions (movw, movt) for ARMv6 targets.
+
+See PR 222612
+
+--- Source/JavaScriptCore/offlineasm/arm.rb.orig	2017-08-24 10:30:41 UTC
++++ Source/JavaScriptCore/offlineasm/arm.rb
+@@ -502,8 +502,12 @@ class Instruction
+                 $asm.puts "mov #{armFlippedOperands(operands)}"
+             end
+         when "mvlbl"
++            if isARMv7 or isARMv7Traditional
+                 $asm.puts "movw #{operands[1].armOperand}, \#:lower16:#{operands[0].value}"
+                 $asm.puts "movt #{operands[1].armOperand}, \#:upper16:#{operands[0].value}"
++            else
++                $asm.puts "ldr #{operands[1].armOperand}, =#{operands[0].value}"
++            end
+         when "nop"
+             $asm.puts "nop"
+         when "bieq", "bpeq", "bbeq"

www/qt5-webkit/files/patch-Source_WTF_wtf_Platform.h

@@ -0,0 +1,24 @@
+armv6/v7:
+See PR 222612
+
+Add proper architecture name:
+  https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01679.html
+
+--- Source/WTF/wtf/Platform.h.orig	2017-06-04 20:16:06 UTC
++++ Source/WTF/wtf/Platform.h
+@@ -226,6 +226,7 @@
+ #elif defined(__ARM_ARCH_6__) \
+     || defined(__ARM_ARCH_6J__) \
+     || defined(__ARM_ARCH_6K__) \
++    || defined(__ARM_ARCH_6KZ__) \
+     || defined(__ARM_ARCH_6Z__) \
+     || defined(__ARM_ARCH_6ZK__) \
+     || defined(__ARM_ARCH_6T2__) \
+@@ -272,6 +273,7 @@
+
+ #elif defined(__ARM_ARCH_6J__) \
+     || defined(__ARM_ARCH_6K__) \
++    || defined(__ARM_ARCH_6KZ__) \
+     || defined(__ARM_ARCH_6Z__) \
+     || defined(__ARM_ARCH_6ZK__) \
+     || defined(__ARM_ARCH_6M__)

www/qt5-webkit/files/patch-Source_WebCore_platform_graphics_cpu_arm_filters_FELightingNEON.cpp

@@ -0,0 +1,18 @@
+armv6/v7:
+Use correct UAL syntax for 'vmov rx, ry,...' instruction. 
+The '.u32' modifier in not allowed for this operand combination 
+by ARM ARM, but gas silently ignores it.
+
+See PR 222612
+
+--- Source/WebCore/platform/graphics/cpu/arm/filters/FELightingNEON.cpp.orig	2017-08-23 05:04:24 UTC
++++ Source/WebCore/platform/graphics/cpu/arm/filters/FELightingNEON.cpp
+@@ -403,7 +403,7 @@ TOSTRING(neonDrawLighting) ":" NL
+     "vmin.f32 " TMP2_D0 ", " TMP2_D0 ", " CONST_ONE_HI_D NL
+     "vmul.f32 " TMP3_Q ", " COLOR_Q ", " TMP2_D0 "[1]" NL
+     "vcvt.u32.f32 " TMP3_Q ", " TMP3_Q NL
+-    "vmov.u32 r2, r3, " TMP3_S0 ", " TMP3_S1 NL
++    "vmov r2, r3, " TMP3_S0 ", " TMP3_S1 NL
+     // The color values are stored in-place.
+     "strb r2, [" PIXELS_R ", #-11]" NL
+     "strb r3, [" PIXELS_R ", #-10]" NL

www/qt5-webkit/files/patch-Source_bmalloc_bmalloc_BPlatform.h

@@ -0,0 +1,24 @@
+armv6/v7:
+See PR 222612
+
+Add proper architecture name:
+  https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01679.html
+
+--- Source/bmalloc/bmalloc/BPlatform.h.orig	2017-06-04 20:16:07 UTC
++++ Source/bmalloc/bmalloc/BPlatform.h
+@@ -108,6 +108,7 @@
+ #elif defined(__ARM_ARCH_6__) \
+ || defined(__ARM_ARCH_6J__) \
+ || defined(__ARM_ARCH_6K__) \
++|| defined(__ARM_ARCH_6KZ__) \
+ || defined(__ARM_ARCH_6Z__) \
+ || defined(__ARM_ARCH_6ZK__) \
+ || defined(__ARM_ARCH_6T2__) \
+@@ -147,6 +148,7 @@
+
+ #elif defined(__ARM_ARCH_6J__) \
+ || defined(__ARM_ARCH_6K__) \
++|| defined(__ARM_ARCH_6KZ__) \
+ || defined(__ARM_ARCH_6Z__) \
+ || defined(__ARM_ARCH_6ZK__) \
+ || defined(__ARM_ARCH_6M__)