Maintainer update to snapshot version. In addition to fixing the port

for gcc3.3, 10 months of updates are included:

- Rework expression parsing and elaboration to accomodate real/realtime
values and expressions.
- Calculate delay statement delays using elaborated expressions instead
of pre-elaborated expression trees.
- Implement the wait statement behaviorally instead of as nets.
- Support event names as expression elements.
- Fix configuration errors, spelling errors, clarification of certain
objects.

See internal revision logs in each file for more elaboration.

cad/iverilog/Makefile

@@ -7,10 +7,12 @@
 #
 
 PORTNAME=	iverilog
-PORTVERSION=	0.7
+PORTVERSION=	0.7.20030722
 CATEGORIES=	cad
-MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/v${PORTVERSION}/
-DISTNAME=	verilog-${PORTVERSION}
+#MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/v${PORTVERSION}/
+#DISTNAME=	verilog-${PORTVERSION}
+MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/snapshots/
+DISTNAME=	verilog-20030722
 
 MAINTAINER=	watchman@ludd.luth.se
 COMMENT=	A Verilog simulation and synthesis tool

cad/iverilog/distinfo

@@ -1 +1 @@
-MD5 (verilog-0.7.tar.gz) = c8f09bc061e890242d39b9afc8e69698
+MD5 (verilog-20030722.tar.gz) = b435baa100fb368a9cfc12f510af9c6e