kpriv/freebsd-ports
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Fix a few typos in ports/cad.

Browse source
This commit is contained in:
Jimmy Olgeni 2010-07-30 14:51:37 +00:00
parent 2c0c53adc6
commit ece96ee943
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=258505
10 changed files with 11 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
cad/cider/pkg-descr
View file

@ -27,7 +27,7 @@ lines, and the five most common semiconductor devices: diodes, BJTs, JFETs,
MESFETs, and MOSFETs.
From the SPICE3 Version3f3 User's Manual.
This is availble as a postscript document from:
This is available as a postscript document from:
ftp://ic.eecs.berkeley.edu/pub/Spice3/um.3f3.ps
or you can read the online documentation on the homepage.

2
cad/electric-ng/pkg-descr
View file

@ -24,7 +24,7 @@ Electric can display these types of design:
- Digital filters, Temporal logic
- Artwork
For real funcionality, one should consider installing
For real functionality, one should consider installing
support simulation software such as cad/spice.
Author: Static Free Software & Sun Microsystems, Inc.

2
cad/electric/pkg-descr
View file

@ -16,7 +16,7 @@ Electric handles these file formats:
DXF I/O
PostScript, HPGL, and QuickDraw output
For real funcionality, one should consider installing
For real functionality, one should consider installing
support simulation software such as cad/spice.
WWW: http://www.gnu.org/software/electric/electric.html

2
cad/geda-symcheck/pkg-descr
View file

@ -1,3 +1,3 @@
gsymcheck is the gEDA symbol checking utilty
gsymcheck is the gEDA symbol checking utility
WWW: http://www.geda.seul.org

2
cad/iverilog/pkg-descr
View file

@ -1,5 +1,5 @@
Icarus Verilog is a Verilog simulation and synthesis tool. It
operates as a compiler, compiling source code writen in Verilog
operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format. For batch simulation, the
compiler can generate C++ code that is compiled and linked with
a run time library (called "vvm") then executed as a command to

2
cad/linux-eagle/pkg-descr
View file

@ -20,7 +20,7 @@ o Support is only available via email or through our forum (no fax or phone
support).
o Use is limited to non-profit applications or evaluation purposes.
Apart from these limitiations the EAGLE Light Edition can do anything the
Apart from these limitations the EAGLE Light Edition can do anything the
Professional Edition can do. You can even load, view and print drawings that
exceed these limits!

2
cad/linux-eagle5/pkg-descr
View file

@ -20,7 +20,7 @@ o Support is only available via email or through our forum (no fax or phone
support).
o Use is limited to non-profit applications or evaluation purposes.
Apart from these limitiations the EAGLE Light Edition can do anything the
Apart from these limitations the EAGLE Light Edition can do anything the
Professional Edition can do. You can even load, view and print drawings that
exceed these limits!

4
cad/pdnmesh/pkg-descr
View file

@ -16,9 +16,9 @@ The features of the program are as follows.
* Eigenvalue solution using LAPACK.
* (Optionally) Eigenvalue solution using QR iteration with shifts.
* Generating plots of contours, mesh and gradient on screen.
* Generating Encapsulated Postscript plots of countours and mesh.
* Generating Encapsulated Postscript plots of contours and mesh.
* Generating a data file of the mesh to be used by other solvers.
* Can import DXF files generated by CAD programs.
* GUI is avaibale with glut and GTK/GTKGLExt. Needs OpenGL.
* GUI is available with glut and GTK/GTKGLExt. Needs OpenGL.
WWW: http://pdnmesh.sourceforge.net/

2
cad/tkgate/pkg-descr
View file

@ -5,7 +5,7 @@ design. The simulator can be controlled either interactively or
through a simulation script. Memory contents can be loaded from
files, and a microcode/macrocode compiler (gmac) is included to create
tkgate memory files from a high-level description. The simulator
supports continous simulation, single step simulation (by clock or
supports continuous simulation, single step simulation (by clock or
epoch) and breakpoints. Save files are in a Verilog-like format.
TkGate also includes a number of tutorial and example circuits which

2
cad/transcalc/pkg-descr
View file

@ -8,7 +8,7 @@ used. Transcalc is built using the GIMP toolkit (GTK) for its GUI interface.
For each type of transmission line, using dialog boxes, you can enter values
for the various parameters, and either calculate its electrical properties
(analyze), or use the given electrical requirements to sythesize physical
(analyze), or use the given electrical requirements to synthesize physical
parameters of the required transmission line.
Available transmission lines (this list will expand with subsequent releases):