Commit graph

6 commits

Author SHA1 Message Date
Li-Wen Hsu
37e94182cd - Update to 20180103 snapshot 2018-01-07 16:34:56 +00:00
Gerald Pfeifer
e59c88cece Bump PORTREVISION for ports depending on the canonical version of GCC
(via Mk/bsd.default-versions.mk and lang/gcc) which has moved from
GCC 5.4 to GCC 6.4 under most circumstances.

This includes ports
 - with USE_GCC=yes or USE_GCC=any,
 - with USES=fortran,
 - using Mk/bsd.octave.mk which in turn features USES=fortran, and
 - with USES=compiler specifying openmp, nestedfct, c++11-lib, c++11-lang,
   c++14-lang, c++0x, c11, or gcc-c++11-lib.

PR:		219275
2017-09-10 20:55:38 +00:00
Li-Wen Hsu
f26d406e43 - Update to 20170809 snapshot 2017-08-11 17:50:49 +00:00
Gerald Pfeifer
04d6f52202 Bump PORTREVISIONs for ports depending on the canonical version of GCC and
lang/gcc which have moved from GCC 4.9.4 to GCC 5.4 (at least under some
circumstances such as versions of FreeBSD or platforms).

This includes ports
 - with USE_GCC=yes or USE_GCC=any,
 - with USES=fortran,
 - using using Mk/bsd.octave.mk which in turn has USES=fortran, and
 - with USES=compiler specifying openmp, nestedfct, c++11-lib, c++14-lang,
   c++11-lang, c++0x, c11, or gcc-c++11-lib.

PR:		216707
2017-04-01 15:23:30 +00:00
Li-Wen Hsu
6bf35d1af2 - Makr only for amd64 2017-02-08 07:08:25 +00:00
Li-Wen Hsu
be8438731c Add RISC-V ISA Simulator:
- emulators/riscv-fesvr, RISC-V Frontend Server
- emulators/riscv-isa-sim, Spike, a RISC-V ISA Simulator

Original work is done by sbruno

Reviewed by:	br (earlier version)
Differential Revision:	https://reviews.freebsd.org/D7527
2017-02-07 15:33:04 +00:00