literal name_enable wherever possible, and ${name}_enable
when it's not, to prepare for the demise of set_rcvar().
In cases where I had to hand-edit unusual instances also
modify formatting slightly to be more uniform (and in
some cases, correct). This includes adding some $FreeBSD$
tags, and most importantly moving rcvar= to right after
name= so it's clear that one is derived from the other.
my ports in the past 3 weeks while ports were broken on any 10.x
machines, which means I'm unable to maintain them. So let people know
that there's no available support for them until things are back to
normal (which also means that anyone with spare time will be able
to fix them without getting approval).
After unfreeze I'll change the shebang line patching code to use
sed instead of ruby. For now this solution will work since these files
already contains correct paths to ruby anyway.
PR: ports/112496
Submitted by: Victor Snezhko<snezhko@indorsoft.ru>
Approved by: portmgr (linimon)
* Chase CURRENT scheduler code update
* Fix building on 6-STABLE/amd64 [1] [2]
- Remove reference to unexsistent web page [3]
- Use new devcpu-data port for microcode updates.
PR: ports/114098 [1], ports/114103 [2]
Reported by: Simun Mikecin <numisemis@yahoo.com> [1],
Larry Rosenman <ler@lerctr.org> [2],
mnag [3]
- Add rcNG startup script that allows update cpucodes on startup
- Add utility to extract cpucodes from Award BIOS update images
- Add additional amd microcode upodate extracted from update images,
provided by pav@
Thanks to netchild@ and pav@ for suggestions and information regarding
BIOS updates.
This kernel module provides access to i386/amd64 CPUs MSR (Model Specific
Register) registers and cpuid info through /dev/cpu%d devices, where %d
corresponds to cpu number.
It can be used with x86info to retrive information available from MSR registers.
Additionally, this module can be used to update/replace microcode of cpus.
PR: ports/ports/102454
Submitted by: stas
