27a66f0176
PR: ports/193155 Submitted by: Ports Fury.
65 lines
2.7 KiB
C
65 lines
2.7 KiB
C
--- arch/bfin/common/bfin-dis.c.orig
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+++ arch/bfin/common/bfin-dis.c
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@@ -310,7 +310,7 @@
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REG_RL7,
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REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6,
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REG_RH7,
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2,
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REG_P3,
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REG_P4, REG_P5, REG_SP, REG_FP, REG_A0x, REG_A1x, REG_A0w, REG_A1w,
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@@ -401,7 +401,7 @@
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/* R(0..7) */
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static enum machine_registers decode_dregs[] = {
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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};
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#define dregs(x) REGNAME(decode_dregs[(x) & 7])
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@@ -497,7 +497,7 @@
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/* dregs pregs */
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static enum machine_registers decode_dpregs[] = {
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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};
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@@ -505,7 +505,7 @@
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/* [dregs pregs] */
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static enum machine_registers decode_gregs[] = {
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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};
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@@ -513,7 +513,7 @@
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/* [dregs pregs (iregs mregs) (bregs lregs)] */
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static enum machine_registers decode_regs[] = {
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
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REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
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@@ -626,7 +626,7 @@
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/* [dregs pregs (iregs mregs) (bregs lregs) dregs2_sysregs1 open sysregs2 sysregs3] */
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static enum machine_registers decode_allregs[] = {
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- REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
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REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
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@@ -685,7 +685,7 @@
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get_allreg (int grp, int reg)
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{
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int fullreg = (grp << 3) | reg;
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- /* REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
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+ /* REG_RR0, REG_RR1, REG_RR2, REG_RR3, REG_RR4, REG_RR5, REG_RR6, REG_RR7,
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REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
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REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
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