11 lines
524 B
Text
11 lines
524 B
Text
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This port needs information about the memory cache system before building.
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You can set this in the variable RSB_USER_SET_MEM_HIERARCHY_INFO, for example
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make RSB_USER_SET_MEM_HIERARCHY_INFO="L2:12/64/3M,L1:64/8/32K"
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Finding these values is tricky, but the following steps will help:
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1. read the README file in the source code
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2. build the port misc/cpuid
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3. run the program cpuid
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You are on your own in figuring out how to convert the information from the
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program cpuid to the value of RSB_USER_SET_MEM_HIERARCHY_INFO.
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