freebsd-ports/devel/yosys/pkg-plist
Antoine Brodin 41715c6d8a Fix plist
2018-12-08 16:03:25 +00:00

91 lines
3 KiB
Text

bin/yosys
bin/yosys-config
bin/yosys-filterlib
bin/yosys-smtbmc
%%DATADIR%%/achronix/speedster22i/cells_map.v
%%DATADIR%%/achronix/speedster22i/cells_sim.v
%%DATADIR%%/adff2dff.v
%%DATADIR%%/cells.lib
%%DATADIR%%/coolrunner2/cells_latch.v
%%DATADIR%%/coolrunner2/cells_sim.v
%%DATADIR%%/coolrunner2/tff_extract.v
%%DATADIR%%/coolrunner2/xc2_dff.lib
%%DATADIR%%/dff2ff.v
%%DATADIR%%/ecp5/arith_map.v
%%DATADIR%%/ecp5/cells_map.v
%%DATADIR%%/ecp5/cells_sim.v
%%DATADIR%%/ecp5/dram.txt
%%DATADIR%%/ecp5/drams_map.v
%%DATADIR%%/gowin/cells_map.v
%%DATADIR%%/gowin/cells_sim.v
%%DATADIR%%/greenpak4/cells_blackbox.v
%%DATADIR%%/greenpak4/cells_latch.v
%%DATADIR%%/greenpak4/cells_map.v
%%DATADIR%%/greenpak4/cells_sim.v
%%DATADIR%%/greenpak4/cells_sim_ams.v
%%DATADIR%%/greenpak4/cells_sim_digital.v
%%DATADIR%%/greenpak4/cells_sim_wip.v
%%DATADIR%%/greenpak4/gp_dff.lib
%%DATADIR%%/ice40/arith_map.v
%%DATADIR%%/ice40/brams.txt
%%DATADIR%%/ice40/brams_init1.vh
%%DATADIR%%/ice40/brams_init2.vh
%%DATADIR%%/ice40/brams_init3.vh
%%DATADIR%%/ice40/brams_map.v
%%DATADIR%%/ice40/cells_map.v
%%DATADIR%%/ice40/cells_sim.v
%%DATADIR%%/ice40/latches_map.v
%%DATADIR%%/include/backends/ilang/ilang_backend.h
%%DATADIR%%/include/frontends/ast/ast.h
%%DATADIR%%/include/kernel/celledges.h
%%DATADIR%%/include/kernel/celltypes.h
%%DATADIR%%/include/kernel/consteval.h
%%DATADIR%%/include/kernel/hashlib.h
%%DATADIR%%/include/kernel/log.h
%%DATADIR%%/include/kernel/macc.h
%%DATADIR%%/include/kernel/modtools.h
%%DATADIR%%/include/kernel/register.h
%%DATADIR%%/include/kernel/rtlil.h
%%DATADIR%%/include/kernel/satgen.h
%%DATADIR%%/include/kernel/sigtools.h
%%DATADIR%%/include/kernel/utils.h
%%DATADIR%%/include/kernel/yosys.h
%%DATADIR%%/include/libs/ezsat/ezminisat.h
%%DATADIR%%/include/libs/ezsat/ezsat.h
%%DATADIR%%/include/libs/sha1/sha1.h
%%DATADIR%%/include/passes/fsm/fsmdata.h
%%DATADIR%%/intel/a10gx/cells_map.v
%%DATADIR%%/intel/a10gx/cells_sim.v
%%DATADIR%%/intel/common/altpll_bb.v
%%DATADIR%%/intel/common/brams.txt
%%DATADIR%%/intel/common/brams_map.v
%%DATADIR%%/intel/common/m9k_bb.v
%%DATADIR%%/intel/cyclone10/cells_map.v
%%DATADIR%%/intel/cyclone10/cells_sim.v
%%DATADIR%%/intel/cycloneiv/cells_map.v
%%DATADIR%%/intel/cycloneiv/cells_sim.v
%%DATADIR%%/intel/cycloneive/cells_map.v
%%DATADIR%%/intel/cycloneive/cells_sim.v
%%DATADIR%%/intel/cyclonev/cells_map.v
%%DATADIR%%/intel/cyclonev/cells_sim.v
%%DATADIR%%/intel/max10/cells_map.v
%%DATADIR%%/intel/max10/cells_sim.v
%%DATADIR%%/pmux2mux.v
%%DATADIR%%/python3/smtio.py
%%DATADIR%%/simcells.v
%%DATADIR%%/simlib.v
%%DATADIR%%/techmap.v
%%DATADIR%%/xilinx/arith_map.v
%%DATADIR%%/xilinx/brams.txt
%%DATADIR%%/xilinx/brams_bb.v
%%DATADIR%%/xilinx/brams_init_16.vh
%%DATADIR%%/xilinx/brams_init_18.vh
%%DATADIR%%/xilinx/brams_init_32.vh
%%DATADIR%%/xilinx/brams_init_36.vh
%%DATADIR%%/xilinx/brams_map.v
%%DATADIR%%/xilinx/cells_map.v
%%DATADIR%%/xilinx/cells_sim.v
%%DATADIR%%/xilinx/cells_xtra.v
%%DATADIR%%/xilinx/drams.txt
%%DATADIR%%/xilinx/drams_map.v
%%DATADIR%%/xilinx/lut2lut.v