kpriv/freebsd-ports
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
freebsd-ports/cad/iverilog/pkg-comment
Ying-Chieh Liao 7bf8e1d6ec add iverilog, a Verilog simulation and synthesis tool
2001-02-13 11:02:15 +00:00

1 line
58 B
Text
Raw Blame History

Icarus Verilog is a Verilog simulation and synthesis tool
Reference in a new issue View git blame Copy permalink