freebsd-ports/cad/verilator/Makefile
Steve Wills 250d86f4fc cad/verilator: remove unnecessary BUILD_DEPENDS
PR:		235053
Submitted by:	John Hein <jcfyecrayz@liamekaens.com>
Approved by:	Kevin Zheng <kevinz5000@gmail.com> (maintainer)
2019-01-27 12:34:34 +00:00

30 lines
678 B
Makefile

# $FreeBSD$
PORTNAME= verilator
PORTVERSION= 4.008
PORTREVISION= 1
CATEGORIES= cad
MASTER_SITES= https://www.veripool.org/ftp/
MAINTAINER= kevinz5000@gmail.com
COMMENT= Synthesizable Verilog to C++ compiler
LICENSE= GPLv3
LICENSE_FILE= ${WRKSRC}/COPYING
USES= bison gmake pathfix perl5 tar:tgz
GNU_CONFIGURE= yes
CONFIGURE_ENV= INSTALL_PROGRAM="${INSTALL_SCRIPT}"
post-patch:
${REINPLACE_CMD} -e 's|@pkgconfigdir@|${PREFIX}/libdata/pkgconfig|' \
${WRKSRC}/Makefile.in
post-build:
@${STRIP_CMD} ${WRKSRC}/bin/verilator_bin
post-install:
${RM} ${STAGEDIR}${PREFIX}/bin/verilator_bin_dbg ${STAGEDIR}${PREFIX}/bin/verilator_coverage_bin_dbg
.include <bsd.port.mk>