7c084f620e
- fix build failures in i386 and amd64 due to compiler changes - fix numerous compilation warnings and logical errors that may trap in the future - convert all distribution files from DOS format to ease future changes - convert legacy patch file to new naming convention PR: 214990 Submitted by: bob@eager.cx (maintainer)
63 lines
3 KiB
C
63 lines
3 KiB
C
--- HP2100/hp2100_cpu1.c.orig 2016-12-01 22:43:42 UTC
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+++ HP2100/hp2100_cpu1.c
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@@ -193,11 +193,12 @@ OPS op;
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uint32 rs, qs, sc, v1, v2, t;
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int32 sop1, sop2;
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-if ((cpu_unit.flags & UNIT_EAU) == 0) /* option installed? */
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+if ((cpu_unit.flags & UNIT_EAU) == 0) { /* option installed? */
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if ((UNIT_CPU_MODEL == UNIT_2114) && (IR == 0101100)) /* 2114 and RRR 16? */
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return SCPE_OK; /* allowed as NOP */
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else
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return stop_inst; /* fail */
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+}
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switch ((IR >> 8) & 0377) { /* decode IR<15:8> */
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@@ -245,7 +246,7 @@ switch ((IR >> 8) & 0377) {
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case 010: /* MPY 100200 (OP_K) */
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MPY:
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- if (reason = cpu_ops (OP_K, op, intrq)) /* get operand */
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+ if ((reason = cpu_ops (OP_K, op, intrq))) /* get operand */
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break;
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sop1 = SEXT (AR); /* sext AR */
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sop2 = SEXT (op[0].word); /* sext mem */
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@@ -262,9 +263,9 @@ switch ((IR >> 8) & 0377) {
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break;
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case 0201: /* DIV 100400 (OP_K) */
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- if (reason = cpu_ops (OP_K, op, intrq)) /* get operand */
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+ if ((reason = cpu_ops (OP_K, op, intrq))) /* get operand */
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break;
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- if (rs = qs = BR & SIGN) { /* save divd sign, neg? */
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+ if ((rs = qs = BR & SIGN)) { /* save divd sign, neg? */
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AR = (~AR + 1) & DMASK; /* make B'A pos */
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BR = (~BR + (AR == 0)) & DMASK; /* make divd pos */
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}
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@@ -317,14 +318,14 @@ switch ((IR >> 8) & 0377) {
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break;
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case 0210: /* DLD 104200 (OP_D) */
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- if (reason = cpu_ops (OP_D, op, intrq)) /* get operand */
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+ if ((reason = cpu_ops (OP_D, op, intrq))) /* get operand */
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break;
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AR = (op[0].dword >> 16) & DMASK; /* load AR */
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BR = op[0].dword & DMASK; /* load BR */
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break;
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case 0211: /* DST 104400 (OP_A) */
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- if (reason = cpu_ops (OP_A, op, intrq)) /* get operand */
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+ if ((reason = cpu_ops (OP_A, op, intrq))) /* get operand */
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break;
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WriteW (op[0].word, AR); /* store AR */
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WriteW ((op[0].word + 1) & VAMASK, BR); /* store BR */
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@@ -734,7 +735,7 @@ for (i = 0; i < OP_N_F; i++) {
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flags = pattern & OP_M_FLAGS; /* get operand pattern */
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if (flags >= OP_ADR) /* address operand? */
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- if (reason = resolve (ReadW (PC), &MA, irq)) /* resolve indirects */
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+ if ((reason = resolve (ReadW (PC), &MA, irq))) /* resolve indirects */
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return reason;
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switch (flags) {
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