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drm/exynos: add property for plane zpos

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The exynos drm driver used a specific ioctl - DRM_EXYNOS_PLANE_SET_ZPOS
to set zpos of plane. It can be substitute to property of plane. This
patch adds a property for plane zpos and removes
DRM_EXYNOS_PLANE_SET_ZPOS ioctl.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Joonyoung Shim 2012-06-27 14:27:06 +09:00 committed by Inki Dae
parent 4070d212eb
commit 00ae67cf26
5 changed files with 48 additions and 58 deletions
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2
drivers/gpu/drm/exynos/exynos_drm_drv.c
View file

@ -224,8 +224,6 @@ static struct drm_ioctl_desc exynos_ioctls[] = {
exynos_drm_gem_mmap_ioctl, DRM_UNLOCKED | DRM_AUTH), exynos_drm_gem_mmap_ioctl, DRM_UNLOCKED | DRM_AUTH),
DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET, DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET,
exynos_drm_gem_get_ioctl, DRM_UNLOCKED), exynos_drm_gem_get_ioctl, DRM_UNLOCKED),
DRM_IOCTL_DEF_DRV(EXYNOS_PLANE_SET_ZPOS, exynos_plane_set_zpos_ioctl,
DRM_UNLOCKED | DRM_AUTH),
DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION, DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION,
vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH), vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH),
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER, DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER,

1
drivers/gpu/drm/exynos/exynos_drm_drv.h
View file

@ -235,6 +235,7 @@ struct exynos_drm_private {
* this array is used to be aware of which crtc did it request vblank. * this array is used to be aware of which crtc did it request vblank.
*/ */
struct drm_crtc *crtc[MAX_CRTC]; struct drm_crtc *crtc[MAX_CRTC];
struct drm_property *plane_zpos_property;
}; };
/* /*

92
drivers/gpu/drm/exynos/exynos_drm_plane.c
View file

@ -150,7 +150,6 @@ static int exynos_disable_plane(struct drm_plane *plane)
exynos_drm_encoder_plane_disable); exynos_drm_encoder_plane_disable);
exynos_plane->enabled = false; exynos_plane->enabled = false;
exynos_plane->overlay.zpos = DEFAULT_ZPOS;
return 0; return 0;
} }
@ -166,26 +165,66 @@ static void exynos_plane_destroy(struct drm_plane *plane)
kfree(exynos_plane); kfree(exynos_plane);
} }
static int exynos_plane_set_property(struct drm_plane *plane,
struct drm_property *property,
uint64_t val)
{
struct drm_device *dev = plane->dev;
struct exynos_plane *exynos_plane = to_exynos_plane(plane);
struct exynos_drm_private *dev_priv = dev->dev_private;
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
if (property == dev_priv->plane_zpos_property) {
exynos_plane->overlay.zpos = val;
return 0;
}
return -EINVAL;
}
static struct drm_plane_funcs exynos_plane_funcs = { static struct drm_plane_funcs exynos_plane_funcs = {
.update_plane = exynos_update_plane, .update_plane = exynos_update_plane,
.disable_plane = exynos_disable_plane, .disable_plane = exynos_disable_plane,
.destroy = exynos_plane_destroy, .destroy = exynos_plane_destroy,
.set_property = exynos_plane_set_property,
}; };
static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
{
struct drm_device *dev = plane->dev;
struct exynos_drm_private *dev_priv = dev->dev_private;
struct drm_property *prop;
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
prop = dev_priv->plane_zpos_property;
if (!prop) {
prop = drm_property_create_range(dev, 0, "zpos", 0,
MAX_PLANE - 1);
if (!prop)
return;
dev_priv->plane_zpos_property = prop;
}
drm_object_attach_property(&plane->base, prop, 0);
}
struct drm_plane *exynos_plane_init(struct drm_device *dev, struct drm_plane *exynos_plane_init(struct drm_device *dev,
unsigned int possible_crtcs, bool priv) unsigned int possible_crtcs, bool priv)
{ {
struct exynos_plane *exynos_plane; struct exynos_plane *exynos_plane;
int err; int err;
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL); exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
if (!exynos_plane) { if (!exynos_plane) {
DRM_ERROR("failed to allocate plane\n"); DRM_ERROR("failed to allocate plane\n");
return NULL; return NULL;
} }
exynos_plane->overlay.zpos = DEFAULT_ZPOS;
err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs, err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
&exynos_plane_funcs, formats, ARRAY_SIZE(formats), &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
priv); priv);
@ -195,47 +234,10 @@ struct drm_plane *exynos_plane_init(struct drm_device *dev,
return NULL; return NULL;
} }
if (priv)
exynos_plane->overlay.zpos = DEFAULT_ZPOS;
else
exynos_plane_attach_zpos_property(&exynos_plane->base);
return &exynos_plane->base; return &exynos_plane->base;
} }
int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_exynos_plane_set_zpos *zpos_req = data;
struct drm_mode_object *obj;
struct drm_plane *plane;
struct exynos_plane *exynos_plane;
int ret = 0;
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
if (!drm_core_check_feature(dev, DRIVER_MODESET))
return -EINVAL;
if (zpos_req->zpos < 0 || zpos_req->zpos >= MAX_PLANE) {
if (zpos_req->zpos != DEFAULT_ZPOS) {
DRM_ERROR("zpos not within limits\n");
return -EINVAL;
}
}
mutex_lock(&dev->mode_config.mutex);
obj = drm_mode_object_find(dev, zpos_req->plane_id,
DRM_MODE_OBJECT_PLANE);
if (!obj) {
DRM_DEBUG_KMS("Unknown plane ID %d\n",
zpos_req->plane_id);
ret = -EINVAL;
goto out;
}
plane = obj_to_plane(obj);
exynos_plane = to_exynos_plane(plane);
exynos_plane->overlay.zpos = zpos_req->zpos;
out:
mutex_unlock(&dev->mode_config.mutex);
return ret;
}

2
drivers/gpu/drm/exynos/exynos_drm_plane.h
View file

@ -17,5 +17,3 @@ int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
void exynos_plane_commit(struct drm_plane *plane); void exynos_plane_commit(struct drm_plane *plane);
struct drm_plane *exynos_plane_init(struct drm_device *dev, struct drm_plane *exynos_plane_init(struct drm_device *dev,
unsigned int possible_crtcs, bool priv); unsigned int possible_crtcs, bool priv);
int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);

9
include/drm/exynos_drm.h
View file

@ -107,11 +107,6 @@ struct drm_exynos_vidi_connection {
uint64_t edid; uint64_t edid;
}; };
struct drm_exynos_plane_set_zpos {
__u32 plane_id;
__s32 zpos;
};
/* memory type definitions. */ /* memory type definitions. */
enum e_drm_exynos_gem_mem_type { enum e_drm_exynos_gem_mem_type {
/* Physically Continuous memory and used as default. */ /* Physically Continuous memory and used as default. */
@ -164,7 +159,6 @@ struct drm_exynos_g2d_exec {
#define DRM_EXYNOS_GEM_MMAP 0x02 #define DRM_EXYNOS_GEM_MMAP 0x02
/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */ /* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
#define DRM_EXYNOS_GEM_GET 0x04 #define DRM_EXYNOS_GEM_GET 0x04
#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06
#define DRM_EXYNOS_VIDI_CONNECTION 0x07 #define DRM_EXYNOS_VIDI_CONNECTION 0x07
/* G2D */ /* G2D */
@ -184,9 +178,6 @@ struct drm_exynos_g2d_exec {
#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \ #define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info) DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ #define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)