mfd: da9053: Addition of extra registers for GPIOs 8-13
Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into the register header file. - DA9052_GPIO_8_9_REG 25 - DA9052_GPIO_10_11_REG 26 - DA9052_GPIO_12_13_REG 27 A modification is also made to the MFD core code to define these registers as readable and writable. The functions for da9052_reg_readable() and da9052_reg_writeable() have had their case statements altered to include these new registers. Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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2 changed files with 9 additions and 0 deletions
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@ -51,6 +51,9 @@ static bool da9052_reg_readable(struct device *dev, unsigned int reg)
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case DA9052_GPIO_2_3_REG:
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case DA9052_GPIO_4_5_REG:
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case DA9052_GPIO_6_7_REG:
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case DA9052_GPIO_8_9_REG:
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case DA9052_GPIO_10_11_REG:
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case DA9052_GPIO_12_13_REG:
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case DA9052_GPIO_14_15_REG:
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case DA9052_ID_0_1_REG:
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case DA9052_ID_2_3_REG:
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@ -178,6 +181,9 @@ static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
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case DA9052_GPIO_2_3_REG:
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case DA9052_GPIO_4_5_REG:
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case DA9052_GPIO_6_7_REG:
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case DA9052_GPIO_8_9_REG:
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case DA9052_GPIO_10_11_REG:
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case DA9052_GPIO_12_13_REG:
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case DA9052_GPIO_14_15_REG:
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case DA9052_ID_0_1_REG:
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case DA9052_ID_2_3_REG:
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@ -65,6 +65,9 @@
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#define DA9052_GPIO_2_3_REG 22
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#define DA9052_GPIO_4_5_REG 23
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#define DA9052_GPIO_6_7_REG 24
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#define DA9052_GPIO_8_9_REG 25
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#define DA9052_GPIO_10_11_REG 26
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#define DA9052_GPIO_12_13_REG 27
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#define DA9052_GPIO_14_15_REG 28
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/* POWER SEQUENCER CONTROL REGISTERS */
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