mfd: da9053: Addition of extra registers for GPIOs 8-13

Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into
the register header file.

- DA9052_GPIO_8_9_REG    25
- DA9052_GPIO_10_11_REG  26
- DA9052_GPIO_12_13_REG  27

A modification is also made to the MFD core code to define these registers
as readable and writable. The functions for da9052_reg_readable() and
da9052_reg_writeable() have had their case statements altered to include
these new registers.

Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Steve Twiss 2015-10-08 16:17:51 +01:00 committed by Lee Jones
parent 5c41f11c62
commit 0386af30d3
2 changed files with 9 additions and 0 deletions

View file

@ -51,6 +51,9 @@ static bool da9052_reg_readable(struct device *dev, unsigned int reg)
case DA9052_GPIO_2_3_REG:
case DA9052_GPIO_4_5_REG:
case DA9052_GPIO_6_7_REG:
case DA9052_GPIO_8_9_REG:
case DA9052_GPIO_10_11_REG:
case DA9052_GPIO_12_13_REG:
case DA9052_GPIO_14_15_REG:
case DA9052_ID_0_1_REG:
case DA9052_ID_2_3_REG:
@ -178,6 +181,9 @@ static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
case DA9052_GPIO_2_3_REG:
case DA9052_GPIO_4_5_REG:
case DA9052_GPIO_6_7_REG:
case DA9052_GPIO_8_9_REG:
case DA9052_GPIO_10_11_REG:
case DA9052_GPIO_12_13_REG:
case DA9052_GPIO_14_15_REG:
case DA9052_ID_0_1_REG:
case DA9052_ID_2_3_REG:

View file

@ -65,6 +65,9 @@
#define DA9052_GPIO_2_3_REG 22
#define DA9052_GPIO_4_5_REG 23
#define DA9052_GPIO_6_7_REG 24
#define DA9052_GPIO_8_9_REG 25
#define DA9052_GPIO_10_11_REG 26
#define DA9052_GPIO_12_13_REG 27
#define DA9052_GPIO_14_15_REG 28
/* POWER SEQUENCER CONTROL REGISTERS */