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dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

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Originally we enable a special gate bit when the compatible indicates
A23/33.

But according to BSP sources and user manuals, more SoCs will need this
gate bit.

So make it a common quirk configured in the config struct.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Icenowy Zheng 2017-08-29 12:51:26 +08:00 committed by Vinod Koul
parent a3f406d6d1
commit 0430a7c753
1 changed files with 13 additions and 7 deletions
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20
drivers/dma/sun6i-dma.c
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@ -101,6 +101,17 @@ struct sun6i_dma_config {
u32 nr_max_channels; u32 nr_max_channels;
u32 nr_max_requests; u32 nr_max_requests;
u32 nr_max_vchans; u32 nr_max_vchans;
/*
* In the datasheets/user manuals of newer Allwinner SoCs, a special
* bit (bit 2 at register 0x20) is present.
* It's named "DMA MCLK interface circuit auto gating bit" in the
* documents, and the footnote of this register says that this bit
* should be set up when initializing the DMA controller.
* Allwinner A23/A33 user manuals do not have this bit documented,
* however these SoCs really have and need this bit, as seen in the
* BSP kernel source code.
*/
bool gate_needed;
}; };
/* /*
@ -1009,6 +1020,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
.nr_max_channels = 8, .nr_max_channels = 8,
.nr_max_requests = 24, .nr_max_requests = 24,
.nr_max_vchans = 37, .nr_max_vchans = 37,
.gate_needed = true,
}; };
static struct sun6i_dma_config sun8i_a83t_dma_cfg = { static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
@ -1174,13 +1186,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)
goto err_dma_unregister; goto err_dma_unregister;
} }
/* if (sdc->cfg->gate_needed)
* sun8i variant requires us to toggle a dma gating register,
* as seen in Allwinner's SDK. This register is not documented
* in the A23 user manual.
*/
if (of_device_is_compatible(pdev->dev.of_node,
"allwinner,sun8i-a23-dma"))
writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE); writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
return 0; return 0;