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MIPS: Use GCC __builtin_prefetch() to implement prefetch().

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GCC's __builtin_prefetch() was introduced a long time ago, all
supported GCC versions have it.  Lets do what the big boys up in
linux/prefetch.h do, except we use '1' as the third parameter to
provoke 'PREF 0,...'  and 'PREF 1,...' instead of other prefetch
hints.

This allows for better code generation.  In theory the existing
embedded asm could be optimized, but the compiler has these builtins,
so there is really no point.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1235/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2010-05-14 12:44:18 -07:00 committed by Ralf Baechle
parent 606c958e28
commit 0453fb3c52
1 changed files with 3 additions and 9 deletions
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12
arch/mips/include/asm/processor.h
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@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p);
#ifdef CONFIG_CPU_HAS_PREFETCH
#define ARCH_HAS_PREFETCH
#define prefetch(x) __builtin_prefetch((x), 0, 1)
static inline void prefetch(const void *addr)
{
__asm__ __volatile__(
" .set mips4 \n"
" pref %0, (%1) \n"
" .set mips0 \n"
:
: "i" (Pref_Load), "r" (addr));
}
#define ARCH_HAS_PREFETCHW
#define prefetchw(x) __builtin_prefetch((x), 1, 1)
#endif