ASoC: cs53l30: Add MUTE pin control support via GPIO
The codec chip has a physical MUTE pin to let users control it via GPIO. So this patch add a mute control support to the driver. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Paul Handrigan <Paul.Handrigan@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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3 changed files with 35 additions and 0 deletions
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@ -13,6 +13,10 @@ Optional properties:
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- reset-gpios : a GPIO spec for the reset pin.
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- mute-gpios : a GPIO spec for the MUTE pin. The active state can be either
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GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW, which would be handled
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by the driver automatically.
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- cirrus,micbias-lvl : Set the output voltage level on the MICBIAS Pin.
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0 = Hi-Z
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1 = 1.80 V
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@ -35,6 +35,7 @@ struct cs53l30_private {
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struct regulator_bulk_data supplies[CS53L30_NUM_SUPPLIES];
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struct regmap *regmap;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *mute_gpio;
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struct clk *mclk;
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bool use_sdout2;
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u32 mclk_rate;
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@ -833,6 +834,16 @@ static int cs53l30_set_dai_tdm_slot(struct snd_soc_dai *dai,
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return 0;
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}
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static int cs53l30_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
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{
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struct cs53l30_private *priv = snd_soc_codec_get_drvdata(dai->codec);
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if (priv->mute_gpio)
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gpiod_set_value_cansleep(priv->mute_gpio, mute);
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return 0;
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}
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/* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */
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#define CS53L30_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT)
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@ -846,6 +857,7 @@ static const struct snd_soc_dai_ops cs53l30_ops = {
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.set_sysclk = cs53l30_set_sysclk,
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.set_tristate = cs53l30_set_tristate,
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.set_tdm_slot = cs53l30_set_dai_tdm_slot,
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.mute_stream = cs53l30_mute_stream,
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};
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static struct snd_soc_dai_driver cs53l30_dai = {
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@ -991,6 +1003,24 @@ static int cs53l30_i2c_probe(struct i2c_client *client,
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cs53l30->mclk = NULL;
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}
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/* Fetch the MUTE control */
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cs53l30->mute_gpio = devm_gpiod_get_optional(dev, "mute",
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GPIOD_OUT_HIGH);
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if (IS_ERR(cs53l30->mute_gpio)) {
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ret = PTR_ERR(cs53l30->mute_gpio);
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goto error;
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}
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if (cs53l30->mute_gpio) {
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/* Enable MUTE controls via MUTE pin */
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regmap_write(cs53l30->regmap, CS53L30_MUTEP_CTL1,
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CS53L30_MUTEP_CTL1_MUTEALL);
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/* Flip the polarity of MUTE pin */
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if (gpiod_is_active_low(cs53l30->mute_gpio))
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regmap_update_bits(cs53l30->regmap, CS53L30_MUTEP_CTL2,
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CS53L30_MUTE_PIN_POLARITY, 0);
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}
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if (!of_property_read_u8(np, "cirrus,micbias-lvl", &val))
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regmap_update_bits(cs53l30->regmap, CS53L30_MICBIAS_CTL,
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CS53L30_MIC_BIAS_CTRL_MASK, val);
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@ -253,6 +253,7 @@
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#define CS53L30_MUTE_MB_ALL_PDN_MASK (1 << CS53L30_MUTE_MB_ALL_PDN_SHIFT)
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#define CS53L30_MUTE_MB_ALL_PDN (1 << CS53L30_MUTE_MB_ALL_PDN_SHIFT)
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#define CS53L30_MUTEP_CTL1_MUTEALL (0xdf)
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#define CS53L30_MUTEP_CTL1_DEFAULT (0)
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/* R32 (0x20) CS53L30_MUTEP_CTL2 - MUTE Pin Control 2 */
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