diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index efc367bddc47..fee771b4d332 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -563,7 +563,7 @@ static cycle_t igb_read_clock(const struct cyclecounter *tc) * the lowest register is SYSTIMR instead of SYSTIML. However we never * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it. */ - if (hw->mac.type == e1000_82580) { + if (hw->mac.type >= e1000_82580) { stamp = rd32(E1000_SYSTIMR) >> 8; shift = IGB_82580_TSYNC_SHIFT; } @@ -1367,7 +1367,7 @@ static void igb_irq_enable(struct igb_adapter *adapter) struct e1000_hw *hw = &adapter->hw; if (adapter->msix_entries) { - u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC; + u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA; u32 regval = rd32(E1000_EIAC); wr32(E1000_EIAC, regval | adapter->eims_enable_mask); regval = rd32(E1000_EIAM); @@ -1377,9 +1377,6 @@ static void igb_irq_enable(struct igb_adapter *adapter) wr32(E1000_MBVFIMR, 0xFF); ims |= E1000_IMS_VMMB; } - if (adapter->hw.mac.type == e1000_82580) - ims |= E1000_IMS_DRSTA; - wr32(E1000_IMS, ims); } else { wr32(E1000_IMS, IMS_ENABLE_MASK | @@ -3112,7 +3109,7 @@ void igb_configure_rx_ring(struct igb_adapter *adapter, srrctl |= (PAGE_SIZE / 2) >> E1000_SRRCTL_BSIZEPKT_SHIFT; #endif srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; - if (hw->mac.type == e1000_82580) + if (hw->mac.type >= e1000_82580) srrctl |= E1000_SRRCTL_TIMESTAMP; /* Only set Drop Enable if we are supporting multiple queues */ if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1) @@ -4463,7 +4460,7 @@ static void igb_tx_timeout(struct net_device *netdev) /* Do the reset outside of interrupt context */ adapter->tx_timeout_count++; - if (hw->mac.type == e1000_82580) + if (hw->mac.type >= e1000_82580) hw->dev_spec._82575.global_device_reset = true; schedule_work(&adapter->reset_task); @@ -5581,7 +5578,7 @@ static void igb_systim_to_hwtstamp(struct igb_adapter *adapter, * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to * 24 to match clock shift we setup earlier. */ - if (adapter->hw.mac.type == e1000_82580) + if (adapter->hw.mac.type >= e1000_82580) regval <<= IGB_82580_TSYNC_SHIFT; ns = timecounter_cyc2time(&adapter->clock, regval); @@ -6276,7 +6273,7 @@ static int igb_hwtstamp_ioctl(struct net_device *netdev, * timestamped, so enable timestamping in all packets as * long as one rx filter was configured. */ - if ((hw->mac.type == e1000_82580) && tsync_rx_ctl) { + if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) { tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED; tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; }