[PATCH] ACPI based I/O APIC hot-plug: ia64 support
This is an ia64 implementation of acpi_register_ioapic() and acpi_unregister_ioapic() interfaces. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Kenji Kaneshige
Greg Kroah-Hartman
parent
b1bb248a5d
commit
0e888adc41
3 changed files with 135 additions and 32 deletions
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@ -236,9 +236,7 @@ acpi_parse_iosapic (acpi_table_entry_header *header, const unsigned long end)
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if (BAD_MADT_ENTRY(iosapic, end))
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return -EINVAL;
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iosapic_init(iosapic->address, iosapic->global_irq_base);
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return 0;
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return iosapic_init(iosapic->address, iosapic->global_irq_base);
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}
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@ -772,7 +770,7 @@ EXPORT_SYMBOL(acpi_unmap_lsapic);
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#ifdef CONFIG_ACPI_NUMA
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acpi_status __init
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acpi_status __devinit
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acpi_map_iosapic (acpi_handle handle, u32 depth, void *context, void **ret)
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{
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struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
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@ -829,16 +827,23 @@ acpi_map_iosapic (acpi_handle handle, u32 depth, void *context, void **ret)
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int
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acpi_register_ioapic (acpi_handle handle, u64 phys_addr, u32 gsi_base)
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{
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/* TBD */
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return -EINVAL;
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int err;
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if ((err = iosapic_init(phys_addr, gsi_base)))
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return err;
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#if CONFIG_ACPI_NUMA
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acpi_map_iosapic(handle, 0, NULL, NULL);
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#endif /* CONFIG_ACPI_NUMA */
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return 0;
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}
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EXPORT_SYMBOL(acpi_register_ioapic);
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int
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acpi_unregister_ioapic (acpi_handle handle, u32 gsi_base)
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{
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/* TBD */
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return -EINVAL;
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return iosapic_remove(gsi_base);
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}
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EXPORT_SYMBOL(acpi_unregister_ioapic);
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@ -129,14 +129,13 @@ static struct iosapic {
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char __iomem *addr; /* base address of IOSAPIC */
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unsigned int gsi_base; /* first GSI assigned to this IOSAPIC */
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unsigned short num_rte; /* number of RTE in this IOSAPIC */
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int rtes_inuse; /* # of RTEs in use on this IOSAPIC */
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#ifdef CONFIG_NUMA
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unsigned short node; /* numa node association via pxm */
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#endif
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} iosapic_lists[NR_IOSAPICS];
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static int num_iosapic;
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static unsigned char pcat_compat __initdata; /* 8259 compatibility flag */
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static unsigned char pcat_compat __devinitdata; /* 8259 compatibility flag */
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static int iosapic_kmalloc_ok;
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static LIST_HEAD(free_rte_list);
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@ -149,7 +148,7 @@ find_iosapic (unsigned int gsi)
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{
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int i;
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for (i = 0; i < num_iosapic; i++) {
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for (i = 0; i < NR_IOSAPICS; i++) {
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if ((unsigned) (gsi - iosapic_lists[i].gsi_base) < iosapic_lists[i].num_rte)
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return i;
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}
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@ -598,6 +597,7 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery,
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rte->refcnt++;
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list_add_tail(&rte->rte_list, &iosapic_intr_info[vector].rtes);
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iosapic_intr_info[vector].count++;
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iosapic_lists[index].rtes_inuse++;
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}
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else if (vector_is_shared(vector)) {
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struct iosapic_intr_info *info = &iosapic_intr_info[vector];
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@ -778,7 +778,7 @@ void
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iosapic_unregister_intr (unsigned int gsi)
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{
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unsigned long flags;
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int irq, vector;
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int irq, vector, index;
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irq_desc_t *idesc;
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u32 low32;
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unsigned long trigger, polarity;
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@ -819,6 +819,9 @@ iosapic_unregister_intr (unsigned int gsi)
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list_del(&rte->rte_list);
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iosapic_intr_info[vector].count--;
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iosapic_free_rte(rte);
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index = find_iosapic(gsi);
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iosapic_lists[index].rtes_inuse--;
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WARN_ON(iosapic_lists[index].rtes_inuse < 0);
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trigger = iosapic_intr_info[vector].trigger;
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polarity = iosapic_intr_info[vector].polarity;
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@ -952,30 +955,86 @@ iosapic_system_init (int system_pcat_compat)
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}
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}
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void __init
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static inline int
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iosapic_alloc (void)
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{
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int index;
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for (index = 0; index < NR_IOSAPICS; index++)
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if (!iosapic_lists[index].addr)
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return index;
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printk(KERN_WARNING "%s: failed to allocate iosapic\n", __FUNCTION__);
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return -1;
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}
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static inline void
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iosapic_free (int index)
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{
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memset(&iosapic_lists[index], 0, sizeof(iosapic_lists[0]));
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}
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static inline int
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iosapic_check_gsi_range (unsigned int gsi_base, unsigned int ver)
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{
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int index;
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unsigned int gsi_end, base, end;
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/* check gsi range */
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gsi_end = gsi_base + ((ver >> 16) & 0xff);
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for (index = 0; index < NR_IOSAPICS; index++) {
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if (!iosapic_lists[index].addr)
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continue;
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base = iosapic_lists[index].gsi_base;
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end = base + iosapic_lists[index].num_rte - 1;
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if (gsi_base < base && gsi_end < base)
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continue;/* OK */
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if (gsi_base > end && gsi_end > end)
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continue; /* OK */
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return -EBUSY;
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}
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return 0;
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}
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int __devinit
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iosapic_init (unsigned long phys_addr, unsigned int gsi_base)
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{
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int num_rte;
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int num_rte, err, index;
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unsigned int isa_irq, ver;
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char __iomem *addr;
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unsigned long flags;
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addr = ioremap(phys_addr, 0);
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ver = iosapic_version(addr);
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spin_lock_irqsave(&iosapic_lock, flags);
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{
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addr = ioremap(phys_addr, 0);
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ver = iosapic_version(addr);
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/*
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* The MAX_REDIR register holds the highest input pin
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* number (starting from 0).
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* We add 1 so that we can use it for number of pins (= RTEs)
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*/
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num_rte = ((ver >> 16) & 0xff) + 1;
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if ((err = iosapic_check_gsi_range(gsi_base, ver))) {
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iounmap(addr);
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spin_unlock_irqrestore(&iosapic_lock, flags);
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return err;
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}
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iosapic_lists[num_iosapic].addr = addr;
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iosapic_lists[num_iosapic].gsi_base = gsi_base;
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iosapic_lists[num_iosapic].num_rte = num_rte;
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/*
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* The MAX_REDIR register holds the highest input pin
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* number (starting from 0).
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* We add 1 so that we can use it for number of pins (= RTEs)
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*/
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num_rte = ((ver >> 16) & 0xff) + 1;
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index = iosapic_alloc();
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iosapic_lists[index].addr = addr;
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iosapic_lists[index].gsi_base = gsi_base;
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iosapic_lists[index].num_rte = num_rte;
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#ifdef CONFIG_NUMA
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iosapic_lists[num_iosapic].node = MAX_NUMNODES;
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iosapic_lists[index].node = MAX_NUMNODES;
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#endif
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num_iosapic++;
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}
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spin_unlock_irqrestore(&iosapic_lock, flags);
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if ((gsi_base == 0) && pcat_compat) {
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/*
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@ -986,10 +1045,43 @@ iosapic_init (unsigned long phys_addr, unsigned int gsi_base)
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for (isa_irq = 0; isa_irq < 16; ++isa_irq)
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iosapic_override_isa_irq(isa_irq, isa_irq, IOSAPIC_POL_HIGH, IOSAPIC_EDGE);
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}
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return 0;
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}
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#ifdef CONFIG_HOTPLUG
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int
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iosapic_remove (unsigned int gsi_base)
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{
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int index, err = 0;
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unsigned long flags;
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spin_lock_irqsave(&iosapic_lock, flags);
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{
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index = find_iosapic(gsi_base);
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if (index < 0) {
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printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n",
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__FUNCTION__, gsi_base);
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goto out;
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}
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if (iosapic_lists[index].rtes_inuse) {
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err = -EBUSY;
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printk(KERN_WARNING "%s: IOSAPIC for GSI base %u is busy\n",
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__FUNCTION__, gsi_base);
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goto out;
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}
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iounmap(iosapic_lists[index].addr);
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iosapic_free(index);
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}
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out:
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spin_unlock_irqrestore(&iosapic_lock, flags);
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return err;
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}
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#endif /* CONFIG_HOTPLUG */
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#ifdef CONFIG_NUMA
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void __init
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void __devinit
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map_iosapic_to_node(unsigned int gsi_base, int node)
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{
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int index;
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@ -71,8 +71,11 @@ static inline void iosapic_eoi(char __iomem *iosapic, u32 vector)
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}
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extern void __init iosapic_system_init (int pcat_compat);
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extern void __init iosapic_init (unsigned long address,
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extern int __devinit iosapic_init (unsigned long address,
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unsigned int gsi_base);
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#ifdef CONFIG_HOTPLUG
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extern int iosapic_remove (unsigned int gsi_base);
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#endif /* CONFIG_HOTPLUG */
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extern int gsi_to_vector (unsigned int gsi);
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extern int gsi_to_irq (unsigned int gsi);
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extern void iosapic_enable_intr (unsigned int vector);
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@ -94,11 +97,14 @@ extern unsigned int iosapic_version (char __iomem *addr);
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extern void iosapic_pci_fixup (int);
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#ifdef CONFIG_NUMA
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extern void __init map_iosapic_to_node (unsigned int, int);
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extern void __devinit map_iosapic_to_node (unsigned int, int);
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#endif
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#else
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#define iosapic_system_init(pcat_compat) do { } while (0)
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#define iosapic_init(address,gsi_base) do { } while (0)
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#define iosapic_init(address,gsi_base) (-EINVAL)
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#ifdef CONFIG_HOTPLUG
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#define iosapic_remove(gsi_base) (-ENODEV)
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#endif /* CONFIG_HOTPLUG */
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#define iosapic_register_intr(gsi,polarity,trigger) (gsi)
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#define iosapic_unregister_intr(irq) do { } while (0)
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#define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0)
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