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pinctrl: aspeed: Fix ast2500 strap register write logic

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On AST2500, the hardware strap register(SCU70) only accepts write ‘1’,
to clear it to ‘0’, must set bits(write  ‘1’) to SCU7C

Signed-off-by: Yong Li <sdliyong@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Yong Li 2017-08-16 00:21:50 +08:00 committed by Linus Walleij
parent 1899ccc041
commit 1865af212d
2 changed files with 18 additions and 2 deletions
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19
drivers/pinctrl/aspeed/pinctrl-aspeed.c
View file

@ -183,6 +183,7 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
{
int ret;
int i;
unsigned int rev_id;
for (i = 0; i < expr->ndescs; i++) {
const struct aspeed_sig_desc *desc = &expr->descs[i];
@ -213,8 +214,22 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
continue;
ret = regmap_update_bits(maps[desc->ip], desc->reg,
desc->mask, val);
/* On AST2500, Set bits in SCU7C are cleared from SCU70 */
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) {
ret = regmap_read(maps[ASPEED_IP_SCU],
HW_REVISION_ID, &rev_id);
if (ret < 0)
return ret;
if (0x04 == ((rev_id >> 24) & 0xff))
ret = regmap_write(maps[desc->ip],
HW_REVISION_ID, (~val & desc->mask));
else
ret = regmap_update_bits(maps[desc->ip],
desc->reg, desc->mask, val);
} else
ret = regmap_update_bits(maps[desc->ip], desc->reg,
desc->mask, val);
if (ret)
return ret;

1
drivers/pinctrl/aspeed/pinctrl-aspeed.h
View file

@ -251,6 +251,7 @@
#define SCU3C 0x3C /* System Reset Control/Status Register */
#define SCU48 0x48 /* MAC Interface Clock Delay Setting */
#define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */
#define HW_REVISION_ID 0x7C /* Silicon revision ID register */
#define SCU80 0x80 /* Multi-function Pin Control #1 */
#define SCU84 0x84 /* Multi-function Pin Control #2 */
#define SCU88 0x88 /* Multi-function Pin Control #3 */