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Third Round of Renesas ARM Based SoC DT Updates for v4.3

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* Add JPU support: r8a7791 and r8a7790 SoCs
 * Add MMCIF and PFC support: r8a7794 SoC
 * Add initial support for r8a7794/silk
 * Add missing "gpio-ranges" to gpio nodes: sh73a0, r8a7740 and r8a73a4 SoCs
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Merge tag 'renesas-dt3-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Third Round of Renesas ARM Based SoC DT Updates for v4.3

* Add JPU support: r8a7791 and r8a7790 SoCs
* Add MMCIF and PFC support: r8a7794 SoC
* Add initial support for r8a7794/silk
* Add missing "gpio-ranges" to gpio nodes: sh73a0, r8a7740 and r8a73a4 SoCs

* tag 'renesas-dt3-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: r8a7740 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: r8a73a4 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: silk: add eMMC DT support
  ARM: shmobile: r8a7794: add MMCIF DT support
  ARM: shmobile: silk: add Ether DT support
  ARM: shmobile: silk: initial device tree
  ARM: shmobile: r8a7794: add PFC DT support
  ARM: shmobile: r8a7791: Add JPU device node.
  ARM: shmobile: r8a7790: Add JPU device node.

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-08-11 15:31:53 +02:00
commit 1a08a84cc6
8 changed files with 145 additions and 0 deletions
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1
arch/arm/boot/dts/Makefile
View file

@ -535,6 +535,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
r8a7791-koelsch.dtb \ r8a7791-koelsch.dtb \
r8a7793-gose.dtb \ r8a7793-gose.dtb \
r8a7794-alt.dtb \ r8a7794-alt.dtb \
r8a7794-silk.dtb \
sh73a0-kzm9g.dtb sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \ socfpga_arria5_socdk.dtb \

7
arch/arm/boot/dts/r8a73a4.dtsi
View file

@ -207,6 +207,13 @@
reg = <0 0xe6050000 0 0x9000>; reg = <0 0xe6050000 0 0x9000>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges =
<&pfc 0 0 31>, <&pfc 32 32 9>,
<&pfc 64 64 22>, <&pfc 96 96 31>,
<&pfc 128 128 7>, <&pfc 160 160 19>,
<&pfc 192 192 31>, <&pfc 224 224 27>,
<&pfc 256 256 28>, <&pfc 288 288 21>,
<&pfc 320 320 10>;
interrupts-extended = interrupts-extended =
<&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
<&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,

1
arch/arm/boot/dts/r8a7740.dtsi
View file

@ -291,6 +291,7 @@
<0xe605800c 0x20>; <0xe605800c 0x20>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 0 212>;
interrupts-extended = interrupts-extended =
<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,

7
arch/arm/boot/dts/r8a7790.dtsi
View file

@ -872,6 +872,13 @@
status = "disabled"; status = "disabled";
}; };
jpu: jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7790";
reg = <0 0xfe980000 0 0x10300>;
interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_JPU>;
};
clocks { clocks {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;

7
arch/arm/boot/dts/r8a7791.dtsi
View file

@ -898,6 +898,13 @@
status = "disabled"; status = "disabled";
}; };
jpu: jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7791";
reg = <0 0xfe980000 0 0x10300>;
interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7791_CLK_JPU>;
};
clocks { clocks {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;

102
arch/arm/boot/dts/r8a7794-silk.dts Normal file
View file

@ -0,0 +1,102 @@
/*
* Device Tree Source for the SILK board
*
* Copyright (C) 2014 Renesas Electronics Corporation
* Copyright (C) 2014-2015 Renesas Solutions Corp.
* Copyright (C) 2014-2015 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7794.dtsi"
/ {
model = "SILK";
compatible = "renesas,silk", "renesas,r8a7794";
aliases {
serial0 = &scif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif2;
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
d3_3v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "D3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
scif2_pins: serial2 {
renesas,groups = "scif2_data";
renesas,function = "scif2";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
};
phy1_pins: phy1 {
renesas,groups = "intc_irq8";
renesas,function = "intc";
};
mmcif0_pins: mmcif0 {
renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc";
};
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&mmcif0 {
pinctrl-0 = <&mmcif0_pins>;
pinctrl-names = "default";
vmmc-supply = <&d3_3v>;
vqmmc-supply = <&d3_3v>;
bus-width = <8>;
non-removable;
status = "okay";
};

17
arch/arm/boot/dts/r8a7794.dtsi
View file

@ -108,6 +108,12 @@
clocks = <&mstp4_clks R8A7794_CLK_IRQC>; clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
}; };
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a7794";
reg = <0 0xe6060000 0 0x11c>;
#gpio-range-cells = <3>;
};
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,rcar-dmac"; compatible = "renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x20000>; reg = <0 0xe6700000 0 0x20000>;
@ -377,6 +383,17 @@
status = "disabled"; status = "disabled";
}; };
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
dma-names = "tx", "rx";
reg-io-width = <4>;
status = "disabled";
};
sdhi0: sd@ee100000 { sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7794"; compatible = "renesas,sdhi-r8a7794";
reg = <0 0xee100000 0 0x200>; reg = <0 0xee100000 0 0x200>;

3
arch/arm/boot/dts/sh73a0.dtsi
View file

@ -392,6 +392,9 @@
<0xe605801c 0x1c>; <0xe605801c 0x1c>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-ranges =
<&pfc 0 0 119>, <&pfc 128 128 37>, <&pfc 192 192 91>,
<&pfc 288 288 22>;
interrupts-extended = interrupts-extended =
<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,