cxgb3 - PHY interrupts and GPIO pins.
Remove assumption that PHY interrupts use GPIOs 3 and 5. Deal with PHY interrupts connected to any GPIO pins. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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1 changed files with 12 additions and 6 deletions
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@ -1523,19 +1523,25 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx)
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*/
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*/
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int t3_phy_intr_handler(struct adapter *adapter)
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int t3_phy_intr_handler(struct adapter *adapter)
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{
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{
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static const int intr_gpio_bits[] = { 8, 0x20 };
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u32 mask, gpi = adapter_info(adapter)->gpio_intr;
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u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
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u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
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for_each_port(adapter, i) {
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for_each_port(adapter, i) {
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if (cause & intr_gpio_bits[i]) {
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struct port_info *p = adap2pinfo(adapter, i);
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struct cphy *phy = &adap2pinfo(adapter, i)->phy;
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int phy_cause = phy->ops->intr_handler(phy);
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mask = gpi - (gpi & (gpi - 1));
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gpi -= mask;
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if (!(p->port_type->caps & SUPPORTED_IRQ))
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continue;
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if (cause & mask) {
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int phy_cause = p->phy.ops->intr_handler(&p->phy);
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if (phy_cause & cphy_cause_link_change)
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if (phy_cause & cphy_cause_link_change)
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t3_link_changed(adapter, i);
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t3_link_changed(adapter, i);
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if (phy_cause & cphy_cause_fifo_error)
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if (phy_cause & cphy_cause_fifo_error)
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phy->fifo_errors++;
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p->phy.fifo_errors++;
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}
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}
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}
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}
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