[PATCH] tg3: fix ASF heartbeat
Change the ASF heart beat to 5 seconds for faster detection of system crash. The driver sends the heartbeat every 2 seconds and the ASF firmware will timeout and reset the device if no heartbeat is received after 5 seconds. The old scheme of 2 minutes is ineffective. tg3_write_mem_fast() is added to speed up the IO to send the heartbeat. When no workaround is needed, it will use direct MMIO to memory space to write to memory. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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a4e2b34784
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28fbef78a4
2 changed files with 17 additions and 5 deletions
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@ -470,6 +470,15 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
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spin_unlock_irqrestore(&tp->indirect_lock, flags);
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}
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static void tg3_write_mem_fast(struct tg3 *tp, u32 off, u32 val)
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{
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/* If no workaround is needed, write to mem space directly */
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if (tp->write32 != tg3_write_indirect_reg32)
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tw32(NIC_SRAM_WIN_BASE + off, val);
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else
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tg3_write_mem(tp, off, val);
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}
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static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
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{
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unsigned long flags;
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@ -6195,14 +6204,16 @@ static void tg3_timer(unsigned long __opaque)
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tp->timer_counter = tp->timer_multiplier;
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}
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/* Heartbeat is only sent once every 120 seconds. */
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/* Heartbeat is only sent once every 2 seconds. */
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if (!--tp->asf_counter) {
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if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
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u32 val;
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tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_ALIVE);
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tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
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tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 3);
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tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_MBOX,
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FWCMD_NICDRV_ALIVE2);
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tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
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/* 5 seconds timeout */
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tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
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val = tr32(GRC_RX_CPU_EVENT);
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val |= (1 << 14);
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tw32(GRC_RX_CPU_EVENT, val);
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@ -6413,7 +6424,7 @@ static int tg3_open(struct net_device *dev)
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tp->timer_counter = tp->timer_multiplier =
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(HZ / tp->timer_offset);
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tp->asf_counter = tp->asf_multiplier =
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((HZ / tp->timer_offset) * 120);
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((HZ / tp->timer_offset) * 2);
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init_timer(&tp->timer);
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tp->timer.expires = jiffies + tp->timer_offset;
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@ -1512,6 +1512,7 @@
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#define FWCMD_NICDRV_IPV6ADDR_CHG 0x00000004
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#define FWCMD_NICDRV_FIX_DMAR 0x00000005
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#define FWCMD_NICDRV_FIX_DMAW 0x00000006
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#define FWCMD_NICDRV_ALIVE2 0x0000000d
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#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c
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#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80
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#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00
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