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drm/i915: dev_priv cleanup in i915_suspend.c

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And a little bit of function prototype changes.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Tvrtko Ursulin 2016-11-16 08:55:39 +00:00
parent b243f530b2
commit 29b74b7f17
4 changed files with 19 additions and 27 deletions
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4
drivers/gpu/drm/i915/i915_drv.h
View file

@ -3483,8 +3483,8 @@ extern int intel_connector_register(struct drm_connector *);
extern void intel_connector_unregister(struct drm_connector *); extern void intel_connector_unregister(struct drm_connector *);
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state); extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
extern void intel_display_resume(struct drm_device *dev); extern void intel_display_resume(struct drm_device *dev);
extern void i915_redisable_vga(struct drm_device *dev); extern void i915_redisable_vga(struct drm_i915_private *dev_priv);
extern void i915_redisable_vga_power_on(struct drm_device *dev); extern void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val); extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val);
extern void intel_init_pch_refclk(struct drm_device *dev); extern void intel_init_pch_refclk(struct drm_device *dev);
extern void intel_set_rps(struct drm_i915_private *dev_priv, u8 val); extern void intel_set_rps(struct drm_i915_private *dev_priv, u8 val);

22
drivers/gpu/drm/i915/i915_suspend.c
View file

@ -29,12 +29,10 @@
#include "intel_drv.h" #include "intel_drv.h"
#include "i915_reg.h" #include "i915_reg.h"
static void i915_save_display(struct drm_device *dev) static void i915_save_display(struct drm_i915_private *dev_priv)
{ {
struct drm_i915_private *dev_priv = to_i915(dev);
/* Display arbitration control */ /* Display arbitration control */
if (INTEL_INFO(dev)->gen <= 4) if (INTEL_GEN(dev_priv) <= 4)
dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
/* save FBC interval */ /* save FBC interval */
@ -42,12 +40,10 @@ static void i915_save_display(struct drm_device *dev)
dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL); dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
} }
static void i915_restore_display(struct drm_device *dev) static void i915_restore_display(struct drm_i915_private *dev_priv)
{ {
struct drm_i915_private *dev_priv = to_i915(dev);
/* Display arbitration */ /* Display arbitration */
if (INTEL_INFO(dev)->gen <= 4) if (INTEL_GEN(dev_priv) <= 4)
I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB); I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
/* only restore FBC info on the platform that supports FBC*/ /* only restore FBC info on the platform that supports FBC*/
@ -57,7 +53,7 @@ static void i915_restore_display(struct drm_device *dev)
if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL); I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
i915_redisable_vga(dev); i915_redisable_vga(dev_priv);
} }
int i915_save_state(struct drm_device *dev) int i915_save_state(struct drm_device *dev)
@ -68,14 +64,14 @@ int i915_save_state(struct drm_device *dev)
mutex_lock(&dev->struct_mutex); mutex_lock(&dev->struct_mutex);
i915_save_display(dev); i915_save_display(dev_priv);
if (IS_GEN4(dev_priv)) if (IS_GEN4(dev_priv))
pci_read_config_word(pdev, GCDGMBUS, pci_read_config_word(pdev, GCDGMBUS,
&dev_priv->regfile.saveGCDGMBUS); &dev_priv->regfile.saveGCDGMBUS);
/* Cache mode state */ /* Cache mode state */
if (INTEL_INFO(dev)->gen < 7) if (INTEL_GEN(dev_priv) < 7)
dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0); dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
/* Memory Arbitration state */ /* Memory Arbitration state */
@ -119,10 +115,10 @@ int i915_restore_state(struct drm_device *dev)
if (IS_GEN4(dev_priv)) if (IS_GEN4(dev_priv))
pci_write_config_word(pdev, GCDGMBUS, pci_write_config_word(pdev, GCDGMBUS,
dev_priv->regfile.saveGCDGMBUS); dev_priv->regfile.saveGCDGMBUS);
i915_restore_display(dev); i915_restore_display(dev_priv);
/* Cache mode state */ /* Cache mode state */
if (INTEL_INFO(dev)->gen < 7) if (INTEL_GEN(dev_priv) < 7)
I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 | I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
0xffff0000); 0xffff0000);

18
drivers/gpu/drm/i915/intel_display.c
View file

@ -3503,7 +3503,7 @@ __intel_display_resume(struct drm_device *dev,
int i, ret; int i, ret;
intel_modeset_setup_hw_state(dev); intel_modeset_setup_hw_state(dev);
i915_redisable_vga(dev); i915_redisable_vga(to_i915(dev));
if (!state) if (!state)
return 0; return 0;
@ -16319,9 +16319,8 @@ static void intel_init_quirks(struct drm_device *dev)
} }
/* Disable the VGA plane that we never use */ /* Disable the VGA plane that we never use */
static void i915_disable_vga(struct drm_device *dev) static void i915_disable_vga(struct drm_i915_private *dev_priv)
{ {
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev; struct pci_dev *pdev = dev_priv->drm.pdev;
u8 sr1; u8 sr1;
i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv); i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
@ -16524,7 +16523,7 @@ int intel_modeset_init(struct drm_device *dev)
intel_update_max_cdclk(dev_priv); intel_update_max_cdclk(dev_priv);
/* Just disable it once at startup */ /* Just disable it once at startup */
i915_disable_vga(dev); i915_disable_vga(dev_priv);
intel_setup_outputs(dev); intel_setup_outputs(dev);
drm_modeset_lock_all(dev); drm_modeset_lock_all(dev);
@ -16770,21 +16769,18 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
* the crtc fixup. */ * the crtc fixup. */
} }
void i915_redisable_vga_power_on(struct drm_device *dev) void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
{ {
struct drm_i915_private *dev_priv = to_i915(dev);
i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv); i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) { if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
i915_disable_vga(dev); i915_disable_vga(dev_priv);
} }
} }
void i915_redisable_vga(struct drm_device *dev) void i915_redisable_vga(struct drm_i915_private *dev_priv)
{ {
struct drm_i915_private *dev_priv = to_i915(dev);
/* This function can be called both from intel_modeset_setup_hw_state or /* This function can be called both from intel_modeset_setup_hw_state or
* at a very early point in our resume sequence, where the power well * at a very early point in our resume sequence, where the power well
* structures are not yet restored. Since this function is at a very * structures are not yet restored. Since this function is at a very
@ -16795,7 +16791,7 @@ void i915_redisable_vga(struct drm_device *dev)
if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_VGA)) if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_VGA))
return; return;
i915_redisable_vga_power_on(dev); i915_redisable_vga_power_on(dev_priv);
intel_display_power_put(dev_priv, POWER_DOMAIN_VGA); intel_display_power_put(dev_priv, POWER_DOMAIN_VGA);
} }

2
drivers/gpu/drm/i915/intel_runtime_pm.c
View file

@ -1097,7 +1097,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
intel_crt_reset(&encoder->base); intel_crt_reset(&encoder->base);
} }
i915_redisable_vga_power_on(&dev_priv->drm); i915_redisable_vga_power_on(dev_priv);
intel_pps_unlock_regs_wa(dev_priv); intel_pps_unlock_regs_wa(dev_priv);
} }