Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into m
* 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: ARM: OMAP1: Fix typo in OMAP1 MPU clock source initialization ARM: OMAP: Fix DMA CLINK mask, clear spurious interrupt ARM: OMAP: Fix chain_a_transfer return value ARM: OMAP: Fix missing makefile options ARM: OMAP: Fix GPIO IRQ unmask ARM: OMAP: Fix clockevent support for hrtimers
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commit
2a1bf8b7da
6 changed files with 22 additions and 9 deletions
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@ -469,6 +469,7 @@ config ARCH_OMAP
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bool "TI OMAP"
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bool "TI OMAP"
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select GENERIC_GPIO
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select GENERIC_GPIO
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select GENERIC_TIME
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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help
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help
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Support for TI's OMAP platform (OMAP1 and OMAP2).
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Support for TI's OMAP platform (OMAP1 and OMAP2).
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@ -132,13 +132,20 @@ static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
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timer->cntl = timerflags;
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timer->cntl = timerflags;
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}
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}
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static inline void omap_mpu_timer_stop(int nr)
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{
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volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
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timer->cntl &= ~MPU_TIMER_ST;
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}
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/*
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/*
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* ---------------------------------------------------------------------------
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* ---------------------------------------------------------------------------
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* MPU timer 1 ... count down to zero, interrupt, reload
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* MPU timer 1 ... count down to zero, interrupt, reload
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* ---------------------------------------------------------------------------
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* ---------------------------------------------------------------------------
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*/
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*/
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static int omap_mpu_set_next_event(unsigned long cycles,
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static int omap_mpu_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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struct clock_event_device *evt)
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{
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{
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omap_mpu_timer_start(0, cycles, 0);
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omap_mpu_timer_start(0, cycles, 0);
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return 0;
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return 0;
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@ -152,6 +159,7 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
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omap_mpu_set_autoreset(0);
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omap_mpu_set_autoreset(0);
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break;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_ONESHOT:
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omap_mpu_timer_stop(0);
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omap_mpu_remove_autoreset(0);
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omap_mpu_remove_autoreset(0);
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break;
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_UNUSED:
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@ -163,7 +171,7 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
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static struct clock_event_device clockevent_mpu_timer1 = {
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static struct clock_event_device clockevent_mpu_timer1 = {
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.name = "mpu_timer1",
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.name = "mpu_timer1",
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.features = CLOCK_EVT_FEAT_PERIODIC, CLOCK_EVT_FEAT_ONESHOT,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.shift = 32,
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.set_next_event = omap_mpu_set_next_event,
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.set_next_event = omap_mpu_set_next_event,
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.set_mode = omap_mpu_set_mode,
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.set_mode = omap_mpu_set_mode,
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@ -11,7 +11,6 @@ choice
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config ARCH_OMAP1
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config ARCH_OMAP1
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bool "TI OMAP1"
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bool "TI OMAP1"
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select GENERIC_CLOCKEVENTS
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config ARCH_OMAP2
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config ARCH_OMAP2
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bool "TI OMAP2"
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bool "TI OMAP2"
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@ -14,9 +14,14 @@ obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
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# OCPI interconnect support for 1710, 1610 and 5912
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# OCPI interconnect support for 1710, 1610 and 5912
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obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
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obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
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obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
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obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
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obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
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obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
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obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
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obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
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obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
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obj-$(CONFIG_I2C_OMAP) += i2c.o
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obj-$(CONFIG_I2C_OMAP) += i2c.o
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# OMAP mailbox framework
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obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
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@ -1020,12 +1020,12 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
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}
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}
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w = OMAP_DMA_CLNK_CTRL_REG(lch_head);
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w = OMAP_DMA_CLNK_CTRL_REG(lch_head);
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w &= ~(0x0f);
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w &= ~(0x1f);
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w |= lch_queue;
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w |= lch_queue;
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OMAP_DMA_CLNK_CTRL_REG(lch_head) = w;
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OMAP_DMA_CLNK_CTRL_REG(lch_head) = w;
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w = OMAP_DMA_CLNK_CTRL_REG(lch_queue);
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w = OMAP_DMA_CLNK_CTRL_REG(lch_queue);
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w &= ~(0x0f);
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w &= ~(0x1f);
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w |= (dma_chan[lch_queue].next_linked_ch);
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w |= (dma_chan[lch_queue].next_linked_ch);
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OMAP_DMA_CLNK_CTRL_REG(lch_queue) = w;
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OMAP_DMA_CLNK_CTRL_REG(lch_queue) = w;
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}
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}
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@ -1248,7 +1248,7 @@ EXPORT_SYMBOL(omap_dma_chain_status);
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* @param frame_count
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* @param frame_count
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* @param callbk_data - channel callback parameter data.
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* @param callbk_data - channel callback parameter data.
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*
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*
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* @return - Success : start_dma status
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* @return - Success : 0
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* Failure: -EINVAL/-EBUSY
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* Failure: -EINVAL/-EBUSY
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*/
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*/
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int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
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int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
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@ -1367,7 +1367,7 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
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dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
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dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
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}
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}
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}
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}
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return start_dma;
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return 0;
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}
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}
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EXPORT_SYMBOL(omap_dma_chain_a_transfer);
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EXPORT_SYMBOL(omap_dma_chain_a_transfer);
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@ -1663,6 +1663,7 @@ static int omap2_dma_handle_ch(int ch)
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if (!status) {
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if (!status) {
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if (printk_ratelimit())
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if (printk_ratelimit())
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printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", ch);
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printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", ch);
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omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
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return 0;
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return 0;
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}
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}
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if (unlikely(dma_chan[ch].dev_id == -1)) {
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if (unlikely(dma_chan[ch].dev_id == -1)) {
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@ -1134,10 +1134,9 @@ static void gpio_mask_irq(unsigned int irq)
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static void gpio_unmask_irq(unsigned int irq)
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static void gpio_unmask_irq(unsigned int irq)
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{
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{
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unsigned int gpio = irq - IH_GPIO_BASE;
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unsigned int gpio = irq - IH_GPIO_BASE;
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unsigned int gpio_idx = get_gpio_index(gpio);
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struct gpio_bank *bank = get_irq_chip_data(irq);
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struct gpio_bank *bank = get_irq_chip_data(irq);
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_set_gpio_irqenable(bank, gpio_idx, 1);
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_set_gpio_irqenable(bank, gpio, 1);
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}
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}
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static struct irq_chip gpio_irq_chip = {
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static struct irq_chip gpio_irq_chip = {
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