RealView: Move more device address definitions to board-eb.h
The upcoming PB11MPCore and PB1176 have different memory maps and some of the definitions in platform.h are no longer common. This patch moves them to the board-eb.h file and updates their usage in realview_eb.c. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas
parent
9a386f0651
commit
393538e6d2
3 changed files with 30 additions and 36 deletions
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@ -136,12 +136,12 @@ static void __init realview_eb_map_io(void)
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/*
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* These devices are connected directly to the multi-layer AHB switch
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*/
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#define SMC_IRQ { NO_IRQ, NO_IRQ }
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#define SMC_DMA { 0, 0 }
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#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
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#define EB_SMC_DMA { 0, 0 }
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#define MPMC_IRQ { NO_IRQ, NO_IRQ }
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#define MPMC_DMA { 0, 0 }
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#define CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
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#define CLCD_DMA { 0, 0 }
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#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
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#define EB_CLCD_DMA { 0, 0 }
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#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
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#define DMAC_DMA { 0, 0 }
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@ -150,14 +150,14 @@ static void __init realview_eb_map_io(void)
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*/
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#define SCTL_IRQ { NO_IRQ, NO_IRQ }
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#define SCTL_DMA { 0, 0 }
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#define WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
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#define WATCHDOG_DMA { 0, 0 }
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#define GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
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#define GPIO0_DMA { 0, 0 }
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#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
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#define EB_WATCHDOG_DMA { 0, 0 }
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#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
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#define EB_GPIO0_DMA { 0, 0 }
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#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
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#define GPIO1_DMA { 0, 0 }
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#define RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
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#define RTC_DMA { 0, 0 }
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#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
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#define EB_RTC_DMA { 0, 0 }
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/*
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* These devices are connected via the DMA APB bridge
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@ -172,8 +172,8 @@ static void __init realview_eb_map_io(void)
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#define EB_UART2_DMA { 11, 10 }
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#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
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#define EB_UART3_DMA { 0x86, 0x87 }
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#define SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
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#define SSP_DMA { 9, 8 }
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#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
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#define EB_SSP_DMA { 9, 8 }
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/* FPGA Primecells */
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AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
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@ -183,20 +183,20 @@ AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
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AMBA_DEVICE(uart3, "fpga:09", EB_UART3, NULL);
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/* DevChip Primecells */
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AMBA_DEVICE(smc, "dev:00", SMC, NULL);
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AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
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AMBA_DEVICE(smc, "dev:00", EB_SMC, NULL);
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AMBA_DEVICE(clcd, "dev:20", EB_CLCD, &clcd_plat_data);
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AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
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AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
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AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
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AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
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AMBA_DEVICE(wdog, "dev:e1", EB_WATCHDOG, NULL);
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AMBA_DEVICE(gpio0, "dev:e4", EB_GPIO0, NULL);
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AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
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AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
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AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
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AMBA_DEVICE(rtc, "dev:e8", EB_RTC, NULL);
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AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
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AMBA_DEVICE(uart0, "dev:f1", EB_UART0, NULL);
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AMBA_DEVICE(uart1, "dev:f2", EB_UART1, NULL);
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AMBA_DEVICE(uart2, "dev:f3", EB_UART2, NULL);
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AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
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AMBA_DEVICE(ssp0, "dev:f4", EB_SSP, NULL);
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static struct amba_device *amba_devs[] __initdata = {
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&dmac_device,
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@ -231,8 +231,8 @@ static struct resource realview_eb_flash_resource = {
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static struct resource realview_eb_eth_resources[] = {
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[0] = {
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.start = REALVIEW_ETH_BASE,
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.end = REALVIEW_ETH_BASE + SZ_64K - 1,
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.start = REALVIEW_EB_ETH_BASE,
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.end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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@ -254,7 +254,7 @@ static struct platform_device realview_eb_eth_device = {
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*/
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static int eth_device_register(void)
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{
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void __iomem *eth_addr = ioremap(REALVIEW_ETH_BASE, SZ_4K);
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void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
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u32 idrev;
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if (!eth_addr)
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@ -30,13 +30,21 @@
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#define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
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#define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
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#define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
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#define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
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#define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
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#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
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#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
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#define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
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#define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
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#define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
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#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
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#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
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#define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
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#define REALVIEW_EB_FLASH_BASE 0x40000000
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#define REALVIEW_EB_FLASH_SIZE SZ_64M
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#define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
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#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
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#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
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#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
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@ -172,34 +172,20 @@
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#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
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/*
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* REALVIEW peripheral addresses
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* RealView common peripheral addresses
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*/
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#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
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#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
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/* Reserved 0x10003000 */
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#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
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#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
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#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
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#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
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#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
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#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
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#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
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/* Reserved 0x1000F000 */
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#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
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#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
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#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
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#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
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/* Reserved 0x10016000 */
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#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
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#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
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#define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */
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/* Reserved 0x1001A000 - 0x1001FFFF */
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#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
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#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
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#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
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/* Reserved 0x10090000 - 0x100EFFFF */
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#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
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/* PCI space */
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#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
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