drm/amdgpu: add vcn ip block and type
Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 40 additions and 1 deletions
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@ -756,3 +756,12 @@ static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
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adev->vcn.irq.num_types = 1;
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adev->vcn.irq.num_types = 1;
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adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
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adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
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}
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}
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const struct amdgpu_ip_block_version vcn_v1_0_ip_block =
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{
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.type = AMD_IP_BLOCK_TYPE_VCN,
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.major = 1,
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.minor = 0,
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.rev = 0,
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.funcs = &vcn_v1_0_ip_funcs,
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};
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29
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.h
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29
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.h
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@ -0,0 +1,29 @@
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/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __VCN_V1_0_H__
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#define __VCN_V1_0_H__
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extern const struct amdgpu_ip_block_version vcn_v1_0_ip_block;
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#endif
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@ -77,7 +77,8 @@ enum amd_ip_block_type {
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AMD_IP_BLOCK_TYPE_VCE,
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AMD_IP_BLOCK_TYPE_VCE,
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AMD_IP_BLOCK_TYPE_ACP,
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AMD_IP_BLOCK_TYPE_ACP,
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AMD_IP_BLOCK_TYPE_GFXHUB,
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AMD_IP_BLOCK_TYPE_GFXHUB,
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AMD_IP_BLOCK_TYPE_MMHUB
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AMD_IP_BLOCK_TYPE_MMHUB,
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AMD_IP_BLOCK_TYPE_VCN
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};
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};
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enum amd_clockgating_state {
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enum amd_clockgating_state {
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